Hi,
I wonder what is the correct method to simulate the loop gain/phase margin of linear regulators working in constant current mode.
I couldn't find anything with google (may be I used the wrong terms), so I devised this test circuit where I unconnected the voltage regulation part and connected the output to ground. That produced something which looks like a correct bodeplot:
BTW I found some TI document about using huge inductor and capacitor in loop gain spice simulations and so I used 1 TeraHenry/1 TeraFarad (1 microOhm parasitic resistance) components to provide separate paths to DC and AC sources.
Anyway I'm unsure the result I got is correct (i.e. is meaningful regarding real circuits)
.
I'd like to get some feedback.
Thanks