Author Topic: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)  (Read 9633 times)

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Offline JoeNTopic starter

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I guess this is for SPICE in general, though I have been using LTSpice.  As a beginner to SPICE, I wonder why things like PCB traces are not modeled, or at least don't seem to be, by LTSpice, at least in the examples I have seen so far.  A common warning I see on many circuits, especially power supply circuits, reads like this:  "performance and stability is dramatically affected by PCB layout."  Obviously that is happening because of choices for trace length, width, copper thickness, and capacitance on the traces.  So, ideally, it seems to me those traces should be modeled somehow and SPICE should take into account the trace's characteristics.  Why doesn't this happen in SPICE?  Or does it?  Am I missing something?  Is this just an advanced topic that I haven't found the example or tutorial for yet?  Also, does Spice take into account signal propagation times as part of the simulation or is it simply assuming signals are instantaneous throughout the circuit?  Thank you.  Just interested.
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Offline Kalvin

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #1 on: August 15, 2016, 06:51:42 pm »
In general, the PCB parameters and parasitics can be modelled by adding the specific L's C's and R's into the simulation model representing the specific PCB parameters. There are no universal PCB parameters as those parameters and parasitics vary from one design to another and how the actual layout will be made. For example, one design can be constructed on a multi-layer PCB, another on a one-sided PCB, yet another design can be built on a solderless breadboard. Each of those constructions will have vastly different PCB parasitics and parameters, thus each will require careful, construction-specific PCB trace models and parameters.

Addition: Propagation time is not modelled either as the components are modelled as lumped elements. If you need to model propagation time, you can use transmission lines. If you really need to model high-frequency circuits, Spice may not be the right tool for the job. There are other tools better suited for the microwave simulation which can model the circuits elements and PCB traces using the S-parameters and which can handle the transmission lines and propagation times more efficiently.
« Last Edit: August 15, 2016, 07:03:19 pm by Kalvin »
 

Offline Jay_Diddy_B

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #2 on: August 15, 2016, 06:57:02 pm »
Joe
How would spice know how good or how bad the layout is?

You can add resistors and inductors to simulate the wiring, but that requires you to be able to estimate the values.

In some RF simulators you enter the physical dimensions and an EM field solver is used as part of the modelling.

In the standard implementation of SPICE, capacitors are pure capacitors and Inductors are pure inductors etc. LTspice allows the capacitor models to include ESR and ESL. The LTspice inductors can include DCR and parasitic capacitance These all go to making more accurate models. But, it is just a model and some point you have to build and test hardware.

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Offline JoeNTopic starter

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #3 on: August 15, 2016, 06:59:39 pm »
In general, the PCB parameters and parasitics can be modelled by adding the specific L's C's and R's into the simulation model representing the specific PCB parameters. There are no universal PCB parameters as those parameters and parasitics vary from one design to another and how the actual layout will be made. For example, one design can be constructed on a multi-layer PCB, another on a one-sided PCB, yet another design can be built on a solderless breadboard. Each of those constructions will have vastly different PCB parasitics and parameters, thus each will require careful, construction-specific PCB trace models and parameters.

So you are saying that instead of using a wire, you would use, an LCR network to represent the wire (PCB trace) between nodes, a specific LCR network for each wire (PCB trace)?

I just wonder then if you know you are always using FR4 1oz 4 layer stackup with internal VCC and GND planes that you might be able to determine what that LCR network is for a 10mil 10mm trace vs a 20 mil 10mm trace, vs a 20 mil 20mm trace, etc.  That way you could have a "general" model of your traces on a board that you normally construct to.  Is that done?  It doesn't seem feasible to build the board just to try to measure those really small LCR values and then simulate it after the fact.  Do PCB manufacturers provide that information in some way like all the other component manufacturers do?  (Isn't a PCB a component in the end?)
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Offline JoeNTopic starter

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #4 on: August 15, 2016, 07:01:17 pm »
Joe
How would spice know how good or how bad the layout is?

I don't, in a sense that is what I want Spice to tell me.  If the circuit works, I am going to assume that is "good".  :)

What I know is that I am on FR4, internal planes, 1oz copper and I know my trace lengths and widths.  I want to simulate the circuit including the traces prior to making the board.  IMHO the traces are part of the circuit and should be simulated.  Am I asking too much?
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Offline rx8pilot

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #5 on: August 15, 2016, 07:06:33 pm »
I don't use LT Spice a ton, but I did do a simulation after building my circuit and added what I thought were the most likely dominant parasitics as added components. I did my best to measure or calculate the values until the simulation results matched the actual circuit measurements. It was a little rough, no doubt, but it was a good learning experience to better understand the impact of seemingly small PCB parasitics.

One of the parasitics that is crucial to figure out are the measurements being taken and what they may do to the signals. Probe loading can have you chasing your tail for as long as you let it where spice 'probes' have no impact on the simulation.

I use spice to understand the ideal behavior of sections of the circuits. Maybe if I spent more time learning the tool, it would be more useful to me.
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Offline Kilrah

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #6 on: August 15, 2016, 07:07:55 pm »
What I know is that I am on FR4, internal planes, 1oz copper and I know my trace lengths and widths. 
How much spacing between traces? Ground plane between them? At what distance? How well is the ground plane connected, via stitched all along the trace or one poor useless lone via at the other end of the board?

Many many parameters... until someone makes a simulator that can take the final board design as an input along with the material parameters, yes I believe you're asking too much.
 

Offline CatalinaWOW

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #7 on: August 15, 2016, 07:10:44 pm »
Another way to say this is that Spice (all varieties) uses a lumped parameter view of the world.  This says that circuit behavior is dominated by components, and not their interconnections.  All models are simplified representations of reality, and the lumped parameter model is a good representation of reality in many cases.

As stated above, you can extend the usefulness of this model by creating lumped parameter representations of the interconnects.  This can be useful if the interconnect is simple enough to model this way, and if only a few of the connections require this extra detail.

The warnings that circuit layout is critical can be interpreted in at least two ways.  One way, which was dominant when I started my career several decades ago, is that it is important to lay out your circuit in ways that make the lumped parameter approximation valid.  Back then it meant ground planes to shield circuits from one another, spacing between critical circuits, twisted pairs to minimize magnetic coupling, choice of component values to assure that they dominated behavior and so on.  Another way is what you hinted at in your question, making sure that the interconnections are modeled also.  As circuit speeds have risen (by several orders of magnitude over my career) this latter approach has become more appropriate.  The actual approaches currently used are often a hybrid of these, using analysis and experience to isolate critical portions of the circuit, and then modeling those in detail with an electromagnetic simulation, while using more traditional approaches on the rest.
 

Offline JoeNTopic starter

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #8 on: August 15, 2016, 07:11:42 pm »
What I know is that I am on FR4, internal planes, 1oz copper and I know my trace lengths and widths. 
How much spacing between traces? Ground plane between them? At what distance? How well is the ground plane connected, via stitched all along the trace or one poor useless lone via at the other end of the board?

Many many parameters... until someone makes a simulator that can take the final board design as an input along with the material parameters, yes I believe you're asking too much.

Now you have me thinking.  That is good information.  But I still sort of optimistically wonder if a mediocre trace model based on length and width and thickness is still not better than none at all, which is what your average SPICE model has, perfect traces with zero resistance, inductance, and capacitance, that exist nowhere in the real world.
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Offline Kalvin

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #9 on: August 15, 2016, 07:12:46 pm »
In general, the PCB parameters and parasitics can be modelled by adding the specific L's C's and R's into the simulation model representing the specific PCB parameters. There are no universal PCB parameters as those parameters and parasitics vary from one design to another and how the actual layout will be made. For example, one design can be constructed on a multi-layer PCB, another on a one-sided PCB, yet another design can be built on a solderless breadboard. Each of those constructions will have vastly different PCB parasitics and parameters, thus each will require careful, construction-specific PCB trace models and parameters.

So you are saying that instead of using a wire, you would use, an LCR network to represent the wire (PCB trace) between nodes, a specific LCR network for each wire (PCB trace)?

I just wonder then if you know you are always using FR4 1oz 4 layer stackup with internal VCC and GND planes that you might be able to determine what that LCR network is for a 10mil 10mm trace vs a 20 mil 10mm trace, vs a 20 mil 20mm trace, etc.  That way you could have a "general" model of your traces on a board that you normally construct to.  Is that done?  It doesn't seem feasible to build the board just to try to measure those really small LCR values and then simulate it after the fact.  Do PCB manufacturers provide that information in some way like all the other component manufacturers do?  (Isn't a PCB a component in the end?)

Yes, you have to add the lumped components (LCR network) that model the PCB traces well enough. You could probably get those parameters from the PCB manufacturer or use a suitable EM solver to get those parameters from the PCB model you provide. Eventually you need to at least validate the calculated parameters against the real PCB. Simulator is only a simulator, which means basically that you have a powerful calculator which can produce very convincing garbage if your model is wrong, ie. garbage in - garbage out. You should never really trust your simulator as the component model may be wrong or be valid only within specific conditions. :)
 

Offline JoeNTopic starter

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #10 on: August 15, 2016, 07:17:04 pm »
Well, I never have looked at "EM solvers".  So possibly if you know your proposed PCB design the EM solver software can actually give you LCR paramaters on each of the traces because it is solving for the whole network of copper, knowing where the planes are and all the vias?  Then you put it into SPICE and maybe have a better simulation.  I am going to assume I am never going to find an EM solver at the same price point as LTSpice, right  >:D?  I guess I will go off and look...

Lalala.   Now reading:  https://en.wikipedia.org/wiki/Electromagnetic_field_solver
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Offline rx8pilot

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #11 on: August 15, 2016, 07:28:25 pm »
Many many parameters... until someone makes a simulator that can take the final board design as an input along with the material parameters, yes I believe you're asking too much.

The price tag on that tool would likely be outrageous, but it would be amazing.
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Offline CatalinaWOW

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #12 on: August 15, 2016, 07:42:27 pm »
There are also specialized tools/modelers for specific configurations like strip lines.  Some of these are free/low cost.  You design your critical traces to conform to the geometry that these tools can deal with.  You can then come up with appropriate models to plug into Spice.

I can think of no cases where it makes sense to model all of the traces on a PWB with an EM tool.  In many cases the execution time for the simulation would be as bad as the cost of the tool.

I will also second the notion that no model can be trusted until it is varified by comparing model results with tests of actual hardware.  Surprises that show inadequacies in initial modeling are all too common.  Sometimes in hindsight they are the result of an oops, something that should have been obvious beforehand.  But often they are the result of something that could not have been known ahead of time.
 

Offline user99

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #13 on: August 15, 2016, 07:44:08 pm »
Keysight Genesys looks like it will analyze PCB layouts and it has a free trial.   
 

Offline w2aew

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #14 on: August 15, 2016, 08:09:43 pm »
What I know is that I am on FR4, internal planes, 1oz copper and I know my trace lengths and widths. 
How much spacing between traces? Ground plane between them? At what distance? How well is the ground plane connected, via stitched all along the trace or one poor useless lone via at the other end of the board?

Many many parameters... until someone makes a simulator that can take the final board design as an input along with the material parameters, yes I believe you're asking too much.

Now you have me thinking.  That is good information.  But I still sort of optimistically wonder if a mediocre trace model based on length and width and thickness is still not better than none at all, which is what your average SPICE model has, perfect traces with zero resistance, inductance, and capacitance, that exist nowhere in the real world.

Often times, things like signal coupling from one trace to another can create noise and feedback paths that will affect circuit operation - this wouldn't be accounted for my simply include a width/length/etc. model of the traces.  Also, ground planes aren't perfect either - meaning that the ground current distribution across ground plane (or power plane for that matter) isn't uniform.  Current will travel in the path of least impedance - this includes the least amount of "loop area" when considering a signal current on a trace and the return path on a plane - all very difficult things to model in a general sense.  It all becomes highly layout and circuit dependent, which is why there are things like field solvers and complex EM structure simulators.
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Offline joeqsmith

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #15 on: August 15, 2016, 09:18:18 pm »
I have used SPICE to simulate parts of a circuit board but nothing very complex and more just to get a feel for what was going on.   
 


Offline T3sl4co1l

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #16 on: August 15, 2016, 11:07:32 pm »
1. Because SPICE has no knowledge of physical size, layout, position, finite speed of light, etc.

a. A simulation is entirely instantaneous, approximated with poles and zeroes (and one pure delay element: a transmission line -- which you don't usually use because it tends to slow down the simulation).

b. There's no good way to introduce this property, either.  The most representative format would be a matrix of overlapping transmission lines, of various lengths.  The matrix represents the delay of individual signals, and the crosstalk (coupling) between adjacent signals.  Different impedances of transmission lines suggest inductive or capacitive character, at least at lower frequencies.  Needless to say, an NxN matrix (for N nodes in the circuit) of random length/impedance transmission lines will run extremely slowly indeed, if it runs at all; let alone trying to come up with all that data!

You certainly wouldn't want an environment where random line lengths are added arbitrarily into your circuit!  I think I've seen, before, simulators where the graphical length of a "wire" adds resistance... lord help them...

c. There is only one reason why "capacitance" and "inductance" exist at all: because they are convenient approximations of transmission line properties.  Everything in reality has to pass through space at the speed of light (or some fraction of it), and therefore transmission line effects are both fundamental to reality, and critical for the complete analysis of a circuit.  But for a partial analysis, for frequencies where the delay is a small fraction of the cycle, we can approximate the speed of light as infinite and, lo and behold, transmission lines look like an LC circuit!

2. What is SPICE?

SPICE is a numerical solver.

It does not know the real world, or physics.  It contains some useful passive and semiconductor primitives (betraying its origin as a tool for IC development, where assuming the speed of light is infinite had historically been an excellent assumption), and that's about it.

It is up to you, the modeler, to create a system which is representative of the tiny slice of reality you wish to simulate.

3. Don't know what to put in?  Try everything!  Fail, fail hard and fail often!  Build real circuits!  Make horrible layouts on the solderless breadboard.  Make good layouts on the solderless breadboard!  Yes, there is such a thing; I've built ~1MHz switchers that way before.  It's not really all that hard, once you've learned how to spot a current loop path between signal and ground (and, by the way, remember that there's no such thing as ground -- voltage is only ever a difference, and "ground" is a real physical conductor like any other in the circuit -- and unlike SPICE nodes, which are perfectly conductive to all pins on the node!).  Build circuits on ground plane, dead bug style or whatever.  Make a few PCBs; measure the ground loop voltages yourself!  Get used to the idea of measuring funny (RF) voltages at different points along an otherwise solid conductor.

Read textbooks, do the homework problems as well as you can; or take full classes on the subject!  You can develop an intuitive understanding of fields and layout parasitics, but it will take a lot of time, and having a quantitative grounding is so much help.

Tim
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Offline CatalinaWOW

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #17 on: August 16, 2016, 03:05:55 am »
1. Because SPICE has no knowledge of physical size, layout, position, finite speed of light, etc.

a. A simulation is entirely instantaneous, approximated with poles and zeroes (and one pure delay element: a transmission line -- which you don't usually use because it tends to slow down the simulation).

b. There's no good way to introduce this property, either.  The most representative format would be a matrix of overlapping transmission lines, of various lengths.  The matrix represents the delay of individual signals, and the crosstalk (coupling) between adjacent signals.  Different impedances of transmission lines suggest inductive or capacitive character, at least at lower frequencies.  Needless to say, an NxN matrix (for N nodes in the circuit) of random length/impedance transmission lines will run extremely slowly indeed, if it runs at all; let alone trying to come up with all that data!

You certainly wouldn't want an environment where random line lengths are added arbitrarily into your circuit!  I think I've seen, before, simulators where the graphical length of a "wire" adds resistance... lord help them...

c. There is only one reason why "capacitance" and "inductance" exist at all: because they are convenient approximations of transmission line properties.  Everything in reality has to pass through space at the speed of light (or some fraction of it), and therefore transmission line effects are both fundamental to reality, and critical for the complete analysis of a circuit.  But for a partial analysis, for frequencies where the delay is a small fraction of the cycle, we can approximate the speed of light as infinite and, lo and behold, transmission lines look like an LC circuit!

2. What is SPICE?

SPICE is a numerical solver.

It does not know the real world, or physics.  It contains some useful passive and semiconductor primitives (betraying its origin as a tool for IC development, where assuming the speed of light is infinite had historically been an excellent assumption), and that's about it.

It is up to you, the modeler, to create a system which is representative of the tiny slice of reality you wish to simulate.

3. Don't know what to put in?  Try everything!  Fail, fail hard and fail often!  Build real circuits!  Make horrible layouts on the solderless breadboard.  Make good layouts on the solderless breadboard!  Yes, there is such a thing; I've built ~1MHz switchers that way before.  It's not really all that hard, once you've learned how to spot a current loop path between signal and ground (and, by the way, remember that there's no such thing as ground -- voltage is only ever a difference, and "ground" is a real physical conductor like any other in the circuit -- and unlike SPICE nodes, which are perfectly conductive to all pins on the node!).  Build circuits on ground plane, dead bug style or whatever.  Make a few PCBs; measure the ground loop voltages yourself!  Get used to the idea of measuring funny (RF) voltages at different points along an otherwise solid conductor.

Read textbooks, do the homework problems as well as you can; or take full classes on the subject!  You can develop an intuitive understanding of fields and layout parasitics, but it will take a lot of time, and having a quantitative grounding is so much help.

Tim

Thanks.  You said what I was trying to say, but you said it better!
 

Offline Ammar

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Re: LTSpice: Why are wires (PCB traces) not modeled? (Or are they?)
« Reply #18 on: August 16, 2016, 05:48:23 am »
Inductance and capacitance of PCB tracks are related to the geometry of the individual track as well as how it is positioned with respect to other tracks and ground planes

There is a way of doing what you are talking about that involves finite element method electromag solvers like CST or COMSOL. However, this is often not necessary as rule of thumb tends to do the trick.

Keep tracks short and avoid ground loops, these are things to know. If a wire is longer than 5% of the wavelength of the operating frequency, model it as a transmission line.
 


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