Try looking at I(V1), and also setting V1 for, say, 10 ohms ESR, 20nH ESL: very crudely representative of a small electrolytic.
Or better yet, draw the components -- I hate that LTSpice hides all those properties from the schematic view, so you don't know at a glance what ESR/ESL you're playing with.
You aren't going to get much from as soft and slow a chip as that, and depending on whether they modeled shoot-through (if any) or not.
If you like, you can model your own CMOS inverter with a 2N7002 and BSS84. On a supply of about 4V or more, you'll see plenty of shoot-through, to the tune of ~20 ohms shunted across the supply for whatever the rise/fall time is. I suggest driving them from a PULSE source with, say, 10-50ns rise/fall time.
It's difficult to model a realistic, representative power supply -- every wire segment or trace acts like a little inductance, and all the bypass caps interact (think vibrations on a string with beads spaced out irregularly). For best experience, do it in the real world.
Tim