Making a single two-pin output interface configurable for serial or analogue

[HwAoRrDk]

I have an idea for a project I'm entertaining, and I want to know whether what I've thought up is realistic.

I have a two-pin output interface that, depending on the device it's connected to, needs to communicate in one of two different ways. The first, for one class of device, will signal by way of step changes of resistance, using a digital pot (it's emulating what would normally be connected, which is a ladder arrangement of switches and resistors) - I'll call this the 'analogue' method. The second, for other classes of device, will be serial communication (transmit-only by my device), with one pin being data and the other ground - I'll call this the 'digital' method.

An added complication is that the connecting devices may be running on either 5V or 3.3V. For the analogue method, the digital pot shouldn't care, as these voltages are happily within it's operating range. For the digital serial comms, I think this can be resolved by implementing an open-drain output.

So, this is what I am planning:



I believe I can get away with these two methods sharing the same outputs because of the capability of the digital pot (MCP4131) to enter a 'shutdown' state, where it disconnects the A terminal and the wiper is connected directly to the B terminal. I'm using the wiper and A terminals only, so the circuit between my two lines will effectively be broken. So, for analogue mode, I enable the digital pot and leave both digital FETs off. For digital mode, I disable the digital pot, turn on the 'GND' FET, then pulse the 'DATA' FET as necessary for serial transmission.

What I'm not so sure about is what will happen in the scenario where my device is configured for one class of secondary device, but the opposite is connected (i.e. configured for analogue, but digital is connected, and vice-versa). Or, indeed, what happens at power-on where the digital pot has yet to be configured and both FETs are off.

In the case of a digital class device being connected while in analogue mode, my guess at what will happen is as follows: because the connected device will be pulling the data line high via its own resistor, adding my digital pot will essentially form a voltage divider, bringing down the voltage it is reading on the data line. Depending on pot's set resistance, this will result in a voltage level that'll either be interpreted as high or low, and probably do no more than result in 'garbage' data on the line.

The opposite case, where an analogue class device is connected while in digital mode, is problematic. I am assuming that the internal circuitry of analogue class devices will consist of half a voltage divider connected to an ADC. They are free to put the resistor on either the ground or power side. If they happen to have their resistor on the ground side, and one of my FETs switches the power side to ground, it'll be a direct short! That'll probably ending up damaging the connected device and releasing the magic smoke from my FET. Do I rely on the fact the secondary device's designers were wise and put their resistor on the power side? Can I mitigate by putting series resistors before my FETs? Even on the 'GND' line?

Will this whole thing work? Are there better solutions?

[Brumby]

My first question is: How will the choice of "analog" or "digital" mode be made?

If it's a "trial and error" effort by a human, then that's one thing - but if it is supposed to be detected, then how is that detection meant to work?

[HwAoRrDk]

The selection between analogue and digital class device will be made manually by the user. In fact, it will really be more like a selection of what brand/model the secondary device is (the serial protocol varies too). I'm thinking probably a dip switch for this.