Author Topic: :: maximizing capacitor ripple handling ?  (Read 5719 times)

0 Members and 1 Guest are viewing this topic.

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
:: maximizing capacitor ripple handling ?
« on: December 28, 2014, 04:59:10 am »
the question is ... how do you maximise a capacitors ripple handling ability? assuming the situation where the AC spikes is the constant/problem.

 ... do you need to insert R2 to reduce ripple and extend capacitor life span and allow the ripple to work within spec? (data from PDF specs that most caps max out at 3A ripple handling, higher end caps max out at approx 6A)

example see pic.
« Last Edit: December 29, 2014, 01:26:49 am by 3roomlab »
 

Offline pmbrunelle

  • Regular Contributor
  • *
  • Posts: 183
  • Country: ca
  • lost mech. guy
Re: :: maximising capacitor ripple handling ?
« Reply #1 on: December 28, 2014, 05:29:34 am »
I do not understand the goal of this circuit.

Anyway, while series resistance will reduce the ripple current, usually, ESR is not wanted in capacitors. Try more lower-value capacitors in parallel.

To ensure that the ripple current is equally shared between all capacitors, wire them in a star configuration, with the leads all converging to a single point before touching other nodes of the circuit. Furthermore, all leads/traces should be of equal length, so that the series resistance and series inductance are equal for all branches.
 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximising capacitor ripple handling ?
« Reply #2 on: December 28, 2014, 05:45:33 am »
aha ! i kinda get what you mean ....

reducing the size of the capacitor so that the charging/discharging is now a smaller "curve" ... and therefore the rippling rms current is also reduced !  :-+
 

Offline mzzj

  • Super Contributor
  • ***
  • Posts: 1245
  • Country: fi
Re: :: maximising capacitor ripple handling ?
« Reply #3 on: December 28, 2014, 07:41:05 am »
I am not totally sure what you are after since your starting point is somewhat upside down compared to normal...
But; Select cap with low capacitance and high ripple current rating, ie instead of electrolytic caps use Oscon solid polymer caps, plastic caps or ceramics. Or you could put inductor in series before the resistor.

 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximising capacitor ripple handling ?
« Reply #4 on: December 28, 2014, 08:25:05 am »
yea i am approaching the problem from a reversed view :P

the limitations are all on the final capacitors we can all choose ... (and choose economically lol). and the limitations are not just 1 value but quite a few ... you have ESR, ripple handling max, capacitance needed, voltage handling needed ... and operating temp too !  :phew: ...

i had always assumed ripple handling isnt a very important value ... but i guess today is the day i got nit picky :P

with that in mind, i can now understand why many "theoretical" PWM PSU designs choose to have many smaller value caps over 1 bulk giant cap.
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 21686
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: :: maximising capacitor ripple handling ?
« Reply #5 on: December 28, 2014, 08:42:04 am »
Your circuit is wrong: the source is generally an approximation of a constant current (i.e., the ripple is coming, whether the filter is ready for it or not!).  So, additional resistance only increases power dissipation and worsens ripple voltage.  Your only choice is to shunt it better and better -- by using lower ESR caps, and/or connecting many in parallel.

An interesting application is to use a relatively small film (or aluminum polymer) in parallel with a big electrolytic.  This becomes worthwhile at Cfilm = 1 / (2*pi*F*R), for a ripple fundamental frequency, F, and total electrolytic ESR, R.  You'd normally want to use several times this amount to ensure most of the current is flowing in the film caps.

Example: a typical switching supply might have a main bulk cap of 400V 100uF with 0.7 ohm ESR, with 1Ap-p switching demand at 200kHz.  The ESR dissipates 0.175W, not too bad.  Maybe you need it lower anyway: you'd pick a film cap of 400 or 630V rating, polyester or polypropylene, over 1.13uF.  2.2 or 4.7uF would be quite reasonable, and spare much of the ripple seen by the electrolytic.  Parallel combinations are good, too; not necessary for ratings because caps this size are usually rated for a few amperes, but if reduced ESL is also required, it might come in handy.  In which case, they should be placed near the switching device(s) as local bypass.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximising capacitor ripple handling ?
« Reply #6 on: December 28, 2014, 09:10:34 am »
hmmm so according to that equation, 100kHz + 0.01ESR would result in a 159uF cap?

is there a "Term" to call this equation?

*edit ... because i am working backwards
with a 330uF cap @ 0.01ESR
F = 48.22kHz ... hmmm
« Last Edit: December 28, 2014, 09:29:13 am by 3roomlab »
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 21686
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: :: maximising capacitor ripple handling ?
« Reply #7 on: December 28, 2014, 09:47:14 pm »
If your caps are already 10mohm ESR, you don't gain anything with film... especially at that frequency.

330uF?  Surely that's aluminum polymer?

FWIW, Al Poly is the low voltage equivalent of film.  The capacitance-ESR product and energy density are essentially identical, but film caps aren't made in large values at low voltages (up to maybe a few uF at 63 or 100V).  If you're toasting Al Polys in your application, you're doing it wrong...

What are you doing, anyway?

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximizing capacitor ripple handling ?
« Reply #8 on: December 29, 2014, 01:33:38 am »
can you link an example of this film capacitor? an actual product that 1 could buy? to try ?

ahhhh gawd damn my eyes ... all the time it is there and i didnt see it .... %$#$%@

you are talking about this type --> http://www.farnell.com/datasheets/1812503.pdf ??

the spec talks about handling pulse currents, but it talks about max 10,000 cycles ... am i looking at the right area?

these caps have ripple specs way off the charts ... compared to the normal panasonic/vishay/nichicon specs for ripple handling
http://www.farnell.com/datasheets/1738007.pdf
could it be the panasonic/vishay/nichicon specs have included certain real world characteristics they have not?

double checking again ... 330uF, if i try to use film ... buying 5 units could probably buy me a fluke DMM lol ...
« Last Edit: December 29, 2014, 01:53:32 am by 3roomlab »
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 21686
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: :: maximizing capacitor ripple handling ?
« Reply #9 on: December 29, 2014, 02:17:31 am »
What are you doing, anyway?

Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximizing capacitor ripple handling ?
« Reply #10 on: December 29, 2014, 06:55:24 am »
more of understanding practical limits of real world capacitors

practical?
--> capacitors in parrallel with noisy high current DC motors? above 1A below 50A
--> experiments with PWM buck boost. stages? --> post inductor ? pre-PWM reservoir?
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 21686
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: :: maximizing capacitor ripple handling ?
« Reply #11 on: December 29, 2014, 07:20:18 am »
Caps in parallel with motors isn't necessarily a good idea, because the motor may prefer a "squishy" source to optimize losses.  How exactly that works out (for better or for worse, and within how many percentage points does it matter), who knows...

Very large DC motors (100HP+) are constructed with small harmonic windings to correct for the piecewise commutation of the main windings, but smaller ones are not.

Most purposes, it should suffice to add a "hash choke" (usually a few mH) and some capacitance to keep RFI down, without doing much to the ripple and harmonics from motor rotation.

Switching converters, the ripple is a given, and you need to select caps based on that.  There's no "optimize a given capacitor's ripple", it simply handles what it does.  Selection is based on datasheet info, and may not be very specific; the same goes for inductors, which rarely if ever document core losses.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximizing capacitor ripple handling ?
« Reply #12 on: December 29, 2014, 11:06:41 am »
mmm hash choke ... that will clock some time on the simulator  :-+ ... have not tried that scenario before :P
 

Offline Circlotron

  • Super Contributor
  • ***
  • Posts: 3180
  • Country: au
Re: :: maximizing capacitor ripple handling ?
« Reply #13 on: December 29, 2014, 01:16:51 pm »
Yep, put an inductor in series with your pulsating voltage source. Inductors may have gone out of fashion in low power circuits these days but they are VERY effective in solving these kinds of problems.
 

Offline Zero999

  • Super Contributor
  • ***
  • Posts: 19523
  • Country: gb
  • 0999
Re: :: maximizing capacitor ripple handling ?
« Reply #14 on: December 29, 2014, 04:13:17 pm »
more of understanding practical limits of real world capacitors

practical?
--> capacitors in parrallel with noisy high current DC motors? above 1A below 50A
--> experiments with PWM buck boost. stages? --> post inductor ? pre-PWM reservoir?




Don't put a capacitor directly on a PWM output. It will consume more power and cause the capacitor to overheat. Connecting a resistor in series with the capacitor may reduce the current through the capacitor but the resistor will get hot, so use more power. If the PWM frequency is high, the motor's inductance should smooth the current waveform, otherwise add an inductor.
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 21686
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: :: maximizing capacitor ripple handling ?
« Reply #15 on: December 29, 2014, 08:45:58 pm »
Hmm?  He said "pre-PWM reservoir" and "post inductor"...?

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline Zero999

  • Super Contributor
  • ***
  • Posts: 19523
  • Country: gb
  • 0999
Re: :: maximizing capacitor ripple handling ?
« Reply #16 on: December 29, 2014, 09:01:46 pm »
But he also mentioned capacitors in parrallel with noisy high current DC motors which is a no, no, unless it's tiny RFI suppression capacitors.

It's a confusing.

Perhaps a schematic of the whole circuit would be more useful.
 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximizing capacitor ripple handling ?
« Reply #17 on: December 30, 2014, 09:51:46 am »
i know ... im always confusing myself ... more simulations ...

L2/R2 is virtual motor of some sort

... the filter section D1+L1+C5 is very interesting
if i use a 1000u for C5, it actually "sinks" ALOT of ripple, about 5A rms. when large enough, it seems D1 is no longer conducting and becomes redundant (even a small C2 when C5 is large over 10mF ... all the super spikes become very nicely compressed. but at 10mF ... the ripple going thru it is over 40A LOL !!! burn capacitor burn ?)
normally ... the D1 is turning on and moving 10A rms

and with that, the purple section of power feed is actually "quiet" ... :D ...

i guess the intention is correct in this simulation circuit wise yes? just that values may need more adjustment to practical use?

@hero999, yes i think so too, the cap is "shorting" out the AC ... if im getting what you meant yes?
« Last Edit: December 30, 2014, 10:06:39 am by 3roomlab »
 

Offline Zero999

  • Super Contributor
  • ***
  • Posts: 19523
  • Country: gb
  • 0999
Re: :: maximizing capacitor ripple handling ?
« Reply #18 on: December 30, 2014, 12:23:46 pm »
Yes, the capacitor is a short circuit at AC so will overheat.
 

Offline 3roomlabTopic starter

  • Frequent Contributor
  • **
  • Posts: 825
  • Country: 00
Re: :: maximizing capacitor ripple handling ?
« Reply #19 on: December 30, 2014, 05:47:34 pm »

which means also ... C4 is not good for the mosfet too am i right?
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 21686
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: :: maximizing capacitor ripple handling ?
« Reply #20 on: December 31, 2014, 12:27:21 am »
C4 is good during turn-off, bad during turn-on.

Also, you have no load.  So, each time the MOSFET cycles, it builds current in the inductor, with nowhere for it to go but the 0.01 ohm DCR and the voltage drop in the diode.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf