Regarding the pin driving the darlington, refer to the datasheet Figure 34.1.8 to 34-24 (page 414 - 416). The current driving the darlington's base is going to offset the voltage a bit since the pin drivers have some impedance.
Couldn't find the figures you referenced on those pages (I must have a different revision of the ATmega328 datasheet), so not 100% sure which you were referencing, but was it this one?
As far as I make it, I think the current to my darlington driver's base will be under 2mA, so voltage drop on the I/O line should be pretty small (~50mV) across all temperature ranges. I think that should be acceptable, as I'm only taking ADC readings for a signal relative to the reference voltage, not absolute.
The pitfall is internal voltage drops in the Vcc and Gnd busses on the die and the bond wires. If you have other outputs that are heavily loaded and drawing current from the bus your output is set to, the internal Vcc may droop or Gnd may bounce up a bit. Write some code to exercise the other outputs and scope the one you intend to use to see if you can stand the ripple on it . . .
If not, you'll need to put it through a well decoupled single gate buffer and route the Vcc and Gnd tracks to the buffer *extremely* carefully.
I don't
think this will be a problem, as during the period the reference voltage will be in use, while a handful of the I/O outputs will be busy sourcing current to the aforementioned darlington driver, none will actually be being actively toggled, so any drop should be fairly static, right? If the reference voltage doesn't fluctuate, that's probably acceptable.