Author Topic: mic841  (Read 2082 times)

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Offline pmjTopic starter

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mic841
« on: May 20, 2013, 11:39:26 pm »
Hey people
this is my first topic although i watch eevblog for some moths

i haved watch the video about lipo dishcharge and want to make a undervolatge cut off with mic841



i have connect the Vout on p-mosfet, then i need when is low battery the Vout be equal to VDD
but there are two version the L and the H, i don't know witch one to use

thanks

edit: I have found the answer on the complete datasheet
« Last Edit: May 20, 2013, 11:47:25 pm by pmj »
 

Offline Paul Price

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Re: mic841
« Reply #1 on: May 20, 2013, 11:48:15 pm »
The L version is the one you need. It's output goes high on undervoltage battery condition and turns off the P-Chan MOSFET.
4 OUT (“N” Version) Output: Active-high, open-drain output. This output is de-asserted when
VINP< VREF, indicating a low voltage input. The output is asserted when
VINP> VREF+ VHYST.
OUT (“H” Version) Output: Push-pull output. This output is de-asserted and latched when
VINP < VREF, indicating a low voltage condition. This state remains latched
until VINP > VREF+ VHYST.
OUT (“L” Version) Output: Push-pull output. This output is asserted and latched when
VINP < VREF, indicating a low voltage condition. This state remains latched
until VINP > VREF+ VHYST.

5 VDD Power Supply (Input): Independent supply input for internal circuitry.
 

Offline pmjTopic starter

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  • Posts: 3
Re: mic841
« Reply #2 on: May 22, 2013, 09:56:08 pm »
The L version is the one you need. It's output goes high on undervoltage battery condition and turns off the P-Chan MOSFET.
4 OUT (“N” Version) Output: Active-high, open-drain output. This output is de-asserted when
VINP< VREF, indicating a low voltage input. The output is asserted when
VINP> VREF+ VHYST.
OUT (“H” Version) Output: Push-pull output. This output is de-asserted and latched when
VINP < VREF, indicating a low voltage condition. This state remains latched
until VINP > VREF+ VHYST.
OUT (“L” Version) Output: Push-pull output. This output is asserted and latched when
VINP < VREF, indicating a low voltage condition. This state remains latched
until VINP > VREF+ VHYST.

5 VDD Power Supply (Input): Independent supply input for internal circuitry.

thanks for the help
 


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