MOSFET linear regulator circuit

[VEGETA]

Hello,

I want to make a linear lab supply that is using a MOSFET (no LT3081 or any similar) which should have a switching pre-regulator before it to make the voltage 1v more in the input at all times to have more efficiency.

here is my schematic:




this circuit simulated perfectly in LTSPICE but without loads, when I put any load it goes down to few mV or output!! is there anything wrong with it or the ltspice is wrong here?

I will feed the gate drive with an external voltage so I won't take it from the input because I want a 1V drop and then I won't be able to feed the gate with necessary voltage.

looking forward to your help.

thanks

[salbayeng]

What is the "NMOS" transistor? Try using a real part number from the model library.

Something with part numbers like ...15N05     i.e.  <some letters> ,15A , NMOS, 050volts

You might have some default transistor, with a huge on resistance, or a huge threshold voltage.

[ZeTeX]

Use something like IRFZ44N for testing, never trust ltspice ideal models.

[VEGETA]

so you think the circuit will work on real world? assuming I will use a decent one with small Rdson.

[Kleinstein]

It could work work with a well behaved load (e.g. resistor) and if the gate capacitance of the MOSFET is no too large.  A more complete circuit should include at least an resistor in the gate line.

It gets more complicated if the regulator should be used for highly variable loads.

[Zero999]

Yes, it should work in real life. The default MOSFET model in LTSpice is the small signal type, with a high on resistance. Change it to something more practical,

I suppose a MOSFET with a huge gate capacitance could be a problem for the op-amp to drive but it won't be as bad as the MOSFET's datasheet suggests, as it's configured as a source follower, the capacitance will be greatly reduced by negative feedback.

[VEGETA]

I tried a famous mosfet and it worked... only if i choose the op-amp LT1491 not the generic model. the circuit is in the attachments.

My only concern is that whether this circuit will work for 1v dropout or not. can you recommend a mosfet for this? or maybe what is the aspect i should look for?

[Zero999]

Whether it'll meet the drop-out specification depends on the drain current and gate-source voltage.

Be careful, the MOSFET you've chosen has a maximum gate-source voltage of 20V, so you need to make sure this is never exceeded.

[VEGETA]

Whether it'll meet the drop-out specification depends on the drain current and gate-source voltage.

Be careful, the MOSFET you've chosen has a maximum gate-source voltage of 20V, so you need to make sure this is never exceeded.

Here is the new circuit:



I will choose proper parts if the circuit works well, but now let me understand some stuff first. Like the minimum voltage required for the mosfet to work?

That mosfet has Vgs_threshold of 2 to 4v so does that mean minimum voltage drop between input and output can be as low as 1v, but the minimum required gate voltage is around 2v-to-4v more than output voltage?

I am using an NPN transistor as a switch but it follows the op-amp output voltage of around 5.3v! it is not a "switch" so it won't feed the 30v rail directly to the mosfet gate.

[Zero999]

Whether it'll meet the drop-out specification depends on the drain current and gate-source voltage.

Be careful, the MOSFET you've chosen has a maximum gate-source voltage of 20V, so you need to make sure this is never exceeded.

Here is the new circuit:
I will choose proper parts if the circuit works well, but now let me understand some stuff first.

Unfortunately most MOSFETs have a maximum gate-source voltage of under 20V. There are a few which are rated to 30V but not many.

Like the minimum voltage required for the mosfet to work?

That mosfet has Vgs_threshold of 2 to 4v so does that mean minimum voltage drop between input and output can be as low as 1v, but the minimum required gate voltage is around 2v-to-4v more than output voltage?

Yes, the gate voltage needs to be higher than the output voltage, by the amount required to pass the desired current with a low voltage drop. Beware that the threshold is often specified at a very low drain current, often under 1mA. To be certain the MOSFET will have the lowest possible on resistance at the maximum rated current, the gate source voltage often needs to be 5V or 10V. Read the data sheet carefully.

I am using an NPN transistor as a switch but it follows the op-amp output voltage of around 5.3v! it is not a "switch" so it won't feed the 30v rail directly to the mosfet gate.

The transistor is configured as an emitter follower. I don't see what good it will do. If anything it'll only make matters worse. There's no emitter resistor, so the MOSFET won't be able to turn off, only on. Try simulating the transient response by stepping the load current.

edit:
I've done that. The switch represents your 1 Ohm resistor.

[VEGETA]

well, for my application I need drop voltage of 1v between drain and source and so 21v to 20v will give me around 24.5v at the gate... but I think this is not what it means by Vgs.

If I understand correctly, Vgs is the voltage difference between gate and source thus for my application: 24.55-20v = 4.55v @ 2A of load current (load = 10 Ohms).

Now for a load of 1 ohm, it will be 20v/1ohm = 20 Amps which is just crazy and this will require (as you explained) around 39v of gate, so Vgs here will be 39-20 = 19v... so even this crazy situation we are still in the range of 20v (assuming my explanation is correct).

However, my supply will be 0-20v and 0-2A only! so I will put a maximum limit of 2A that is always there to make it suitable to our real world. What do you think?

I know the op-amp circuit for current measurement, and I will put a PIC MCU in the project to feed the required current limit. So the MCU will feed a continuous 2V (=2A of load current) to the op-amp comparator which has another 0-2v signal from the differential amplifier on the shunt resistor (0-2v for 0-2A) so that the maximum of 2A is the default case unless the user specified another limit. I will post a circuit soon.

As for the transistor, I put it because the op-amp alone used to oscillate for I don't know reason... plus I saw other designs using it too.

[VEGETA]

I tried to do the current measurement and limit but it didn't work. I don't know why.

[void_error]

You might want to clean that schematic up, redraw it. Not sure if you missed some connections...

[VEGETA]

I will post a new one tomorrow (I know it is messed up), but does this CC stuff work in LTSpice? can you make one to adjust current limit of a linear supply? I tried a lot tonight but no result xD.

[void_error]

Yes it does work. First thing you have to do is make sure your CV loop is stable so start there. AC analysis will be required. You might want to start reading this first.

[VEGETA]

Well, constant current source or dummy load circuit by itself worked with me before. However, in this file the voltage loop worked well and I got what I required but the CC part didn't.

I will try tonight again, but let's say it didn't work in simulation, will it work in real life?

[void_error]

Adding a CC loop is going to change the behavior of the CV loop and oscillations will start to appear when transitioning between CV and CC modes.

[Zero999]

well, for my application I need drop voltage of 1v between drain and source and so 21v to 20v will give me around 24.5v at the gate... but I think this is not what it means by Vgs.

If I understand correctly, Vgs is the voltage difference between gate and source thus for my application: 24.55-20v = 4.55v @ 2A of load current (load = 10 Ohms).

Now for a load of 1 ohm, it will be 20v/1ohm = 20 Amps which is just crazy and this will require (as you explained) around 39v of gate, so Vgs here will be 39-20 = 19v... so even this crazy situation we are still in the range of 20v (assuming my explanation is correct).

Yes, you are correct. It's the difference between the gate and source voltage which is important. However, you still need to be very careful, the maximum gate-source is never exceeded, which could easily happen as the circuit driving the MOSFET has the potential to inject >20V into the MOSFET's gate when the source is at 0V.

As for the transistor, I put it because the op-amp alone used to oscillate for I don't know reason... plus I saw other designs using it too.

That wasn't very sensible was it?

What about figuring out what the transistor does in the other designs you've mentioned? Can you post a link to them.

I will post a new one tomorrow (I know it is messed up), but does this CC stuff work in LTSpice? can you make one to adjust current limit of a linear supply? I tried a lot tonight but no result xD.

Perhaps you should concentrate on getting the constant voltage part right first? That would gain you a lot more experience with using LTSpice and circuit design.

[VEGETA]

Ok, can you post a CV CC simulation in LTSpice that works? what I understood from your posts is that there is something wrong with my CV part in the first place. However, I checked that it works.

[void_error]

Did you do an AC analysis? That usually indicates whether the loop is stable or not.

[VEGETA]

well, I restarted it from scratch and only made the CV section as you can see in the ATTACHMENTS.

no I didn't do AC analysis and quite honest I don't know it.

[VEGETA]

The voltage set opamp doesn't oscillate here but when I add diff amp for the resistor it starts to. even if it is not connected to anything.

[void_error]

Here's how you do an AC analysis:



V(out)/V(fb) is the response of the whole regulation loop.
V(g)/V(fb) is the response of the op amp
V(out)/V(g) is the response of the power stage, the MOSFET in this case

I've also attacked the LTspice .asc files for convenience.

The transient analysis clearly shows your circuit oscillates. To find out why it oscillates and how you can you fix that read the pdf I linked here.

[VEGETA]

Nice new info there! I will surely see it. However, how exactly do you know that the op-amp will oscillate? and most importantly, how do you know the solution?

I've seen a similar problem here: http://electronics.stackexchange.com/questions/92561/how-to-stabilize-a-control-loop-for-an-opamp-based-linear-regulator

[void_error]

Nice new info there! I will surely see it. However, how exactly do you know that the op-amp will oscillate? and most importantly, how do you know the solution?

First of all the MOSFET gate is a capacitive load and op-amps don't like driving capacitive loads unless specifically designed to do so. The MOSFET's input capacitance is being driven by a source (the op-amp's output) with non-zero resistance and that's a recipe for oscillation if no measures are taken to prevent that. In other words, the op-amp's output resistance will slow down the turn-on and turn-off of the MOSFET and the op-amp will end up over-compensating for the changes in the output voltage at best. Charging and discharging the gate capacitance will also need a significant amount of current which has to be sourced by the op-amp which will cause heating and if it oscillates then it might destroy the op-amp.

To get rid of the oscillation you must start by adding a resistor between the gate of the MOSFET and the output of the op-amp. Pick something in the range of 100R to 1k and you should be fine. If you redo the AC analysis you'll notice that the loop response has changed and it will still oscillate since by adding that resistor the MOSFET turns on and off even slower. To compensate for that you must add some R-C compensation networks in the loop. Hints are in the app note I linked. It focuses mainly on the LDO type regulators but the principle is the same for all closed-loop linear regulators. Read through it all the way to the bottom. The key words for stability are gain margin and phase margin.

Check out this thread, someone explained things quite nicely.

[Zero999]

The transient analysis clearly shows your circuit oscillates.

It's not surprising that circuit oscillates. It uses the OP37 which is not unity gain stable.

Before trying anything else, try changing the op-amp to something which is unity gain stable, such as the OP27.

[void_error]

Or try something with rail-to-rail inputs and output so there's no worry about input voltage range or output voltage swing. LT has a few parts that go up to 36V supply which are reasonably fast like the LT1630 or LT1678 which have around 150uV offset.

[VEGETA]

Well, I tried different op-amps and there was some difference in performance indeed. Originally I wanted to pick a cheap one like lm358 and use it for all the design because a good op-amp will be around let's say 5$ or maybe 3$.

I've seen the EEZ-Supply design using an NPN transistor to switch the mosfet which I tried in my earlier circuits (and it ended oscillations at the time) but I could not understand why they put a reverse-biased diode (BAS316) in the output of both CV op-amp and CC op-amp like the image here:




and they are using a 2.2k resistor from the output of the regulator directly to the gate which made me think it has to do with oscillation but I really couldn't figure out why (maybe I am wrong). The circuit after these 2 op-amps reaching the npn is not understandable to me.

However, their voltage and current setting and monitoring is almost like mine... so I guess my problem is I don't have what they put after the op-amps and before the npn transistor plus what is there near the mosfet itself.

Is this correct?

[void_error]

FYI the LM358 is not that good but it will work for a really cheap power supply.

I assume you are referring to D15 & D17.
But let's start with R32 first. It's used to help the Q4 turn off by discharging the gate-source capacitance.

The CV & CC loops are OR'ed together which means that if of IC6A or IC7A reach their set limit - voltage or current - their outputs will become lower and turn on (actually increase the current through) Q12 which will divert current from the base of Q7 and therefore reducing the gate-source voltage of Q4. Q12 also works as a level shifter. The diodes are there to prevent current flow between the outputs of IC6A & IC7A.

This circuit is probably a bit too complicated for your knowledge level so I think I'll draw something simpler in LTspice which works using the same principles, simulate it and post it here. I'll try to keep it as simple as possible with both CV and CC loops.

[Kleinstein]

The EEZ-Supply circuit is rather complicated for several reasons:
1) It uses separate sense inputs
2) It uses an output stage with extra voltage gain
3) It uses an MOSFET as a source follower (like the initial suggestion) - these are difficult to drive and more nonlinear at low currents

For the beginning it would be easier to use BJTs (e.g. NPN Darlington).

An important factor is also the voltage range, as this decides if the OPs voltage swing is sufficient.

[Zero999]

I don't see the need to use MOSFETs in this case. A BJT should be capable of providing a dropout voltage of 1V if the base drive voltage is higher than the output.

[VEGETA]

FYI the LM358 is not that good but it will work for a really cheap power supply.

I assume you are referring to D15 & D17.
But let's start with R32 first. It's used to help the Q4 turn off by discharging the gate-source capacitance.

The CV & CC loops are OR'ed together which means that if of IC6A or IC7A reach their set limit - voltage or current - their outputs will become lower and turn on (actually increase the current through) Q12 which will divert current from the base of Q7 and therefore reducing the gate-source voltage of Q4. Q12 also works as a level shifter. The diodes are there to prevent current flow between the outputs of IC6A & IC7A.

This circuit is probably a bit too complicated for your knowledge level so I think I'll draw something simpler in LTspice which works using the same principles, simulate it and post it here. I'll try to keep it as simple as possible with both CV and CC loops.

Ok I am waiting your circuit simulation, GREAT! I want to learn not just get something ready. If you know an online book or something good as a source to learn these stuff.

I get the idea of Dave's circuit and this eez supply is the same too but these additions are different. I did the same as dave's one but it didn't work.

looking forward to your help. thanks.

[void_error]

Did a quick google search for "linear regulator handbook" and it came up with these results:
http://microblog.routed.net/wp-content/uploads/2007/10/hb206-d.pdf
http://www.ti.com/lit/an/snva558/snva558.pdf
http://www.smcelectronics.com/DOWNLOADS/1980-VOLTREG.PDF

[VEGETA]

I will read them soon just like the previous one, also other stuff that I found. Waiting for your spice simulation.

thanks always.

[VEGETA]

I am waiting your circuit simulation that you promised xD. I am reading more stuff now but I still need a basic design to cut my way through.

I already made my decision about pre-regulator which will be a SEPIC one. I still have to figure out how to protect the 2 18650 batteries because I have an idea of making a protect each single cell alone then put them in series.

[void_error]

Here's the simplest CV/CC regulator circuit I managed to come up with. Some tweaks will still be necessary for the compensation network though.

[not1xor1]

Here's how you do an AC analysis:



V(out)/V(fb) is the response of the whole regulation loop.
V(g)/V(fb) is the response of the op amp
V(out)/V(g) is the response of the power stage, the MOSFET in this case

I've also attacked the LTspice .asc files for convenience.

The transient analysis clearly shows your circuit oscillates. To find out why it oscillates and how you can you fix that read the pdf I linked here.

Hi
I've installed ltspice just a couple of days ago
When I plot the frequency/phase response of a circuit both lines are plotted in the same colour/style, while in the image you attached the phase response is drawn in dashed-line style.
I was not able to find any option for that purpose,
pls, might you explain how did you get that nice dashed line?

thanks

[void_error]

Right click on the plot and choose reset colors, that might help.

[not1xor1]

Right click on the plot and choose reset colors, that might help.

I think the dashed line depends on the AC simulation point-per-decade parameter
when I set it to 10 points the dashes magically appear
anyway thanks

[VEGETA]

Here's the simplest CV/CC regulator circuit I managed to come up with. Some tweaks will still be necessary for the compensation network though.

well, it gives me errors because ltspice doesn't have models for some parts. If you can, please upload them too. Plus, you used an npn here, can it be safely replaced by an nmosfet (gate drive is separate 30v rail)?

I guess Q1 and Q2 are for gate drive or is it what you call (compensation network)? originally I wanted to get separate rail for nmos gate drive which is controlled by an op-amp. However, here you used the same method like EEZ supply, which is 2 reverse-biased diodes in front of the cc and cv op-amp. I wonder why it cannot be straightforward like dave's circuit. And SURELY I must get another op-amp than the expensive lt1678 ^__^.

Here is what I think:

R18 is the load itself, while the 0.1ohm R11 is a shunt resistor for current sensing (can be before the regulator itself i guess). U1+U2 for CV while U3+U4 for CC. I couldn't understand the purpose of C1+R5 (and their counter parts for CC).

When Vmonitor > Vset, U1 is low (0v) which pulls the base of the transistor low. I didn't understand the purpose of Q1+Q2 in this loop, but if they are for gate drive, it is different. Because I want a true 1v dropout so the input might be like 2v for 1v output, perhaps this will cause issues.

You are doing low-side current sensing over the 0.1R, which is simpler than high-side one in terms of op-amp usage. I guess it is x10 gain and when Imon voltage is > Iset voltage, U3 will be 0v pulling the base of the transistor to ground.

[Kleinstein]

You can get away with an even simpler version: the left most OP is not really needed.

For a cheap version the LM324/LM358 is ok for the OPs. It helps if the OPs are single supply.

C1 and R5 set the loop gain for the regulator, so there is a chance to make it stable and not oscillating. Finding the right values for these two is a major part in designing the PSU.

The current limiting is rather slow in this type of circuit - so an extra, fast current limit might be needed to survive a sudden short.

Using a MOSFET instead of the NPN output stage has two main disadvantages:
1) MOSFETs are quite slow and nonlinear at low currents. So performance would be not that good and more output capacitance is needed.
2) One needs a gate voltage that is considerably (e.g. 3-5 V) higher - so either an even larger dropout or an extra higher supply is needed. One also needs protection for the gate, if not included in the MOSFETs.

So there is not a big incentive to use a MOSFET instead of a BJT.

If you really want a MOSFET output element, I would suggest a different topology with a floating regulator and auxiliary supply. There was a thread about such a circuit (though higher voltage - but that circuit type is very flexible) about 1 week ago. https://www.eevblog.com/forum/projects/power-supply-topology-will-it-work-(control-theory-stability)/

[void_error]

Here's the simplest CV/CC regulator circuit I managed to come up with. Some tweaks will still be necessary for the compensation network though.

well, it gives me errors because ltspice doesn't have models for some parts. If you can, please upload them too. Plus, you used an npn here, can it be safely replaced by an nmosfet (gate drive is separate 30v rail)?

Right-click on the transistor and pick a new one. For Q1 & Q2 2N3906 would do, 2N3904 for Q4 and some power transistor for Q3 with Ic > 3A. I don't actually know which of the BJTs are in the standard LTspice libraries but if it makes it easier to download them here's a link http://ltwiki.org/?title=Components_Library_and_Circuits.

I guess Q1 and Q2 are for gate drive or is it what you call (compensation network)?

Q1 & Q2 along with R1 & R2 for a current source.

originally I wanted to get separate rail for nmos gate drive which is controlled by an op-amp. However, here you used the same method like EEZ supply, which is 2 reverse-biased diodes in front of the cc and cv op-amp. I wonder why it cannot be straightforward like dave's circuit. And SURELY I must get another op-amp than the expensive lt1678 ^__^.

The diodes are actually forward-biased while one of the CV/CC loops is active because the U1 & U3 are in an inverting configuration.
In other words when the output voltage increases the output of U1 goes closer to ground, pulling the base of Q4 lower, keeping the output voltage at a fixed value.

Here is what I think:

R18 is the load itself, while the 0.1ohm R11 is a shunt resistor for current sensing (can be before the regulator itself i guess). U1+U2 for CV while U3+U4 for CC. I couldn't understand the purpose of C1+R5 (and their counter parts for CC).

You got that right.
C1 & R5 are used to slow down the op amp so it doesn't oscillate, this would be the simplest description. They should be explained in the PDFs I linked earlier.

When Vmonitor > Vset, U1 is low (0v) which pulls the base of the transistor low. I didn't understand the purpose of Q1+Q2 in this loop, but if they are for gate drive, it is different. Because I want a true 1v dropout so the input might be like 2v for 1v output, perhaps this will cause issues.

You are doing low-side current sensing over the 0.1R, which is simpler than high-side one in terms of op-amp usage. I guess it is x10 gain and when Imon voltage is > Iset voltage, U3 will be 0v pulling the base of the transistor to ground.

With this circuit the dropout will be just under 3V while in regulation. If you want lower dropout you need another supply on top of +V, call it a bias supply, at least 3V higher than the output voltage. Connect the collector of Q3 to +V and Q1 emitter, R2 & Q4 collector to the bias supply.

You can get away with an even simpler version: the left most OP is not really needed.

Oops, that's a leftover from the circuit I modified (actually simplified), and yes, it can be left out for simulation purposes.

For a cheap version the LM324/LM358 is ok for the OPs. It helps if the OPs are single supply.

Yup, they'd work fine, but their offset voltage is not quite so low so the value of the current sense resistor should be increased so the voltage drop on it increases so offset voltage won't affect the accuracy. They're also slower than the LT1678 so the loop gain should be changed and they're not rail-to-rail input or output so care should be taken with its input voltage, it should be at least 2V below the supply, it's in the datasheet.

The current limiting is rather slow in this type of circuit - so an extra, fast current limit might be needed to survive a sudden short.

Left out for the sake of simplicity.

Using a MOSFET instead of the NPN output stage has two main disadvantages:
1) MOSFETs are quite slow and nonlinear at low currents. So performance would be not that good and more output capacitance is needed.
2) One needs a gate voltage that is considerably (e.g. 3-5 V) higher - so either an even larger dropout or an extra higher supply is needed. One also needs protection for the gate, if not included in the MOSFETs.

So there is not a big incentive to use a MOSFET instead of a BJT.

With a BJT as a pass element a low dropout voltage can still be achieved, around 1V, if the base of the darlington pair can be pulled above the supply voltage. In this case the minimum dropout would be around 4*0.7V which is the sum of voltage drops across the current source and the darlington pair or even less if the transistor in the current source is allowed to saturate.

[Zero999]

Right click on the plot and choose reset colors, that might help.

A bit off topic but I always find the default LTSpice palate makes plots difficult to read. Changing to a white background can help but light green can still be difficult to see. I prefer a black background with the dark colours changed to pastel shades: much easier to read.

[VEGETA]

I couldn't download your library files. but I choose the parts you described here. The problem is that most parts doesn't start the simulation, or actually it starts but never shows the plots while keep saying stuff in the status bar with "press ESC to quit). What happens?

The 1v max dropout is a must for me, actually I thought of going lower if I could. Here is what I want to achieve:

- 0-20v\0-2A supply with nice efficiency.

- power source is 2 18650 batteries! yes you read that! with the availability to connect a high power usb wall adapter (2A) for charging and sharing current.

- a good pre-regulator (SEPIC one) to keep voltage 1v above output... software controlled via a digital POT. I actually had a working simulation for it.

- nice software control like making 2v dropout when you change the voltage, then after say 2 seconds it makes it 1v (when the circuit and load are pretty stable)... so software adjusts this to keep efficiency high while dealing with dynamic loads properly.

- The main regulator is linear and it is an NMOSFET one, I will have a separate supply for the gate and the op-amps which is a little boost converter to 30v, so higher gate voltage is not a problem and no need for extra protection since the max output voltage is 20 so 30-20v = 10v which is good. Now if I choose 5v output, will it feed 30v or less (assuming npn driven by the cv cc opamps).

So the whole problem is with the linear supply part, the rest is manageable to some extent. LTSPICE is not cooperating with me here xD.

I am going to post a new circuit with an N-MOSFET soon... it worked but still not really precise when current limit works. Even voltage when I put it to 5v it outputs something like 5.01 which is pretty great!

stay tuned xD

[VEGETA]

Here is my circuit (Attached too):



I don't know if this is stable enough or accurate enough, I just saw it is not very accurate. I put a value of 1A and I get 0.999, this is so accurate really but I like to see the "1.xxx" thing

I intend to make this supply 0-20v,0-2A so a value of 2v should always be available at the op-amp but this will make it not accurate when applying 20v... so, the Vref I am gonna use is 2.048v and then I will feed the voltage op-amp with 0-2v only, not full 2.048v so that current op-amp set voltage is always higher... this is to ensure CC is always off unless you want it to.

I choose that mosfet (BSC010NE2LS) because of low Ron and low price. I need a similar one for the SEPIC pre-regulator which must be a fast mosfet. this one happens to suite both! The IRFP250N is more expensive but it offers 200v Vds which is not needed here as drop voltage will always be 1v or a little more. what do you think about that?

I made the R5=1ohm rather than 0... I wonder why it was 0? also changed the diff-amp resistor to 1k,10k because I intend to use these values a lot.

what do you think about the circuit so far? is it complete or need something else like output caps?

[salbayeng]

OK you seem to have all the bits there,  but

I intend to make this supply 0-20v,0-2A so a value of 2v should always be available at the op-amp but this will make it not accurate when applying 20v... so, the Vref I am gonna use is 2.048v and then I will feed the voltage op-amp with 0-2v only, not full 2.048v so that current op-amp set voltage is always higher... this is to ensure CC is always off unless you want it to.

this makes no sense? Each of these references will have a pot across it, and most of the time the CC pot will be set quite low.  CC or CV operation is determined by what is on the negative inputs of U3 and U1 compared to the references, the actual numerical voltage on the positive imputs doesn't matter. (The LT1678 is happy working at the negative rail?). And in reality you would just use the same reference, being able to get to 20.48v is not a drawback.

I choose that mosfet (BSC010NE2LS) because of low Ron and low price. I need a similar one for the SEPIC pre-regulator which must be a fast mosfet. this one happens to suite both! The IRFP250N is more expensive but it offers 200v Vds which is not needed here as drop voltage will always be 1v or a little more. what do you think about that?

when running in linear mode, the Rds is generally not important, but MOSFETs with higher Rds are preferred as this means the capacitance will be lower, higher voltage MOSFETS generally have higher RDS and lower capacitance, and so are generally a good choice, higher voltage devices generally have a higher threshold voltage (unhelpful) and a higher gate withstand voltage (helpful) , in your circuit you could potentially put 30v to the gate which would kill most mosfets, you should put a 10-15v zener somewhere,  eg from G-S on M1. Ideally there should be ~ 20ohm in series with the zener to prevent VHF oscillation of MI, or maybe just put a ferrite bead directly at the gate.

[/quote]

I made the R5=1ohm rather than 0... I wonder why it was 0? also changed the diff-amp resistor to 1k,10k because I intend to use these values a lot.

R5=1ohm is functionally the same as zero,  people just put these in simulators to remind themselves where they might want to fiddle with compensation.
Note also that under an output short circuit your CC loop gain will be quite high (about a 100x the CV loop)  try setting R18 to zero and check for stability, you might need to pad across R14 with a series R and C to stabilise the loop, it will also make the circuit less responsive to brief load transients. RC maybe around 1mS.

what do you think about the circuit so far? is it complete or need something else like output caps?

Bulk capacitors will probably be needed, look at where your closed loop response rolls off, if (for example) it rolls off at 1kHz,  then the capacitors need to be able to supply full load current for a bit less than a ms, figure out an acceptable droop , say 100mV,  then use I=C.dV/Dt to work out C.  for 2A , 100mV and 1mS this is 10,000uF.  That's a bit big as it will blow stuff up before CC takes over!, If possible you should aim for ~ 10uF to 470uF as output caps, so will need to get closed loop gain to 10kHz or better.  If you can't get the roll-off you will just have to tolerate a worse transient response.
Note that the ESR of your bulk capacitor affects loop stability (more is better). Also test your design in the case where a user jams a huge capacitor across the terminals ( I use 100,000uF for "bulletproof" testing)

[void_error]

Simulating a steady state condition tells you nothing about how it will perform under a variable load. Attached is an example of how you could do that.
Another issue is when you short the output as the MOSFET will see a gate-source voltage of nearly 30V for a brief period before the CC loop has the chance to react, which will kill it.

Bulk capacitors will probably be needed, look at where your closed loop response rolls off, if (for example) it rolls off at 1kHz,  then the capacitors need to be able to supply full load current for a bit less than a ms, figure out an acceptable droop , say 100mV,  then use I=C.dV/Dt to work out C.  for 2A , 100mV and 1mS this is 10,000uF.  That's a bit big as it will blow stuff up before CC takes over!, If possible you should aim for ~ 10uF to 470uF as output caps, so will need to get closed loop gain to 10kHz or better.  If you can't get the roll-off you will just have to tolerate a worse transient response.
Note that the ESR of your bulk capacitor affects loop stability (more is better). Also test your design in the case where a user jams a huge capacitor across the terminals ( I use 100,000uF for "bulletproof" testing)

The ESR of the capacitors indeed plays a big part in the response of the psu, with the ideal value of zero it looks like it will work just fine, worse results are to be expected with real capacitors.

[Kleinstein]

I have not simulated the last circuit (only the last BJT based Version), but I have some doubt it will be stable as shown. Even the BJT only version tends to oscillate at some currents and MOSFETs are rather nonlinear and thus behave more different at low and high currents. So it is even more difficult to get it stable for all currents. In general the circuit with the difference amplifier at the input can be tricky, as tolerances in the resistors could make the output resistance negative at low frequency and the circuit thus unstable with certain loads.

The BSC010NE2LS is one of the few modern FETs where they have a good (trustworthy) SOA in the DS  . However this SOA curve also shows that at this FET is not suitable for linear operation: at a 20 V DS voltage it is only specified to about 150 mA. The rather hard to cool case is also not good. This is not a surprise as it is a modern fast low voltage type.

To have a chance to get a reasonable power handling capability one should look more for old higher voltage (e.g. >=200 V) types. So a BUZ11, IRF640 or IRFP250 would be more suitable candidates.

[salbayeng]

There's another design feature I just noticed around Q4 2N3904.
If the load is connected to a battery (or a big capacitor) or maybe a load that just cycles on and off,  and you lower the setpoint, the base will get dragged to ground while the emitter is temporarily held up by the capacitance of the MOSFET (or by a zener diode I suggested earlier).
Then you will activate the internal parasitic zener in the 2N3904,  the current will be limited by the available drive of the LT1678.  Datasheets suggest it's a 6v zener? (Usually around 7v for a BJT),  If the LT1678 only sinks 30mA then it's 7x30 = 210mW in the zener so it's not going to be a problem. The LT1678 will get a bit warmer with ~ 400mW worst case , but survivable.

[VEGETA]

Here is the new modification:




New stuff as you suggested:

- changed the mosfet to BSZ100N06LS3 which is better and cheaper for this linear design as well as the switching pre-regulator.
- modified the filtering on both cv and cc op-amps.
- added a 20v zener between the gate and the source (output).

Now it is better for sure but it still get a spark when voltage changes from 0v to bigger number. It gives a spark of around 10A for the required 2A CC... However, it is > 0.5ms oscillation.

If you check it out, it is better than my explanation. 

[salbayeng]

Hi
You put the zener D3 in the wrong place.

[void_error]

Hi
You put the zener D3 in the wrong place.

I should add that its value is probably too high.

[VEGETA]

oops! maybe you are right! where should I put it? plus it is 20v which is maximum vds allowed.

You mean I should put it directly from G to S so it won't affect the discharge 1k resistor?

What about the small oscillation when changing voltage ?

[Kleinstein]

The changed MOSFET BSZ100N06LS3 is slightly better, but still not good enough. The SOA curve shown about 0.5 A at 20 V.  This is with very good cooling - so real life limits will be a little lower.
There is not much use in looking at those switching Fets. For a 50 W worst case loss something like TO220 is about the minimum size. I would even prefer a larger size (e.g. TO247 / TO218) as cooling is easier than.  The R_on is not critical - it is more that fets with a low R_on are often not that good for linear operation. So even if an IRFP250 is $1 more expensive you might safe this on the heat sink.

After fast load changes some ringing (decaying oscillation) is normal at some loads. However there should be no sustained oscillation, even if small in amplitude.

[VEGETA]

Well, starting from your last sentence... If you simulate my circuit you will see these transition and they are in less than 0.5ms only, it is perfectly regulated after that. What do you mean by "sustained" oscillation? is it like a continuous oscillation of some sort? if so, then no. It doesn't appear here.

Now for MOSFETs, I want to choose a mosfet suitable for both linear regulation and switching supply (LT3757 SEPIC regulator). And the power dissipated in the linear mosfet will be so small because it will always have 1v dropout (even lower if i could) while max current is 2A so around 2W maximum. I must get an SMD one, which will have its own smd heatsink, so 2W absolute maximum is nowhere near the 50W or so.

I still want to know what figure you are deducting these stuff from. I don't care much about R_on in this linear one, but I wanted to pick one with relatively low one for the sake of the switching controller because I want to re-use parts in this design.

One last point is that I like to use new parts (which is totally subjective) so I seek to learn about them and there will absolutely be some suitable one in there.

You haven't told me about the zener mistake xD. I think I should put it directly from the gate to the source not after the resistor.

[VEGETA]

I tried to search a while for another MOSFET assuming 20v Vds as you suggested in your reply, although I told you the dropout is 1v so Vds will always be 1v only and till now I couldn't get a clear explanation.... Anyway here are the results:

BSC900N20NS3 G
BSC360N15NS3 G
IPL60R360P6S -> this one has something like 3A @ 20v Vds which is bigger than my max of 20v\2A. Is it suitable?
IPL60R210P6 -> This one is the best of them I guess.

However, assume 1-2v maximum Vds (it will be 1v for sure), then @ 1v Vds the curves show > 10A which is so suitable. What did you mean by 20v then? If you mean like V_input=40v and V_output=20v so Vds=20v then this is totally not the case. I am designing a pre-regulator to keep it @ 1v Vds all the time. Thus, accordingly, the 30v Vds max BSC100N03MSG will work for sure.

I want an SMD MOSFET so IRFP250N won't do the job, you know any alternative?

[salbayeng]

Hi again,
The attached schematics show the correct placement of a zener, it would be 10v or 12v   ,  as the gate voltage in linear mode will be ~  3 to 4volts (depends on actual part used).
R1 is a 22R ohm resistor (or a ferrite bead) to suppress VHF oscillations in the MOSFET. You may need need this, it's the luck of the draw whether you get parasitic oscillations or not, if you parallel two or MOSFETS to spread out the heat, then you must use seperate 22R resistors. (Parrallel MOSFETs are more prone to oscillation)

--------
I've just used a simplified schematic below, with 3 choices of transistor (picked from what was already available): 

• RFD14N05L (an older style MOSFET, works well in linear mode) doesn't work well here at 5A though , (IRF730 is similar)
  
• IRLIZ44  old style with better Rds,
• and  a modern  PSMN1R4-40 1.4mR ,  suitable for switching use.

Blue is op-amp output so you can estimate effective transconductance from this . Red is the pre-regulator output at 10kHz , bigger than real life, but easier to see the effect, it also sweeps Vds down to 0.5v  .  Green is the actual output voltage.


[edit] added JPG as courtesy to other readers for zener placement [/edit]

[VEGETA]

Thanks for your generous response as always.

I adjusted the zener place like you posted earlier. I use the 1k resistor as a discharge resistor for the gate as I saw this from other places so I trusted it. Now, for the Vds being a max of 10v... I didn't know that? so I thought that putting a 20v is the best choice because it is the maximum voltage for the gate. So if it does reach 10v as a maximum, then what is the problem? or is it dangerous to reach 10v?

What is the purpose of D1 in your image? plus, is it ok to put a 0.1uF capacitor after the 1k resistor to ground?

Until now I couldn't get why some MOSFETs are "suitable for linear operation" and some are not. I know that low R_on is good for switching application because of low power drop or something... but why is it not good with linear assuming it handles huge amount of current?

Maybe you could consider what I said about the continuous 1v drop across the mosfet which makes a maximum V_ds of 1v... so I guess this is good for my application. You said (or the others) something about low gate capacitance... What is the value recommended for linear regulators? The last one I mentioned (BSC900-somthing) has quite good one (relative to the famous IRFP250N). I ask too much because I want to understand better, not just stick to what is shown online.

What I saw from your 3 schematics is that the modern mosfet is the best somehow... the op-amp is more stable with it and the output voltage too. Correct me please if I am wrong.


Originally I wanted to put a ferrite-bead after the pre-regulator but I dropped the idea. Now for the gate of the mosfet, will something like 1,1k,10k ohm work? because of parts re-usage... if it is not going to work, I will add the 22ohm to the BOM 

[salbayeng]

I adjusted the zener place like you posted earlier. I use the 1k resistor as a discharge resistor for the gate as I saw this from other places so I trusted it. Now, for the Vds being a max of 10v... I didn't know that? so I thought that putting a 20v is the best choice because it is the maximum voltage for the gate. So if it does reach 10v as a maximum, then what is the problem? or is it dangerous to reach 10v?

I presume you mean Vgs (not Vds) , the oxide on the gate is incredibly thin, and voltages above 20v will likely cause the oxide to punch through, after that the MOSFET is useless. The section where is says V_GSMAX  is titled "ABSOLUTE MAXIMUM RATINGS" you need to ensure that your design never exceeds any of these at any time, under all possible abnormal operating conditions.  With most mosfets the threshold is around 3v , to get 100uA of current at 5v it is generally completely ON, at 10v it is still completly ON, but the transition from resistive to constant current has moved up a bit, after 10v no increase in performance occurs.
The threshold voltage varies between types , typically 1.5 to 2.5 for logic level (intended for 5v operation) ,  3 to 4v for normal mosfets, intended to be driven with MOSFET drivers from a 10v supply, and then you have a few high voltage MOSFETS with Vgth from 1 to 15v  (600v to 1000v Vds). 
The image below shows the gate curves as you can see 10v is off the top of the page of fig7 , and R_DS has flatlined by 10v.
Note the V_DGR rating as well, this means if you have 30v across D - S , then you can't put more than -10v on the gate (The internal diode in the zener limits reverse voltage to 600mV)

You need to respect the V_DS rating too,  for example if you connect the MOSFET through a 1k resistor to a 50 supply it will probably comfortable sit at 45v, swing to 45v in a SMPS power supply and the MOSFET will get very hot from avalanching all the time - see the avalanche rating in millijoules.  Operating most MOSFETS , especially those above 400v, at 60% of the max rating will make them impervious to SEB (single event burnout), this is caused by neutrons that are passing through us all the time. At 60% of V_DSmax , the failure rate will be 1 in 1billion hours (a couple of centuries) , at 80% it is 10 times worse , at 100% it is 100times worse, so failure in a decade or less.

What is the purpose of D1 in your image? plus, is it ok to put a 0.1uF capacitor after the 1k resistor to ground?

By after, you mean below the 1k resistor?, this is basically the output, yep you can put a 100nF there (i.e. across R13), you might want to put some bulk capacitance there too (100uF electro) but be aware the ESR of this cap can affect loop stability.  D1 is there to stop C1 floating off when the voltage setpoint is dropped suddenly with a capacitive load, it also helps discharge the gate capacitance of Q2, and hopefully reduces overshoot, it also means the op amp may be current limiting briefly , but that won't bother it.

Until now I couldn't get why some MOSFETs are "suitable for linear operation" and some are not. I know that low R_on is good for switching application because of low power drop or something... but why is it not good with linear assuming it handles huge amount of current?

 
In theory all MOSFETs have the same behaviour model , that is determined by length to width ratio of the gate , and the device area. In practice it's more complicated.  FETS have two operating regimes - constant resistance or constant current , with the gate voltage determining which resistance or current.  To get linear type operation in a power supply you should be operating in contant current mode, as this provides inherent rejection of ripple on the incoming supply.  (In the resistance mode you basically have a resistor connecting the incoming ripple to the load).  You also need to make sure the MOSFET is operating where the small signal gain doesn't vary much with load. A big problem operating with large area (low Rds) is the drastically nonlinear capacitance variation at low V_ds , this can seriously mess with closed loop gain at 10kHz and above, which is the usual trouble region for stability. The PSMN1R4 is better than expected as regards capacitance rising abrubtly at low voltages (see figure). However it does have ~ 1nF of miller capacitance (Crss) at 1v, this miller capacitance needs to be multiplied by the voltage gain across the MOSFET, (which can be quite high with a low Rds device) even with a gain of 10, you have 10nF  effective capacitance, and the 22R resistor produces a pole at ~1MHz.

Maybe you could consider what I said about the continuous 1v drop across the mosfet which makes a maximum V_ds of 1v... so I guess this is good for my application. You said (or the others) something about low gate capacitance... What is the value recommended for linear regulators? The last one I mentioned (BSC900-something) has quite good one (relative to the famous IRFP250N). I ask too much because I want to understand better, not just stick to what is shown online.

The IRFP250N would , on first glance be a good choice for linear operation, low transconductance, easy to keep cool, but the gate capacitance, particularly miller capacitance is very bad at low voltages 2.4nF at 1v.(see figure)
The RFD14N05 is pretty good for linear operation, it has quite modest  capacitance (see figure), but the graph doesn't go down to 1v. We normally add an external 220pF miller capacitor to get nice controlled slew rate on some comms drivers.
If you want to stay with the PSMN family , randomly picking an 11mR device PSMN011-60, this is well behaved low conductance, and low capacitance  200pF at 1v (see figure) .

What I saw from your 3 schematics is that the modern mosfet is the best somehow... the op-amp is more stable with it and the output voltage too. Correct me please if I am wrong.

Don't believe everything in sim's , but it does look better than I expected. If you want to use the same device for linear and switching, maybe a PSMN4r.... (4mR )should be reasonable compromise (that's 22Amps usable current for the SMPS). It probably works as well as it does because Q1 and Q2 together act as a follower, the effective small signal impedance at the emitter is much lower than the 1k it looks like at first glance. My circuit has fairly low loop gain so that makes it more stable.

Originally I wanted to put a ferrite-bead after the pre-regulator but I dropped the idea. Now for the gate of the mosfet, will something like 1,1k,10k ohm work? because of parts re-usage... if it is not going to work, I will add the 22ohm to the BOM 

you might be getting overly restrictive on your BoM  here, 10R or 100R might be suitable.  The 100R would need a bit of checking to see it doesn't mess up the loop gain in the 10's of kilohertz.

[edit fixed up some bact to front quotes!]

[Kleinstein]

With a perfectly working switched mode pre-regulator the requirements for the FET in the linear regulator are not so high anymore. It depends on the performance of the regulator. Worst case voltage will be higher than 1 V, at least for a short time (e.g. to discharge the output capacitance of the SMPS). I Assumes pure linear regulation and not a reliable working pre-regulator. In this case SMT FETs are possible so no more need far a large case.

Still the SOA should allow for enough power to safely discharge the output capacitance and maybe other glitches. So I would not go for the very low V_DS rating to have a little reserve for nasty loads (e.g. jumping between CC and CV mode rather fast). So finding one FET to be used in the SMPS and the linear stage is a kind of compromise: efficiency of the SMPS versus reliability of the linear stage.

Still I would avoid the very new types for the linear more as much of the development is towards low R_on from a small die and with small input capacitance, like what is needed for switching. But linear operation would like a large die to get better cooling and a little more R_on from the substrate to get better current distribution. So the new types are often to much optimized for switching only, as they tend to reduce the not actively used die area. The BSZ100N06LS3 shows the faster drop in the SOA curve at only 2.5 V - so it starts to get unstable at such a low voltage. With increasing temperature this would even shift lower.

The PSMN1R4 looks like being about a suitable compromise from the technology point (e.g right age and voltage) but it is too large (R_on to low, C_gate to large). So for just the switcher quite some loss from the driver and for the linear stage the large capacitance make it slow (or would need an even lower discharge cap). I would look for something of maybe 5 times the R_on but same family.  Even if SMT keep an eye on cooling, as good cooling helps linear operation but does not hurt switching.

[VEGETA]

@Kleinstein

what about this mosfet: http://www.infineon.com/dgdl/Infineon-BSZ900N20NS3-DS-v02_02-en.pdf?fileId=db3a30432ad629a6012b15f1be561a9b

it has 90mR R_on which is even bigger than IRFP250N and it has lower capacitance (C_in=~600pF, C_out=~50pF)... it is optimized for switching applications but according to your post it sounds very good for linear mode (V-ds=200). I like the new MOSFETs and willing to use one of them if possible (SMD is a must too).

The BSZ100N06LS3 shows the faster drop in the SOA curve at only 2.5 V - so it starts to get unstable at such a low voltage.

where did you see this?

[ZeTeX]

In my power supply I've used 2SC5200. it is a common old NPN transistor that is suitable for linear operation and has a true SOA curve. it is expensive and overkill probably but will probably work very good for you PSU.

[VEGETA]

In my power supply I've used 2SC5200. it is a common old mosfet that is suitable for linear operation and has a true SOA curve. it is expensive and overkill probably but will probably work very good for you PSU.

What is that makes it suitable for linear application? high output capacitance? Is the one I linked in the previous post suitable in your opinion? being an SMD package is a must for me, that is another reason for not getting old mosfets.

[ZeTeX]

In my power supply I've used 2SC5200. it is a common old mosfet that is suitable for linear operation and has a true SOA curve. it is expensive and overkill probably but will probably work very good for you PSU.

What is that makes it suitable for linear application? high output capacitance? Is the one I linked in the previous post suitable in your opinion? being an SMD package is a must for me, that is another reason for not getting old mosfets.

My mistake, it is a NPN tranny and not MOSFET..
it has a SOA curve, its old, robust and made for linear opreation.

[salbayeng]

Are you still planning on using 2 x 18650 cells,  most aren't rated for the 5A (or more) required to generate 20v/2A.
see http://www.candlepowerforums.com/vb/showthread.php?308451-18650-battery-test-with-capacity-curves-for-many-cells
At full power you will get maybe 10minutes operation.

A better choice might be a 3 cell pack of LiFePO4 cells, they are more tolerant of over/under discharge, and are much better at higher current.

Also have you considered power dissipation issues?, the schottky diode in the SEPIC will be dissipating 1W so it will need 20mm sq of PCB as a heatsink.  The linear MOSFET  will be dissipating 2W , and the LFPAK56 package is rated at only Rtheta =40K/W with 25mm x 25mm heatsink(approx 1sq inch of 2oz copper) if you sink thermal vias through and use 2oz copper you can probably get that down to 30K/W
, so you will probably need 2 x MOSFETs.

The BSZ900 is unsuitable for the SEPIC stage , but it's also in a  tiny package which doesn't help heat transfer for the linear stage, it's Rtheta is 60K/W on 20mmx30mm. (approx 1sq inch of 2oz copper) .
 

[Kleinstein]

In the SOA diagram there are several different limits to the permissible current at a given voltage:
At low voltages it is just R_On  -this is where the curve goes up.
In an intermediate range there is usually a power limit, that is curves of constant power, thus permissible current proportional to 1/Voltage. This is the range for linear operation. At some point there will usually be a cross obver to a steeper curve (like 1/V² as an appoximation) - this is a kind of local stability limit, similar to second break-down. Here linear operation is right at the border and higher temperatures will shift the curve to lower voltages. So it is a good idea not to go to close to that limit.  For the modern BSZ... FETs there is only a minute 1/V range in the DC curve. So cross over is somewhere in the 2,5 - 10 V range, depending on the U_DS rating. So even with a 200 V DS rating the BSZ900 is not really suited for linear operation, as it is a too new type with a tiny die. You would be better of with a larger die (older) 100 V type instead - this can give a btter combination of power handling / capacitance. So maybe an IRL530 or similar - still SMD but better to cool. No DC SOA curve, but still better than one that shows poor data.

Just as a word of caution: in quite some datasheets the region of steeper decay is ignored - they missed it or did not measure that extra limit. So with an SOA curve without that extra break, it could be either a very robust fet suitable for linear operation or just a wrong SOA diagram ignoring the extra limits.

[Zero999]

I've just read through this thread again. Back to the original question:

Hello,

I want to make a linear lab supply that is using a MOSFET (no LT3081 or any similar) which should have a switching pre-regulator before it to make the voltage 1v more in the input at all times to have more efficiency.

Can't you just have a large filter after the switching regulator?

The supply rejection of op-amps and linear regulators decreases, with increasing frequency. Take the LT1678 for example. At low frequencies, it has a power supply rejection of over 120dB but at 100kHz it's just above 30dB and at 3MHz (there will be harmonics of the switching frequency in this range) it will be near zero. The graph on the data sheet could even be optimistic. It will be worse, when the op-amp's output is nearer the supply rail and when the gain is high. At even higher frequencies, the noise one the power supply rail could even get amplified and passed to the op-amps output, making it much worse. Even if you do opt for a linear regulator you need some kind of filter, otherwise you'll be disappointed.


http://www.linear.com/docs/2537

[Kleinstein]

One usually needs both a filter and a linear regulator stage. The filter reduces the higher frequencies, like harmonics of the switching frequency and the really fast ringing. But as a downside they also introduces errors (e.g. DC drop) and slow down step response.

The linear stage is not only reducing the main ripple part, but it also give a much better step response compared to a typical switched mode regulator.

Using MOSFETs in parallel for the linear stage is tricky, as current sharing is not good with MOSFETs. So if possible I would really stay with one MOSFET, if if this means using a large case - up to maybe TO247 or TO3. For power dissipation a 1 V drop is rather optimistic - under worst case conditions with dynamic load there will be more loss, as the SMPS can not follow that close.

[VEGETA]

Ok, I will ditch the new BSZ family for linear operation and stick to good ones... I need one that is SMD (preferable new but not a must anymore), this is a must. I originally planned to put an SMD heatsink for the shotky, switching mosfet, linear mosfet along with putting large copper in the pcb for it.

Well, I never heard of battery heatsink for embedded devices\boards. I guess it is easy to make the copper big enough under it for the + and - pad, if that is the good solution.

Now the interested part is the current capability. I want only 2A maximum which is good for 2 cells if the user is aware a bit... I mean, 2A is just too much for electronics as full time usage! plus, I intend to have a 12v\2A wall adapter as a charger which can be connected even during usage. This will charge the cells @ 1A while they are providing current which is good enough in my opinion. So if you consume 0.5A and you charge with 1A then it is perfect to you. Who needs continuous 2A of a small power supply? If you do, then you know what to buy.

Anyway, someone mentioned the need for 5A to supply 2A, is this "switching current"? you know it is gonna be averaged to the full load current of 2A so the question is not if the batteries can maintain 5A of current for the whole duration but if they can actually provide it or not. They can provide 5A for short periods (necessary to 2A = gonna output 0A along with it) right?

I wanted a rechargeable power supply (not high power). So 18650 is suitable because they are famous and available to all plus good enough and always getting better.

One solution is to get like 8 NiM batteries but they are low current. Or maybe 4 18650 which either all of them in series or 2 series and 2 parallel... but I already have problem with protection circuit which I found a simple solution of getting a protection circuit for each single battery then attach them the way I want... to be like already protected batteries.

I don't know if 2 series and 2 parallel is gonna be  good and safe... I really don't. If this is the solution to the problem, I will consider it.

All I know is this:

1 cell is 4.2v\3000mAH (approx)
2 series = 8.4v\3AH
2 parallel = 4.2v\6AH
2s+2p = 8.4v\6AH (perfect for this design).

Now if the 2 series batteries will give AH the same as 1 cell, what is the gain? I already have a SEPIC converter to manipulate voltage. I don't know the answer to this question, what is the benefit of 2 series batteries if they will give the same current?

Again, if connecting 2 series and 2 parallel is a good solution, I will do whatever is allowed to make if fit... one problem is whether my explained protection technique gonna work or not.

As for the pre-regulator, I don't need it to be fast enough because MCU will trigger it. I plan to make the software give 2v dropout until the user sets for his output, then make it 1v or something. So having a big filtering caps (say 200uf) is not an issue. I can waste 10ms.

[Zero999]

One usually needs both a filter and a linear regulator stage. The filter reduces the higher frequencies, like harmonics of the switching frequency and the really fast ringing. But as a downside they also introduces errors (e.g. DC drop) and slow down step response.

The linear stage is not only reducing the main ripple part, but it also give a much better step response compared to a typical switched mode regulator.

The extra errors can be minimised by selecting chokes with a very low ESR. A huge capacitor on the output can be used to give a good step response.

Don't forget he only needs 2A of output current, so a filter with a low enough DC resistance to drop under 50mV at full load is fairly straightforward to design.

I suggest he tries a filter and if it's still not good enough, add a linear regulator.

[VEGETA]

Hero:

The main requirement for my design is to linear. I originally thought of using a rail-to-rail buck converter from LT to give the needed power but I changed it to this because simple, this is what I want as a requirement.

Please read my previous post response above, you might be able to answer some questions. thanks!

[Zero999]

Hero:

The main requirement for my design is to linear. I originally thought of using a rail-to-rail buck converter from LT to give the needed power but I changed it to this because simple, this is what I want as a requirement.

Well you already have a SEPIC converter which is an SMPS. Presumably you want to go down to 0V and your current SMPS doesn't support that?

Please read my previous post response above, you might be able to answer some questions. thanks!

Whether it's better to connect the batteries in series or parallel depends on the efficiency of your SEPIC converter and the minimum/maximum operating voltages.

[VEGETA]

the SEPIC is LT3757 which doesn't go to 0v and still linear supply stage is a must for very clean output.

As for the efficiency is >90% for both 8v input and 16v input... However, people here mentioned the need for 5A to get the 2A output current, thus I considered putting 2 in series and 2 in parallel to get 8.4v\6AH pack which is capable to deliver 2A for longer period of time (Which is a critical advantage for this application) and can give the supposed 5A needed current (I assume it is the switching current?).

My question was is it good to connect them in this parallel\series configuration? what about protection? I already explained my way of protection which is making a protection circuit for each single cell, then they become like protected cells which can be used directly.

This is the protection IC: http://www.diodes.com/_files/datasheets/AP9211.pdf

The original speech was on picking a suitable SMD mosfet for the linear supply which is also suitable for switching stage, for getting one part for the 2 stages. If this is just impossible, then it is ok to get 2 different ones. However, I'd like to learn and try before surrendering my choice.

These are some of the mentioned mosfets plus my own picks:

http://www.digikey.com/product-detail/en/nxp-usa-inc/PSMN4R8-100BSEJ/568-10258-1-ND/4031805

http://www.digikey.com/product-detail/en/infineon-technologies/IRFR24N15DTRPBF/IRFR24N15DTRPBFCT-ND/2441041

http://www.infineon.com/cms/en/product/power/power-mosfet/20v-300v-n-channel-power-mosfet/120v-300v-n-channel-power-mosfet/BSZ900N20NS3+G/productType.html?productType=db3a30442af58bfd012b10cceda61a2e

RFD14N05

http://www.digikey.com/product-detail/en/infineon-technologies/IRL530NSTRLPBF/IRL530NSTRLPBFCT-ND/1769901

[Kleinstein]

To reduce the peak current load om the input side, there is still the option to have specs that reduce the maximum current at high voltages. This is common with switched mode supplies. So have 2 A up to 12 V and than keep the 24 W power limit so that it will be 1.2 A max at 20 V.

Using 2 cells in parallel is a way to get higher capacity and higher current capability with the same cell size. So you are flexible in the mechanical shape and 2 18650 cells are usually cheaper than one of double capacity. With cells in parallel, there usually is no need for individual protection. Even with cells in series one usually can get away with just one protection. 4.2 V per cell is the peak voltage - during discharge this goes down to about 3 V. So 2 cells is more like 6-8.4 V, not 8.4 V. At 6 V input the current will have to go even beyond 5 A to give 40 W of output.

For the switching part the 30 V BSZ part should be OK. For the list of FETs the first one looks too large. The IRFR24N15 might be about right for the linear part - though the datasheet is missing a DC SOA curve. So it might work but the DS just is missing the critical part to definitely say it is ok. I would prefer a type that could withstand a failure in the switched mode stage, so it can stand the something like 8.4 V and 2 A DC.

The regulation circuit still needs some attention: the capacitor right after the MOSFET to GND is not a good idea. This should be just in parallel to the load, so  go the upper side of the shunt. Also the difference amplifier will need a kind of adjustment to make sure the DC output resistance will be positive (or at least not to negative).

[VEGETA]

@Kleinstein

I want to give 2A at full voltage so I am open to use 4 li-ion cells if it is a must. However, does my individual protection technique works for the 2series\2parallel configuration? I guess there is no other option. However, charging them with my charger IC @ 1A will be slow but having something like 8.4v\8AH pack is just too perfect.

You said something about one protection, is it just the 8.4v limit? because if I have 2 series and 2 parallel config, I will have 8.4v max no matter what happens. Should I get an IC to monitor the full pack for 8.4v or go for the individual protection?

About the output capacitor, I will connect it between the load but will only ceramic work? like putting 4 10uF ceramic caps in parallel. I hate to use big elec caps but I guess I am forced to use them in the switching stage.

[Kleinstein]

For the output capacitance of the linear stage, only ceramic caps could be a problem. They have very low ESR and thus don't provide damping. It may work if one of the caps has a series resistance (e.g. 0.1 - 0.5 Ohms range). Still a low ESR Al electrolytic is usually easier. Usually one wants a combination of some capacitance with low ESR (like 1-10 µF ceramic) and some with ESR (e.g. 100 µF low ESR electrolytic). The best size depends on the rest of the circuit: a slow regulation needs more capacitance. The current limiting shown below is rather slow anyway - so besides the physical capacitance, on transition to CC mode the supply will behave like having something like an extra 1000 µF or so anyway. So minimizing the capacitance would need a different circuit.

For the switched mode stage one might used only ceramics, but they also get quite large in volume / price, as one might need 50 V types, as the capacitance is reduced at relatively high voltage used. So electrolytic ones are still not such a bad option.

For the protection one could get away with just checking the full 6-8.4 V voltage - especially of one stays away from the extremes, which also allows for more cycles. One could also check both voltages separate - so 2 protection circuits, but no use for 4.

[VEGETA]

what do you mean by both voltages and 2 protection circuits? if you mean just monitoring the full pack voltage, then there are lots of ICs to do it but they involve using a fuse which is unwanted... I just want on off stuff. What IC do you think your suggestion fits?

Ok, so putting 100uF elec cap(polarized cap) plus 2 10uF ceramics on the linear output between the load only not including the shunt resistor right? and putting 2 100uF elec caps with some 10uF ceramics on the switching stage too.

I do want the transition to CC to be faster but if I removed the caps on the op-amps it won't be stable.

Any suggestions for smd mosfets to be used on both stages?

[VEGETA]

I've put a thought into this and reached to a conclusion that using IRFP250N is the safest option. Although I went for full SMD design, but I will most certainly do some manual wiring and harness. So why not just add one simple through-hole IC?! The harness is to connect the front and rear panels to the main board.

So, for a maximum of say 2W dissipation (1v drop * 2A max current), I thought of using one of these:

http://www.digikey.com/product-detail/en/advanced-thermal-solutions-inc/ATS-PCB1047/ATS2089-ND/5030467
http://www.digikey.com/product-detail/en/wakefield-vette/657-15ABPE/345-1220-ND/5068322

My housing is going to be small, like maximum height of 5 or 6 cm so I've gotta choose which one is the best. The smallest it is, the better.

Now for getting IRFP250N and the heatsink, I guess Chinese sources on Aliexpress is a good choice?

[Kleinstein]

For MOSFETs and similar more common parts aliexpress is a good source for fakes.  Depending on the power needed you could get away with a smaller old part (e.g. BUZ10, IRFP240) as well if costs are really critical. At least for more low cost parts there is a chance to get real ones if you don't go for the lowest price offers. Still do a quick test to check if they are real, or at least working well under power conditions. Normally I would prefer a more reliable source like an official distributor for semiconductors - however could be expensive in some countries.

If possible I would avoid loose cables - they can add hard to control parasitic inductance. At least keep them short and all three wires close together (e.g flat cable).

For cooling, I would consider mounting the FET to the case.

Keep in mind the gate drive may need something like 5 V higher than the output - so a second supply is essentially needed. The circuit also still needs to be optimized / adjusted. The plans shown in this thread are not yet ready and still prone to oscillations or other problems (like may not survive a sudden short).

[VEGETA]

I think I am fine with IRFP250N, Digikey offers it with 2$ or so. Aliexpress can give like 0.5$ per part if you bought 10 or more (I will test these too).

For cooling, the case is plastic or ABS so it won't do it. These 2 heatsinks are like 1.5$ so won't be a big problem.

xD, you understood me wrong! I don't want to wire the mosfet... I meant, since I am doing wiring between boards, why not get a through hole mosfet?! I wanted all-smd because of there was no need for manual work. Now, since manual work is a must, it is ok to pick through hole parts. The MOSFET will certainly be soldered hard xD. Now from the board to the output connector, of course there will be 2 wires because it is how it is done.

As for gate drive, I will put a 30v boost especially for the op-amps and the gate drive transistor. Now it can supply the needed voltage. BTW, this thing exist in the circuit already.

Oscillations... well, I put a short circuit on the output but it didn't oscillate, instead it produced a spark of 14A then went down to 2.2A which is set there. I used the "load1" and "load2" LTSPICE models to make loads like 10A or 50A but they do something that messes up the circuit.

They make the OUT+ less than OUT- which messes up the circuit... So does this mean I must make some reverse polarity protection circuit?

[Kleinstein]

The rather big sparc an a short is due to the relatively slow working current regulation. This is one drawback of this topology. It is relatively hard to get around that, though it could likely get better, e.g. with an faster acting fixed current Limit at about 3 A.

Some kind of reverse polarity protection is a good idea. The main case where it is needed is, if two supplies in series are used and the current limit is reached. Just current limit on the weaker one will not prevent the voltage to turn negative. The simple way is just a diode - though you might still get a negative -600 mV, but most circuits can survive that.

Heat sinks inside a plastic case have a somewhat limited performance. It might be OK with the preregulator and thus low power loss. It might be a good idea to have an over-temperature cut out.

[VEGETA]

I attached a new circuit showing a load that is 10R then suddenly shorted, however a 3A constant current limit is there... It actually worked! xD. It is not really a perfect circuit but I used the 2n2222 npn to switch the short circuit load off and on, thus it won't be perfect.

My aim is to put 2.048A current limit that is always on unless the user wants less. I want to do that by software of course.

Is there any oscillation or something else left to counter? I will think about reverse protection later, right now it is only one diode between OUT+ and OUT- (not ground), and while it is like this then I might put the output capacitance between these 2 terminals. However, is this gonna affect the circuit if I used elec_caps? or should I put elec+ceramic caps from OUT+ to ground?

As for heatsink, maybe it is enough to use this heatsink.

[Kleinstein]

The circuit is net yet ready at all - it is more like just a crude idea 99% still to do.

The output capacitance is missing (C2 going to GND is doing more bad than good). Changing that to 100 µF+0.5Ohms and 100 nF to Out- this at least makes the simulation to run through. Still the response is rather sluggish and stability is questionable.

For the simulation the load should be the spice element of current sink instead of a transistor. Its easier, more flexible and more powerful. 

[VEGETA]

Ok, what is left to be done in your opinion? so I can do some research to achieve it.

Output capacitance is fundamental thus I didn't put them yet to make simulation easier. C2 is for zener and gate, didn't think of it as output caps. What bad things will it do?

So putting 100uF elec cap with say 1R series res along with 0.1uF ceramic from out+ to out- is the best thing to do? this is what originally I wanted to do after listening to people.

I still don't understand where do the problems come from and how do I know them and solve them. You talked about this circuit is not ready and it still need 99% to be done... My only guess was that all is left is output caps and reverse protection. if there are more stuff, I am willing to learn.

well the transistor is not the true load there but I tried the current source and load but never worked properly as they made the voltage go negative

[Kleinstein]

One Problem is that the current limiting will need quite some time to react. When not active the OP for current limiting is all the way up to the positive limit and needs quite some time to come down: at least limited by the slew rate of the OP, but additionally limited by the capacitors in feedback. The rather slow discharging of the gate is a problem - with around 3 nF of the IRFP250 and 1 K this alone is around 3 µs of delay. So a first  step would be either a smaller resistor or maybe an extra PNP transistor to speed up turning the FET off as well.

Usually one adds a second, faster type of less accurate current limiting - like a resistor at the source side and a transistor to turn down the gate voltage fast. The source resistor also helps to limit the effective trans-conductance. So at high currents the resistor limits the effect of raising gate voltage. This makes the output stage less nonlinear.
Before looking at the loops one might want to check the performance of the output stage alone. So check how fast they are able to change the output current, when driving a low impedance load. Also the open loop output impedance is important - add output caps to make the output impedance well behaved (e.g. less than 90 deg of phase shift). Also check sensitivity to input ripple - the current circuit version is not good in that respect with the rather high capacitance IRFP250.

Than one has to look at the control loops, usually one at a time. One might also want to check if the cross over could be made faster. One way to do this is having the capacitors for Feedback from behind the diodes and not from before. This is somewhat similar to a simple kind of anti windup in a classical PID regulator.

For the voltage loop, the difference amplifier for sensing is somewhat tricky. One has to make sure the common mode amplification is not to the wrong side. For example a slightly to low value for R8 would cause a negative output resistance and thus instability in some cases. So the circuit might need adjustment for the output resistance to get a small, but positive value. The OPs choosen so far in the simulation are rather expensive, high quality ones. If lower speed OPs are used one might have to include that. A slow OP for the difference stage might cause troublesome phase shifts. So the capacitor to slow that stage down a little might already cause trouble.
For optimizing the loop one should use a current sink as a load. It work OK, unless the current limit is reached - a diode across the outputs would limit the negative voltage so that CC-CV transitions could be checked too. Looking at the AC response to a current sink as load give directly the output impedance and thus gives an easy check for possible trouble with certain capacitive loads.  Adjusting C1 and a resistor in series to C1 should give a first approximation that could work with easy load cases, that is avoiding load with high capacitance.

Likely there will be however purely inductive behavior for frequencies of below something like 100 Hz. In case of an extreme capacitive load (like a low ERS cap in the mF range), this would cause excessive ringing. Avoiding this would need an extra step of compensation adding phase lead and than another round of adjusting the compensation.  One has to test the loop with different DC currents and find a compromise that works in all cases. Usually something like 3 currents like 1 mA, 100 mA and 2 A should be enough. One a stable version is found one should also check transient response. With caps / delay at the wrong place one could end up with a good AC curve but still poor transient response.

The next steps are than the CC mode and finally the cross over response. As these interact with each other, it might be a good idea to first only use a more crude adjustment, than check if cross over is ok and only than do fine tuning at the end.
The CC mode loop is usually a little easier than CV, as the performance is anyway limited by output capacitance. So the adjustment could be more for good cross over than high output impedance. Depending on the required performance one might need more detailed anti-windup to get a fast cross over and little overshoot.

[VEGETA]

I am not sure I understood everything, but is there a book or something to help me understand? I will try to respond according to my understanding:

1- current limit:

Originally I used Dave's circuit of a transistor that pulls the base to ground, but the CV i guess was unstable. So you think this is gonna be faster and reliable?

the circuit works by the op-amps going to ground to activate the CV or CC stage, while dave's circuit is the opposite where the op-amp goes positive to do so. Since the final job is the same, what is the benefit here?

2- faster response:

I read that cc is too slow, why? is it because of filtering caps on the op-amps? these caps are necessary for stability as you know. removing them will cause problems of oscillation.

3-  gate resistors:

there is 22R and 1K. the 22r is for filtering (instead of ferrite bead) while the 1k is to discharge the gate as I read in eez-supply. I removed the capacitor from the zener to ground.

changing the 1k to 100 worked too while removing the cap didn't do anything so I guess it is better.

changing R3 to 1k from 10k worked well and also removing the other shunt filter made simulation faster (dunno about response). Here I am sure that my very first circuit had a stability problem in the CV loop itself, thus CC didn't work.

4- I connected the feedback caps before the diodes as you suggested.

I attached the circuit... If you can demonstrate an enhancement to it, I would be grateful!!!!

thanks!

[Kleinstein]

I did a few modifications to the circuit (circuit attached): The fet is changes to the smaller IRFP240 to get less ripple due to smaller capacitance.

The CC loop is not really optimized (only a few steps from transient). One might get away without the extra OP on the left. However it might be useful for measurement anyway. The CV loop is not yet checked for small currents so this might need a slower seting. A critical current would be something like 7 mA - just a little more than the current trough R2.

[VEGETA]

Thanks.

1- what is the purpose of R19 and Q1? there is already a shunt res and if you put this R19 then there is no need for the low-side sensing.

2- C2 and C18 from the mosfet gate to out-? I know that node is connected to the out+ but still...

3- it remains a wonder how you could pick the values for cc and cv caps and resistors...! especially odd values like R8 of 10.002k.

4- D4 is somehow understandable, preventing reverse voltage?

5- What is the purpose of R5?

what is left to do after this?

thanks!!!

[Kleinstein]

The circuit still needs a test and maybe adjustments at low currents (e.g. 10 mA range), both for CC and CV mode. Large transients also need testing (e.g. 2 A - 2 mA) - in rare cases these can cause (rather nasty - hard to calculate) oscillation. Also the CC-CV transitions should also be tested for a few more points.

The capacitors C8 and C2 are across the load. It is drawn a little strange, but it is not from the gate.

D4 has a dual purpose: it prevent to much reverse voltage for the transistors BE junction and it helps to discharge the output capacitor if needed (large transients). 

R5 is just a leftover - part of the load.

R19 and Q1 are a kind of emergency current limit (about 6A). With a good CV -CC crossover (capacitor from behind the diodes) Q1 might not be needed. R19 also helps with stability as it limits the "gain" of the FET at high currents. One might get away without it, it helped to get the first version running.

The funny value for R8 is there to show / check sensitivity on tolerances. In real life this might need a kind of trimmer to be sure to be somewhere in the 10K-10.005 K range (assuming the other resistors are accurate). It is adjusting the DC output resistance.

The capacitors for compensation of the CV modeare chosen iterative from the AC output impedance. R20 a little larger than R23 and so that R20*C4 is about R23*C11 to avoid another time constant. C1 started larger and was reduced until the curve looked good. The Transient response turned out to be ok from the beginning (as I new what the output impedance about has to look like).

[VEGETA]

Hi,

The attached file doesn't finish simulation unless I keep pressing ESC to view the results. Plus, you seem to use the "AC analysis" tab which I still don't know about it much other that bode plots of output vs feedback for each loop to check for zeros and poles. Perhaps this is how you picked the values for feedback resistors and caps? my concern is parts consolidation which is like using 1nf or something a lot rather than odd values that are used once for one thing. Is that possible in your circuit?

* transients:

Hmm is this by just transient response alone? like watching the time needed to switch between CC and CV? what danger does low currents do to this circuit? my guess is that CC will be pulling the output mosfet down a lot to achieve low currents... which might be bad for CV part as you said. Is this correct?

* Testing:

right now I don't have any of these parts, especially the mosfet and the npn controlling its gate. You choose 240p rather than 250p so I dunno if the bigger cap 250p will work nice or not, since it is more available i guess.

One bad thing is the op-amps! too expensive and won't be available unless you get them from digikey or any other official distro. I wanna choose other cheaper op-amps but I fear that the circuit will not work after all these efforts. EEZ-Supply uses TL07 op-amps but they have no LTSPICE models!

* extra current limit:

is this the same one as this image (eez-supply):

well, now I will use another 10 resistors (1 ohm value) to get this shunt res, let alone the switching regulator which must have it's own shunt res as well xD. 30 smd resistors are dirt cheap but takes place... lots of space xD. This is not a big problem though.

* "With a good CV -CC crossover (capacitor from behind the diodes)"

??

* "The capacitors for compensation of the CV modeare chosen iterative from the AC output impedance. R20 a little larger than R23 and so that R20*C4 is about R23*C11 to avoid another time constant."

You got all that from the AC analysis or what exactly (same as my first paragraph)?

if this will be a final circuit, then why not choose the values of R20,R23,C4,C11 to be the same since it is the same gain? is the reason for differing them that the value of R8 and R9 is not the same?

* "C1 started larger and was reduced until the curve looked good. The Transient response turned out to be ok from the beginning (as I new what the output impedance about has to look like)"

you mean the response time vs stability? bigger caps = more stable + longer time?

the stuff about knowing output impedance and curves is related to the AC thing I asked about so I won't repeat the question xD.

___

I learned that I must do AC analysis for all loops whenever I do stuff... to make sure I know what to do. this thing is new to me really, so it will be hard to learn... I just need to know what to do so I can know what should I learn.

always thanks for responding... always!

[Kleinstein]

The problem of the simulation sometimes not finishing / e.g. not really starting seems to be a little linked to the OP models. If this is a problem one could do the simulations with the universal model. This not as accurate, but usually good enough. One can there also adjust to being similar to any other OP. The difficulty in choosing a different OP could be that the circuit would need a single supply capable OP. So a TL07x would need a negative supply (e.g. -4 V). Speed wise the TL07x would be good enough, just drift could be a little on the high side for current sensing.

The AC response curve can help a lot. AC and transient simulations  are different ways of looking at stability. Some problems are more visible in the transient simulation and others are more visible in the AC simulation. I did the adjustment from the AC simulation. The transient simulation is than only a test to make sure there is no hidden problem that was not visible in AC mode.

The advantage of using the AC simulation is that one can directly see the output impedance and from that see if there is instability with any capacitive (or other) load impedance. In transient mode one would have to check with different output caps.

Also checking with low currents can be important, because the output stage gets slower at low current. So it is unlikely to have instability at intermediate currents if stability is good at high and low currents. Some circuits add an extra current sink to avoid the very low currents.

One could consolidate the BOM a little. The loop adjustment is not that critical / accurate (more like a factor of 2 in tolerance, except for the differential input)  and there are a few free points where the total gain is adjusted (e.g. resistor to neg. input). With the differential input stage one could get away with 2 of the same capacitor (e.g. 5 nF or 10 nF), but I have not really tested it. The resistors R20/R23 should be a little different, even with identical R8 / R9. The difference helps with stability and R20>R23 (even only a little, like with R8/R9) could cause trouble. The two points are somewhat related: R8/R9 are for the very low frequencies (< 10 Hz) and R20/R23 are for the higher frequencies (e.g. > 1 kHz).

The larger IRFP250 should also work. It might need a little lower discharge resistor and could have not that good PSRR. So ripple could come through stronger. So a smaller FET is somewhat attractive.

If the CC/CV cross over works really good one can get away without the extra current limit. In that case the gate/source zener should be chosen a little lower (e.g. 6-8 V), just in case. In my simulations the CC mode was fast enough, so the extra limit will not get activated.

[VEGETA]

Now, how to do ac simulation for each loop? or is it for the whole circuit?

You mentioned that R20>R23 can cause trouble while you actually put them like that xD. I prefer at least R8/9 be the same while also the caps be the same like 10n which could be used elsewhere like in the CC and CV comp caps.

I would need a rail-to-rail op amp to be cheaper than the one used here, but some of them are good but have one drawback which is bandwidth speed. like having 750k which is a lot less than say 2MEG typical opamp... dunno if this is an issue and also how to know for sure.

[Kleinstein]

For AC simulation the DC load current determines which loop is active at those settings. So it is either the CC or CV loop, but usually not both at the same time. One can run it with the whole circuit, or already start with a CV simulation before adding the CC circuit part. Ideally one should check the output stage alone first (with reduced circuit) - it turned out good in the simulation.

R20 should be larger (or equal) than R23 - sorry, for that. Just tolerance in the wrong direction could already cause trouble. So it is better to start with slightly different values and it helps to have the difference.

The OPs don't need to be rail to rail. Single supply should be good enough. For the voltage sense circuit, there is the option to use a slightly different circuit: instead of the differential amplifier for the sensed voltage one could use it for the reference voltage. This way one could get away with a less critical OP here (even an LM358 might work). It also depends on how the set voltage is generated.

The amplifier for the shunt should be reasonable quality (e.g. offset and relatively fast). One could get away without that OP altogether and directly go to the regulator OP.  Measurement could use a slower OP. Some ADC can directly measure at the shunt with still good accuracy.  Depending on the required performance the OPs should be reasonable fast - 1 MHz GBW is about the minimum, though I have seen similar circuits with just an LM358/LM324 (though using a BJT output stage). A really slow OP might need the extra current limiting.

[VEGETA]

So I can switch U1 and U3 with lm324 or the famous lm358? I can not find ltspice models for them, even tl07! the tl07 I got files for it and when i put them where they pointed out, it still didn't work and couldn't even select it.

For current measurement, since it is ground referenced (= 0v) I thought of removing the current amplifier and put it directly to the CC opamp but still I needed a way to make it x10 gain thus keeping it is ok too.

However, for voltage measurement, how about a simple voltage divider with /10 ratio and 0.1% resistors? max voltage of 20v = 2v from divider... but still it is not referenced to ground (0v) but for the out- terminal.. here I think a simple op-amp will do the job right?

the most important thing is to have an ltspice models for them to test them out.

can you point out how u did the ac analysis for this circuit? I need to spend the hole holiday to pick proper values for nearly everything to make a final circuit if possible.

thanks

[Kleinstein]

For the simulations one can just use the universal OP and set the parameters like GBW and slew rate accordingly. This way one could also test how fast the OP should be and look from there. With TL07x make shure the common mode voltage is right - so they would need an extra negative supply and are thus not a good choice. The LM358 is at least single supply, so it does not need a negative supply.

For the current loop using only 1 OP also has an advantage, as the 2 nd OP also adds delay. So using 2 OP can be a problem with slow OPs like the LM358. Still the LM358 for the current loop will be rather slow and has a rather limited slew rate: so in case of the sudden short, there can be quite some current spike.  So at least for the current loop, I would prefer a faster OP with single supply, GBW > 1 MHz and a slew rate of at least about 3 V/µs.

For the voltage control one could use just a voltage divider and thus only one OP for the loop. This would need a second OP to transfer the reference voltage / set voltage relative to the other side of the shunt. The advantage is two fold: the compensation circuit is a little easier (no two separate caps for phase boost) and there is no extra delay. So the OP can be rather slow.

For AC simulations the current sink as a load has AC amplitude 1. The interesting part is the output voltage - this than directly gives the output impedance. One can directly plot the difference from out+ and out- (drag with mouse).

[VEGETA]

After trying a lot, I modified the circuit to what is in the attachments. I didn't do any AC analysis unfortunately, but I applied the solution we discussed previously which is omitting the voltage sense op-amp and use a resistor divider instead.

I kept changing it and the comp filters but it kept oscillating as you can see.

Can you know why? what is the solution?

My guess is that the problem is the CV loop because its op-amp is the one that outputs ripple. I don't know how to fix this despite my trials. I can put a voltage follower op-amp but it won't be good enough. Just what is the difference between this circuit and the one before? I don't think that using the external limit shunt resistor is the reason too.

I would appreciate it if you told me how to learn how to debug these circuits using ac analysis or anything else needed.

thanks, as always.

[VEGETA]

In addition to my previous reply, I though of what you said about opamps and I found that most designs are using a good opamp for the current shunt only. The EEZ-Supply uses OP27 as I remember while Ian's design is using OP295 or something like that... while the rest of op-amps in eez supply are TL072D which is pretty normal.

However, Dave uses only lm358 (you can use lm324 too) but for the current shunt, he is putting 2 of them together as cascaded op-amps. This increases the bandwidth which might be the key to replace our very pricey LT1678.

Worst case is using one LT1678 (which has 2 op-amps) for the CC loop altogether, and using very traditional ones for the rest like CV and other stuff which can be ok with lm324 or lm358. One IC can have 4 lm324 which enhances the parts consolidation very much.


The problem with me now is that I can not simulate this in LTSPICE since it doesn't have models for these third-party ones. I tried putting TL072 model in specific folders but it didn't work (or I didn't do it properly/forgot something).

What do you think?

[Kleinstein]

For me the circuit did not show oscillations, but a common mode problem with the CC mode loop. With the current load, it got stuck at something like -700 mV at the output and the current limit part acting funny due to negative input voltage.

If one could avoid the common mode problem (e.g. limiting the load), the circuit would still have a problem with the current limiting. The differential amplifier would need really accurate resistors and could still show a not so good common mode suppression. Performance might be just acceptable for current limiting, but this will not provide accurate current regulation - the DC output resistor would not be very large. Assuming 0.1% resistor matching one would end up at around 1/1000 of the shunt or about 100 Ohms.

For the OPs one would like single supply OPs which can stand a high supply voltage. A possible, less expensive candidates would be OPA197 or OPA171. The amplifier for the shunt should be reasonable low drift and the current mode regulator might profit from a little more speed than the LM358 provides.

[VEGETA]

I played more with the circuit and found that the input supply was the problem, I made it variable a bit to simulate ripple but now I have chosen a steady value of say 21v which is typical... and now it regulates very well despite some issues like huge spike.

I wanted to make few modifications to the circuit, here are my suggestions:

1- Modifying the short circuit protection: well, how about putting it before the MOSFET? this will not give extra voltage drop on the linear stage.

2- Using high-side current sensing: In order to use my newer circuit which uses a voltage divider to sense the output voltage (- one op-amp), I must use high-side sensing. However, it still produced some issues like the one you mentioned which is common mode. Now, since I don't know the solution to this, I thought about what is in 3.

3- Using a high-side current sense amp: I found this part LT6106 which is somehow cheap (2$ from digikey) and a lot cheaper than a good op-amp (around 5$ for LT1678) as well as it is made specifically for the job = it can't go wrong.

However, it did went wrong lol. I tried their test circuit on their website [ http://www.linear.com/product/LT6106 ] and it produced correctly.

For our example, 0.1R shunt resistor... 100R input resistor and 1K output resistor gives a gain of 10. Which means 1A = 1V output from this opamp which is exactly like our CC loop, only better in terms of loop stuff and parts performance.

Now when I tried to put this simple circuit instead of the shunt comp op-amp, it didn't do well! it's output is so wrong with no indication why!!!

Using this part will make the design better (in overall) and will give us the freedom to choose other typical op-amps for the rest. With this, we only need one op-amp for the CC and one for CV which can be any nice cheap one like LM324.

Can you help with this? what is the problem in your opinion?

thanks!!!

[Kleinstein]

The current sensing amp only works if the voltage at the sensing shunt is higher than the level for the output resistor. So this would either mean one needs a negative supply or one would need a second shunt before the MOSFET. One would still need the resistor at the source to make the loop stable. Further the bandwidth of the LT6206 is not that high - this could cause a problem or limit the speed of current limiting.

If you really want to go with low cost OPs and still want good performance, I would go for an slightly different, not very common type: Have the current regulator floating. The downside is that you would need a negative supple (e.g. -4 V at about 1-2 mA) and a few more OPs/transistors - but most of them not critical, so cheap ones like LM358 or MCP6002 would do.

The trick is that a floating regulator for the current does not need to change its output so fast, as it is working from the gate to source (+shunt) voltage only. The downside is that one would need a kind of current sense amplifier (like the LT6206) to bring the measured current down to GND level and may need to bring the set current signal from GND potential up to the floating level. With modern low voltage OPs, it is possible the current regulator from the bias current sink.

[VEGETA]

The part I meant is LT6106 which is here: http://www.linear.com/product/LT6106  - Not the one you spoke of, and it doesn't show bandwidth in the specs.

__

You mean by "The current sensing amp only works if the voltage at the sensing shunt is higher than the level for the output resistor." is that the output resistor is the 0.1R shunt or the load itself?

I tested your circuit with the input voltage source set to 25v (constant) and it was good, except for low currents. It doesn't regulate anything less than 50mA or so, I don't remember.

I didn't get your idea about floating supply but if you mean making the CC op-amp connected to the negative supply instead of ground, then what is the gained benefit of this?

If omitting the op-amp will cause stability issues then it might not be the case. All I suggested is the use of high side current sense amplifier instead of the previous way... not to mention that the previous way had issues with <80mA CC mode.

I am confused now, I want anyone of these 2 to work especially with low currents. If I have to use LT1678 for the 2 CC op-amps (and the circuit works for low current sets) then I am forced to = no option. However, the problem now is that the circuit doesn't limit under 100mA. Also, it is not very accurate, like putting 300mA limit (1R load) will give around 299mA through that load (between out+ and out1) while giving like 330mA through the current shunt to ground.

[VEGETA]

one strange thing I forgot to mention, which is the input voltage of the mosfet must not get bigger than certain values. I mean, 22v is ok but 25v is not! the circuit doesn't operate well when it is big. No reason for that!

Sorry for confusing you even more, but stuff are getting complicated for me. I thought it is over but this low current thing made it very bad!

[salbayeng]

Kleinstein, a slip of the keypad there, the current sense amp is the LT6106.
Similar parts are the ZXCT1009 and ZXCT1010. Check your distributor catalog for "current sense amplifier" and "difference amplifier"
(Always check the min and max operating voltage of the part is suitable)

[VEGETA]

Kleinstein, a slip of the keypad there, the current sense amp is the LT6106.
Similar parts are the ZXCT1009 and ZXCT1010. Check your distributor catalog for "current sense amplifier" and "difference amplifier"
(Always check the min and max operating voltage of the part is suitable)

I tried the correct part but as I told you, simulation gave wrong results when I put it in our circuit. Now either we work on the circuit with high-side sensing using LT6106 making it stable or ditch it and return to the previous one and solve low current issue. Both are monsters, like choosing between 2 devils xD.

[VEGETA]

Does solving the problem of low currents lies in ac analysis only? I managed to do ac analysis but didn't know exactly what to probe. If I want to optimize say the CC loop, what should I probe? is it the output voltage of the cc regulator divided by it's feedback? and the same for the diff amp for the current?

Next step is determining a solution. From what I saw in this thread, adding caps and resistors seems the only way to solve these problems as it adds zeros to the loop. So I believe I should determine the frequency at which a certain loop gets unstable (say CC one) then use the formula to determine values for the C and R needed. Also, I know from my knowledge that a series resistor after the op-amp output does increase stability but determining its value is something I don't know yet... besides trial and error noobish technique

That leaves us with driving high capacitance loads and to check the cross over between CC and CV. I believe solving the previous stuff is the priority.

I hope someone knows about this, I'd like to learn how to solve these issues. The whole design is on-hold waiting for this thing to get stable... although other designs like the eez supply uses exactly the same configuration xD.

[Kleinstein]

The classical way of doing the AC analysis for loop stability, is to add an extra voltage source in the loop and look at the loop gain.

If one has a reasonable starting point, to have the regulator stable at least with an easy load, I personally prefer a different way. Looking at the output impedance will show the regulator performance and will also show if there is instability with any load impedance (especiall capacitive). If the regulator goes unstable or come close to it,  the output impedance will show a sharp resonance at that frequency. Besides a resonance directly visible in the curve, there is also the possibility to get a resonance if the external load is changes to a low low capacitor in the output impedance is close to a perfect inductance (or with an external inductor if the regulator haves like a low loss cap). True instability (undamped oscillation) can occur if the regulator circuit has more than 90 deg phase shift in any direction. So looking at the output impedance (and especially the phase shift) one can check for problems at any possible load impedance for just a single curve. One can also see in which range critical load capacitance can be.

The output impedance curve one aims for has usually a more or less fixed shape:
At high frequencies it is the capacitance at the out put that sets the impedance. There is a maximum in impedance than where the regulator sets in - for the usual lab supply this is somewhere in the 1 Ohms and 100 kHz range. A rather peaked maximum in impedance is indicating ringing and should be avoided. To lower frequencies the impedance goes down like 1/f for the very simple regulators. However just this single slow down to very low frequencies would mean a near perfect inductive behavior and thus ringing and possible instability with capacitive loads. To counteracts, usually a kind of horizontal step is added to the impedance curve, somewhere at about 1/10 - 1/100 the maximum value and about a decade wide.
Knowing this shape to aim for, it is usually not hard to adjust the caps for compensation - even if this means a little try and error.

Especially with the fet output stage one still has to check with different DC currents, as the output stage characteristics depend on the current level. At lower current the output gets slower, and the open loop output impedance gets higher - both makes regulation more difficult, especially with a MOSFET output stage. So one has to find a kind of compromise to work well at low and high currents - I don't know of there is a way better than (a guided) try and error here.

For the CC loop, the corresponding property to look at is output conductance: so have a voltage source as a load and look at the AC output current (e.g. current at the source). For the CC mode, such a regulator is not very good anyway. So much of the output conductance is set by the output capacitance anyway. So there is no need to optimize to much faster than that. The CC compensation might be more important for the CV/CC transition than steady state CC mode.
If CC mode has stability problems this could be trouble with the output stage in first place.

For the full program, the first step is usually looking at just the output stage by it's own. Here two properties are important first if the open loop output impedance. This should have less than 90 degree pase shift as well. If needed for higher frequencies an RC snubber can be used, making it part of the output stage.

The second, more important test of the output stage is using the output stage to drive a near perfect short (e.g. current sink + large cap in F range), and look at the trans-conductance. This should be well behaved (not too much phase shift) and sets the speed limit for the regulator. This gives a rough idea where later loop gain must be below 1 in CC mode, and where the output capacitance should take over.

With having a floating current regulator, I meant having the OP(s) for that powered from a supply between MOSFET source and something like 3-4 V below that. As the MOSFET output stage does not work that good at very low currents, it is a good idea to have a constant current sink as a minimum load anyway. This constant current could also provide power to the CC circuit, with just a zener to give them a stable supply. This needs the constant current to work form something like -4 V instead of -0.5 V. In a first stage I would not care so much about how to transfer the measured current and the set-point - this adds to the circuit but is not critical or really hard. This type of circuit is not very common - likely because in old times there where not that many OPs to work with a low supply like 3 V. With low accuracy, as a simple current limit it is common to just have the transistor at the emitter resistor to deviate base current. So the only new this is to combine precision and speed.

For the OPs choice there is no absolute need to be faster than the LM358. Current regulation is slow in original circuit anyway and thus there will be current overshoot in CV/CC transition and this might very well need the extra protection. Faster OPs help here only a little - the type of circuit with the GND reference current limiter is what makes current limit slow. The floating current regulator is a way to speed up current limiting, even without using fast OPs - it just needs extra circuitry and the negative supply. With a negative supply one also would not need single supply anymore.

[VEGETA]

Hello again,

You keep speaking about output impedance and its curve using ac analysis but I didn't find a way to see that, let alone learn about it and check it.

How to look at output stage alone? it is just the mosfet, do you mean cc and cv are not with it? you mentioned that the problems with CC can exist in the output stage itself, but cc is slow by default and I am not too fond with keeping this design as is if I can get it faster.

can you show or do you know an ltspice example for that? I mean make some adjustments to solve one problem. I will study Liv's design more to get some ideas... I might do the effort and mimic eez supply in ltspice to check for it.

does these designs use what you call floating regulator? as they use negative supply.

[Kleinstein]

To see the output impedance of the circuit, one has an AC current source at the load (usually together with the DC load current and with AC amplitude = 1 in the settings). Than in the AC voltage for the output gives the AC voltage for a simulated 1 A AC current - so this is directly the output impedance in Ohms, just with the little unusual dB scale. So 0 dB is 1 Ohms, -20 dB in 0.1 Ohms and so on.

To test the output stage alone, this is without the OPs, so a reduced circuit. I attach such a spice file for the trans-conductance test. Performance of the shown stage is acceptable above about 5 mA. Below might need some care, or sufficient current to a sink.

The second file attached is the principle with a floating current regulator, but ground base voltage regulator. The inductance in series to the shunt is more or less the typical parasitic inductance - it helps to prevent current overshoot. The current sources used in the circuit still need to be replaced with actual circuit. The the current limit is set to 1000 times I4. That circuit should work with relatively slow OPs (e.g. LT1013 is similar speed as LM358). The OP for CC mode could be something like an MCP6002 (though poor precision).

[VEGETA]

I've spent sometime checking the principle of your new circuit, and I think I finally understood it. Here is my explanation:

CC Loop:

you have an op-amp which has Vout+ as its positive terminal and it is always above the negative terminal by a voltage that equals exactly the voltage difference around the current shunt resistor. For 1A output current -> 100mV drop voltage which means the positive terminal of the CC op-amp is 100mV more than the negative one at all times.

Now to set a constant current limit, you need to inject this 100mV in the negative input to make it equal to the positive one (or slightly above) to get the diff amp to put the negative rail as its output and thus drive the MOSFET gate down to the negative rail (-5V) which is a CC operation.

To do so, you put a current source of 1mA --> 1mA*100R = 100mV which makes the negative terminal of the op-amp equals (V_I+) - 100mV at all times. Meaning, you only allow a 100mV drop voltage to exist on the current shunt (=1A) and if it exceeds this then it won't be allowed.

Now that is a brilliant idea! and it is so damn accurate even in very tiny currents!

Aside from that, I didn't understand the purpose of the other current sources (to make minimum current or stability) but since they are fixed currents I can make them using the famous LM334! No worries!


However, the problem is making the current source I4 which is the critical one! how to make it adjustable and software controlled? LM334 won't do it here plus I need something like 1uA resolution...

I thought of making an op-amp comparator (or something like a dummy load constant current sink) but I didn't get a good idea. I want something to be controlled via MCU as well as reading the output current to the MCU. Do you have any idea? I tried just adding a voltage below the 100R but it didn't work properly.

Is this the only thing left in the circuit? I hope xD

____

now please see this image of your circuits: http://imgur.com/a/AK6Pk

I ran the ac analysis and probed the points in the image. Where and what are the points that you spoke of? I mean how do you probe to see what you seek in the bode plot?

You spoke about the output impedance being 1v AC/1A AC but what is the point that you drew on the plot? and the other schematic as well. This is the only thing I am still totally confused with until now. You've been cooperating nicely with me and I am doing much effort in learning and trying but this portion is still not understandable for me.

To further explain the core of my questions: how did you know that the circuit behaves well above 5mA?



______

Domo Arigatou gozaimasu Kleinstein-sensei!

[VEGETA]

Wait... the MCP6002 doesn't accept higher voltage than 6v as its power rail, so how is it accepted here? aren't there any better Linear tech part?

in this design there are 2 op-amps, i would really like to pick a dual op-amp for both of them if possible... will LT1013 be good enough for both? as for the rest of the circuits which needs something like buffering and stuff like that, the lm324 will be good enough in my opinion.

[Kleinstein]

An important part of the version with floating regulator is, that the two OP have a different supply voltage: the one for the voltage regulation uses GND and 30 V so this could be an LT1006 (single to LT1013) or LM358. If the negative supply is used too one could also non single supply OPs like 741 / OP07.

The current regulating OP has a different supply, relative to the output (before the shunt). This is only something like 3 to 5 V and the OP needs to work at it's upper supply limit. So a low voltage Rail-Rail OP like the MCP6001 is correct here. On can't use a dual OP for both.

The current sources for the supply part don't need to be that accurate. More like a 2 transistor version or current mirror to minimize the voltage lost.

The current source I4 to set the current limit is also used to make is possible to transfer the signal from GND referenced to the output referenced part of the circuit. So this would be more like an OP + N-MOSFET (e.g. 2N7000) based one. So the second half of an LM358 for voltage regulation could be used here.

One might still want to have a current monitor, to transfer the measurend current down to GND.

[VEGETA]

But if you put MCP6001, its positive rail will be I+ which can go to 20v while it has a negative rail of fixed -5v. This will be 25v difference which is bigger than the 6v right? that was what I talked about.

I might see what to do for the current sources but I didn't get their goal yet, aren't they for minimum load or stability?

I tried doing the I4 thing as you said but didn't work properly for me. I put a nmosfet with an op-amp and a 1k resistor to ground. However, I retried and it seemed to work. Circuit in the attachments.

I still need to make it software compatible buy adding another op-amp before the positive input of the opamp. I originally wanted to make this not by current sink method of yours but with an op-amp that does an offset voltage, adds it to the I+ voltage to make the drop voltage necessary. However, why is it a must to have a current sink?


"One might still want to have a current monitor, to transfer the measurend current down to GND. "

what current to ground? you mean the output current? diff amp will do the job if it doesn't affect the loop.

[Kleinstein]

The current sink / source method is a way to get very good common mode suppression, just like the current sensing amplifiers do. One could alternatively use a differential amplifier of cause, if accuracy is not that important. For current sensing this is very real option, especially with a floating amplification before that. For transferring the set-point, I would still prefer the current source, as a common mode error could result in negative output resistance.

The current controlling OP has it's own voltage regulation with the zener diode - so the OPs voltage is limited to 4.7 V in the simulated circuit (the lowest voltage zener I found in standard parts list). It is only the current sink that is using the -5 V.  So it is only the current sink circuit hat will see the high voltage (e.g. up to 25 V volts or so). The current regulating OP is working between V_out and V_out-4.7 V.
Having the supply of that OP moving with the output voltage removes the need for a high slew rate and bandwidth.

The current source circuit in the spice file will work ok with a lower controlling voltage V3 (e.g. < 8 V, or better < 5 V). In the final circuit it one would need to have R1 going to the -5 V supply and use only something like 4 V (relative to the -5V)  max, as the output side could go slightly below zero too.

[VEGETA]

Here in the attachments a new version of the current sink for setting the CC stuff... I guess it is good enough (except that I picked a mosfet randomly). The set in the example is 100mV (from MCU DAC or filtered PWM) which means 1A output in the final circuit. However, since there are op-amps in this circuit, will it be stable or will it return the previous nightmare?


Now I saw the voltage on the CC op-amp, both rails are positive voltage! is that the "floating" supply? But why is that? isn't just connecting the negative rail is enough?

I didn't quite get the last paragraph but I think you meant relying on -5v rail instead of ground because the output (?) can go to negative slightly. i modified the circuit so you can put your additions as the circuit is so small, won't take time.

what is there left to do?


THANKS!

[VEGETA]

Now as for the negative supply, I found some charge pumps which are cheap around 0.75$ maxim part on digikey but they are only 50mA. How much current should it be to tolerate our circuit?

[Kleinstein]

The circuit would need something like 10 mA from the negative supply. It very much depends how much current is needed / wanted to make the MOSFET power stage behave good. So it can depend on the used MOSFET. It may be a little more if additional OPs use the negative supply, e.g. use TL07x instead of LT1013 for voltage regulation.
 
I don't like charge pumps very much, as they produce quite some noise on the input side - though there is switched mode regulator anyway. Depending on how the +30 V is generated, one might be able to combine this with the negative supply and maybe the supply for a controlling µC and display. One could even end up running the µC/ display from GND and -5V.

For the CC OP it helps to have it's supply floating (or better being relative to the output). Having only one side moving with the output (and have the positive side fixed to the 30 V) would cause more trouble, as the OPs supply could than change fast and OPs are not well specified for that. Also the supply current of the OP is still of some use if goint through the MOSFET - so why waste it.

[VEGETA]

I will generate the 30v by using a boost converter directly from the battery pack (8.4v -> 30v) which doesn't have to provide much current because it is for op-amps only.

I didn't find a cheap charge pump, here is the digikey search: http://www.digikey.com/products/en/integrated-circuits-ics/pmic-voltage-regulators-dc-dc-switching-regulators/739?FV=15c0002%2C112801ce%2C1f140000%2Cffe002e3&mnonly=0&newproducts=0&ColumnSort=1000011&page=1&stock=1&pbfree=0&rohs=0&quantity=1&ptm=0&fid=0&pageSize=25

The only part I found reasonable is MAX1720 which supplies -Vin and 50mA which is enough as you explained. It is 12KHz frequency which might be good low noise. I already have a 5v linear regulator to provide 5v for MCU and other stuff... I will use it as an input to this charge pump. both works fine.


The other current sources/sinks can be replaced by transistor... though I didn't get why they exist there.

[Kleinstein]

The boost converter to get 30 V might be able to also provide a negative supply, from an additional winding (making a transformer from the inductor). The 30 V also still need to supply about 5 mA for the MOSFET gate driver.

I3 is there as a minimum load for the MOSFET and to power the floating OP for the CC mode.

Using I2 instead of the 10 K resistor that was there is earlier circuits saves a little on the current from 30 V. One might get away with even less current than 1 mA. The 10 K resistor would draw 3 mA worst case and this current would also be missing at the FET - I3 would need to be higher too. Just a resistor might also work, if it can be more than 10 K.

[VEGETA]

Cheapest reliable boost IC on digikey is MIC2288 which can output up to 1.2A which is far far more than we want. You say we need 5mA for MOSFET gate and it can get it when I make the battery pack its input.

This part is straightforward, originally I wanted it to be more complicated by having one big boost followed by a buck as a pre-regulator. However, say boost is 80% efficient, and buck is 80% also then what makes the total efficiency? it is a bad idea... originally I didn't know a good SEPIC converter especially how to control its voltage directly by MCU. Then I figured out the way of using a digital potentiometer (I2C or SPI one) to control it as its feedback resistor. Then I found a suitable sepic converter which by all means a better choice here for various reasons.


Now getting a 30v rail to power the op-amps is not a big deal, one small boost is enough. I think this MIC2288 and other similar ICs like it is good enough. For the negative rail, I am gonna use MAX1720 or similar part taking the battery pack as its input, which is the simplest solution. I saw your solution of an inductor in the EEZ supply but it will require an extra linear regulator which won't be economical as well. What is your suggestion?

Using LT1013 for voltage op-amp and the current source controller is a good choice but I don't know if it is the same as LM358, also the op-amp that compares I+ voltage with the current set voltage (0-200mV = 0-2A) from the MCU is, I think, must be a little accurate since it is gonna deal with 1mV of accuracy so will LM324/LM358/LT1013 be good enough?

I searched Linear.com for suitable op-amps for suitable op-amps and found these: LT1800, LTC6261, LTC6220. You can check this page sorted by the cheapest: http://www.linear.com/parametric/Precision_Amplifiers#!cols_1006,1030,1075,1047,1021,2275,1004,1005!s_2275,0!gtd_!1047_yes!1021_%3E=2!1075_yes

Do you find a suitable cheap part in there? I tried to match your original suggestion.

[Kleinstein]

The OP used for current regulation needs to be a low voltage RR type. So I think the cheap MCP6002 should work, if we accept the rather high possible offset, that might limit the lowest set current. There are a few similar, more accurate OPs available (could be even Az types (e.g. MCP6V2x), but this is kind of overkill). The second OP could be of good use to amplify the measured current signal (e.g. 10-50 times). Alternatively the second OP could be used for a current sense amp with an extra p-FET.

The OP for voltage control does not need to be accurate, so the LM358 is good enough - the LT1013 is about the same speed, but much more accurate and expensive. The LT1006 is the single version of the LT1013. As we have a negative supply one could also use non single supply OPs - so many more to choose from. A low supply current might be important here, as these are powerd from the 30 V.

One could use a second OP as a differential amplifier to get the measured current signal relative to GND - here the negative supply might be needed. With a current sense amplifier one would likely need it to get the signal from relative to the negative supply back up. The OP for the I4 source (set -current) could be powered from something like the µC supply and the negative one - no need for speed and high accuracy.

[VEGETA]

Searching Linear parts for the CC op-amp that is similar to MCP6002 resulted in failure xD. I tried LTC6088 in LTSPICE and it showed some little oscillation near the end of the on-time (2A) around the 1A limit (30mA peak-to-peak) but LT1013 didn't work too. The other op-amps mentioned by me in the last post didn't work too despite being better quality than MCP6002.

I tried the op-amps and these are the ones which worked: LTC6085 (the quad version of LTC6084 -> not the same drawing = hard to re-wire xD) and LT6106 which is a current sense amp. LTC6084 is 2$ from digikey which is acceptable. I could get cheaper parts but dunno if they work since ltspice doesn't support them. I am not a Linear.com fanboy xD


You mean using the 2nd op-amp to actually measure the output current with extra p-fet? how is that assuming we need a diff amp for current sense, not to mention that it will be using the same power supply of I+ and -5v (4.7v zener). Speaking of this negative rail supply... it is only -5v but in simulation I find the negative rail of the op-amp goes to even beyond -5v. How is that?

The op-amp for I4 is supplied from +5v and ground, why there is a need for negative rail which is only a -5v charge pump? Also, for the differential amplifier for current sensing, it can be powered from +30v and ground without the need of negative rail... won't it be like +-35v as a total voltage difference between the rails?

[Kleinstein]

For the current sense amplifier the LTC6084 should be OK - though the small case might be inconvenient. The CC OP needs to work at the upper rail - so usually an Rail to Rail OP, this is why the LT1013 does not work.
The main downside of the MCP6002 is the large offset - one could get around it with adjustment and 2 extra resistors (in case the offset is negative).

To sense the current, I see 3 options:
1) Use a special current sense amplifier, a resistor to the -5 V and than an differential amplifier (powered from batt (e.g. 7.2 V) and -5 V) to bring the signal back to GND level.
2) Build the current sense amplifier from an OP (e.g. 2nd half of CC) and P-Channel MOSFET (optional PNP darlington) and rest as before.
3) A third, more low cost option would be to have an OP (e.g. 2nd half of CC) to amplify the current signal (e.g. x 20) and than have a differential amplifier (powered from +30 and GND) to bring the Signal to GND level.

For the options 1 and 2 the differential amplifier should need a negative supply as the inputs would be at a negative voltage. For the option 3 the amplifier does not need the negative supply.

For the I4 current source one would normally need the -5 V supply for the OP too. The point is that the current sink does need to go all the way to zero volts and maybe even a few mV negative.  One might get away with a less accurate modified circuit, without the negative supply for the OP.

One could use a modified gate drive circuit, that can get away with less current (e.g. 1 mA instead of 5 mA) there.

[VEGETA]

though the small case might be inconvenient.

what is that?

Price for the LT6084 is ok so a good device with reasonable price. No need for MCP6002 here I guess. Still you didn't give me the answer of the power supply for this op-amp (2nd op-amp in the IC rather than current set), if it is a floating with mostly positive supply for both + and - rail... So how will it suite the other op-amp in the same IC which is meant to do something else?

1) Use a special current sense amplifier, a resistor to the -5 V and than an differential amplifier (powered from batt (e.g. 7.2 V) and -5 V) to bring the signal back to GND level.

why the need of negative supply? it is gonna be I+ and I- difference so it won't go negative, right?

2) Build the current sense amplifier from an OP (e.g. 2nd half of CC) and P-Channel MOSFET (optional PNP darlington) and rest as before.

Here is what I asked about, using the 2nd CC OP which has the same floating supply... how can it work? And, if I am gonna use a diff-amp why the need for p-mosfet?

3) A third, more low cost option would be to have an OP (e.g. 2nd half of CC) to amplify the current signal (e.g. x 20) and than have a differential amplifier (powered from +30 and GND) to bring the Signal to GND level.

Well, this is weird. Where is the "current signal"? it is mainly the I+ voltage and I- voltage but it is not like this in our loop. What is the "bringing signal back to ground using a diff-amp"?


My first thought was the following: I already have a /10 voltage divider (0.1% resistors) for Vout (or I-) node to get the output voltage... so it would be good to make yet another voltage difference on the I+ node by a factor of /10. Now get a simple diff-amp between the 2 which, most importantly, not a part of the control loop so I guess it won't affect stability. Let us say it is 2A and the voltage is 20v out this means something like 20.2-20 = 0.2v now a x10 diff-amp = 2v so 2V = 2A as the original simple design was. I guess the other LM358 can do the job or any op-amp really, so we can use the other op-amp in the IC that contains the CV op-amp to do it. It is powered from anything like 30v or 5v to ground. If it won't affect the CV op-amp, I can even hook it to -5v supply.

^ What do you think about that?

For the I4 current source one would normally need the -5 V supply for the OP too. The point is that the current sink does need to go all the way to zero volts and maybe even a few mV negative.  One might get away with a less accurate modified circuit, without the negative supply for the OP.

That was not my question, it was that the negative rail of the op-amp went below -5v while we don't have such a capability! you know the -5v is all the limit.

My guessed answer is: because we used a current source model instead of a true realistic circuit.

[Kleinstein]

The LT6084 comes only in rather small form factors, like TSSOP8 or similar - no DIP8 or SO-8. Otherwise it is a better replacement for the MCP6002 (especially much tighter offset specs).

The power supply of this OP is relative to I+. To a certain degree we can chose something like 3 to 5 V with the zener diode. So we have something like I+ and I+ -4V as there supply. The power comes through the current source (I3).  A second OP with the same power can be used to amplify the voltage over the shunt or to build a current sense amplifier by hand (OP+P-FET). It is classical high side current sense amplifier circuit that needs a P_FET or with lower accuracy a PNP darlington. The only difference to the normal current sense circuit is, that the OP is powered from the supply relative to the shunt and not to GND - this is not a problem at all, but more of an advantage for the OP.

Because I+ and I-  can go essentially all the way to GND level, the output current of current sense circuit can not flow through a resistors at ground level - one will need a more negative level here. To bring the signal from that more negative level to the ADC would require something like a difference amplifier, but other options are there. Still this makes the first two options rather complicated.

The 3rd. option is using a difference amplifier to measure (for display) the current. To reduce the required common mode rejection of the differential amplifier it is a good idea to amplify the voltage over the shunt first. The is relatively easy, as we already have the supply relative to the shunt for the CC loop. It is just easier to have an extra x 10 stage here than to go for 0.1% or better resistors at the difference amplifier. So this is relatively close to your suggestion, just in not using a divide by 10 first, but the extra times 10 at the shunt. The difference amplifier could than be something like times 1 (so 4 equal resistors) and still be powered from 30V/GND (15 V would be sufficient).

The possible lower than -5 V voltage in the simulations could be due to the current source model used. I did not see it, and operations should not need it. How much negative supply is needed, depends on the voltage for the 2 floating OPs - we need something like 0.5-1 V more than the zener voltage.

As a 4th option one could also power the current display from the "floating" 3-5 V supply - there is a current of some 5-10 mA available anyway.

[VEGETA]

So your idea is to use the other LTC6084 (powered from the I+ and zener which is referenced to -5) to amplify the I+ and I- signal by 10? this is true because max current of 2A will output 0.2v drop over the shunt -> x10 = 2v so that 1v = 1A. However, you mentioned a diff-amp powered from 30v to ground after this... what is it? My guess is the floating supply from I+ and zener is always gonna give +5 or so voltage difference which is enough to output 0-2v signal, why do we need an extra diff amp op-amp?

The power comes through the current source (I3)

To bring the signal from that more negative level to the ADC would require something like a difference amplifier, but other options are there

I just didn't get this.

As a 4th option one could also power the current display from the "floating" 3-5 V supply - there is a current of some 5-10 mA available anyway.

I guess this is related to the first suggestion of yours. I got the idea of getting the difference of I+ and I- then amplify it by 10 to get 2v max output when 2A max current occurs. Now what is the 4-10mA that is already available?

BTW, can I3 be made of a cheap op-amp and a 2n2222 transistor (or nmosfet like I4)? or should I use transistors for it? it is referenced to -5v no 0v.

[VEGETA]

Well, I have put a 100uF cap on the output and then connected the pre-regulator circuit to it in one circuit to test it as a whole (Although it is not yet completed)... and guess what, IT WORKED! perhaps it is not perfect enough but I tested CC  and there were no problems. I am kinda happy that we reached this state, now we can continue adjusting our mosfet circuit more!

Combined circuit is attached below, the current and voltage curves are just so beautiful xD 

Now I think we should take care of the following stuff:

1- current measurement (the previous post).
2- output caps. will 100uF alu smd + 0.1u ceramic work for linear stage?
3- op-amp choice. it is pretty much finished: LT6084 for CC and crappy stuff for CV, perhaps even LT1013 if we need the other op-amp to be accurate (30-0v rails diff-amp for current measurement).
4- final mosfet choice. although IRFP250N is perfect but 240 is chosen lately. Plus, I wouldn't ever mind an SMD one although performance and quality is essential here.
5- most importantly, parts consolidation! can we enhance our choices here?

I give the mike to you, klein.

[VEGETA]

I played around with the "combined" circuit, the pre-regulator always lowers its voltage to be near the linear output which is just wrong and so weird! I even put it to around 18v (R1=10k, R2=105k) but still gets near 10v as the linear stage does this.

I studied more, and realized that modifying the R_SENSE of the SEPIC converter to make it lower gets it to be stabilized! now it works nicely (make it 0.005R). Let's not open this door yet xD

[Kleinstein]

The current source I3 can be a really simple one. So something like 2 transistors and 2 resistors. The same is true for I2 (just the other polarity, thus using PNPs).

However there could be one more problem: how to get a kin dof output disable ? Just turnung I2 and I3 off will also remove power from the CC regulator!

For current measurement, I see two options:
1) have the display floating, e.g. an ICL7106 or similar powered like the CC OP.
2) use an OP as a difference amp to measure the 0-2 V from the second half of the LT6084. And than have an ADC and display driver (µc?) ground referenced. This could be the second halt for the LT1013/LM358 used for voltage regulation.

The current source I4 still need a little attention - I would use an OP (e.g. TLC271 )powered from -5 and +5 V.

For the choice of OPs, it depends on the accuracy one wants: the cheap version would be something like LM358/LMV358 (or MCP6002). The accurate version more like LT1013 and LT6084. Instead of the LT1013 an OPA2170 could be an intermediate - lower cost than LT1013 and better specs than the LM358. There might be alternatives to the LT6084 too - there are many modern OPs in this range (3-5 V Rail to Rail). We might find a way to use an MCP6002 for the I4 source to, but the 5.5 V supply limit can be tricky.

[VEGETA]

I would still need to use the other op-amp in LTC6084... as for current measurement, I would revert like I said before and you now: use the other LT1013 to get the I+ signal to make it /10v then feed it to the uC. Now the uC actually already has the I- voltage which now makes the values for the current.

However, I tried to make a traditional diff-amp for the current but it just didn't work. the amplification ratio was wrong although 4 similar resistors. Is this what you meant by your (2) option?

Well, I guess things will be better if we could get a single op-amp like ltc6084 to get rid of the idea of using the other op in the package. Is there any Linear.com part?

[Kleinstein]

The trick for the current measurement is to use the second half of the LT6084 and the second half of the LT013. The LT6084 first does amplification to 1 V/A (but still relative to I+). The LT1013 is configured as times 1 difference amplifier between I+ and the 1V/A signal., not the I- signal.

Without the extra amplification the precision required for the resistors would be very high.

Attached is a circuit version including this current sensing part.

[VEGETA]

Well, your idea is nice but the current sense is not accurate... there is 0.1v more and 0.2v on the 2A portion, perhaps it does amplify the voltage drop?!

I was thinking of using something like LT1797 which worked nice, but didn't work for your last circuit. It is the same price as LTC6084 but still better specs - taking into consideration the no need of the other op-amp in LTC6084 package.

EDIT: LT6000 (and 2,3,..) works for CC loop too. are they worth it? Also LTC6087/8.

EDIT2: I tried removing the 2A sink load and replaced it with a resistor 10R to draw 1A but there is still 0.1v more. I don't think this is due to the gain in differential amp but maybe due to the other LTC6085 or anything else I still do not know.

EDIT3: I adjusted R8 to be 9k instead of 10k which adjusted the gain... I noticed this detail in the last moment: it is the same as my resistor divider ratio, not like op-amp resistor gain. 1k in series of 9k = 10k which means V_out= V_in*(10/1)... if R8 will be 10 this will be V_out = V_in*(11/1). I guess this is correct.

Since it is the exact same result, I guess your idea is 2-sided: 1- use the other LTC6084. 2-no need for precision resistors.

xD

[Kleinstein]

For the CC loop OP, there are many types to choose from as here. A low supply current is not an advantage here as current is needed for the MOSFET anyway. So it comes down to availability, price and offset as the main properties. Much of the offset could be adjusted in software and with an additional resistor.
The LT1797 would work. The LT600x might be a little on the slow side, but can still work too.

There might be very well need for the second OP, to get the current reading back to the µC.
The easier way is amplify first and than the difference amplifier. The more accurate (better CMR) way would be something like a current sense circuit and amplifier at the -5V side.

There is one more weak point of this type of circuit to solve, and this output enable and the behavior during turn on. The OP for CC regulation only gets power via the bias current, so it would not be powered when the bias is disabled. So far I have not found a really good solution - this could turn out to be a real show stopper. Mains powered I would consider a relay, and keep the regulator active.

[VEGETA]

OK, the LTC6084 is the final choice. It is cheap and really good. LT1797 didn't work for the last circuit while it did well on the one before it (without measurement). And thus keeping the slightly pricey LT1013 since we use both op-amps in it. paying a little more here is reasonable enough since it is the main circuit... surely the quad LM324 will have a place somewhere else xD.

What do you mean by output enable? is it turning on or off the load or regulation? As for the behavior during power on, it gives a spike of 20A or something but then it regulates properly.

Your idea is that the problem is getting the supply from the output stage assuming it has a load, which you said it is the bias voltage. Now, can we really use a separate supply for this? I tried +5 and -5 for the CC and measurement OPs but no use.

I also tried making the CV op-amp output 0v for 1mA (regulator is off) then 1v for 10v output or so while having a resistor load... and everything worked nicely.

can you identify the problem more so I can search more and more on the topic. quitting is not an option at this stage xD lol... if you quit, I will find you... and I will kill you, then kill myself with you. :D:D:D:D:D

[Kleinstein]

The output enable / disable function is there to temporarily turn of the supply output and allow to turn it on in a well behaved way. This can be important during turn on of the instrument. Ideally the output would be separated, like with a switch / relay.

The usual way is to turn off the output stage, only, as an relay would add contact resistance and would thus still need feedback from behind the contacts.

I have not found a really good solution so far. One option would be old style with a relay, but this needs extra power and switching the voltage sensing line is also not attractive.
Turning off the ouput drive might work too. This would be turning off the current sources I2,I3 and I4 together. This still leaves the problem to start the regulator, especially the CC mode part. Here a JFET or depletion mode MOSFET could be used to enable the MOSFET output only if there is sufficient supply for the OP  (D/S from base of Q4 to I+ and gate to a fraction of the OPs supply). This would prevent an excessive positive current, but would still allow a slight negative current (from the I3 source). So one would also need some good protection against an overall negative output voltage. For a good solution one might have to consider an really independent supply for the CC OP - but this is quite an extra effort.

Though this is certainly disappointing, my conclusion would be that this type of regulation circuit is not such a good idea. It works very good in some respects (CV-CC transition), but the startup and the disable function is really making it tough, complicated and likely not so well performing in this respect. Much of the effort was on learning - so keep what we learned and use it on a more conventional circuit.

At least for me the effort is smaller to go back and more or less start from scratch than to fix the on/off problems with this circuit type. It also gets quite complicated compared to the more conventional floating regulator. My first choice for a MOSFET output stage and low power consumption would be a floating regulator with a isolated supply for the regulator circuitry - this is more or less the second standard circuit, like used in the HP and many of the cheap Chinese supplies. The advantage is, we only need that one extra supply, but no more +30 V or -5 V. Also gate drive is directly from the auxiliary supply - this saves on the overall power consumption.

[VEGETA]

Well, I searched other threads and found the talk about "floating regulator", now what is the advantage of using it? I still don't know about it except that it is not referenced to the circuit ground. Hence it can be something like 10v-to-5v but where to use this in our circuit?

I am ready to modify the circuit to a more traditional one following your suggestion of floating regulator, but how to do that? I understood of your talk is that our problem lies in CC mode especially in starting the regulator and having output enable and disable feature. I suggested having the CV mode at 0v as a start and the same for CC mode I4 but you seem to dislike it for some reason. How can we see your problem in ltspice?

My first choice for a MOSFET output stage and low power consumption would be a floating regulator with a isolated supply for the regulator circuitry

Yup, so let's start from there. what is the isolated supply? I have a 30v aux supply stage to power the OPs and other stuff, I don't think you mean it.

Our regulator circuitry has CV and CC mode, I assume you speak about CC regulator here and you suggest to have an isolated supply for it. So we can assume that our CV part is ok?

The problem of CC part, according to my understanding, is that it gets power from the output stage itself - so it depends on it. You wanted to give it a separate "isolated" supply... is it the floating (ex. 10-5v) one? Since you mention that we won't need 30v and -5v this means CV needs to be adjusted. However, we still need around 30v to drive the gate.

Also gate drive is directly from the auxiliary supply - this saves on the overall power consumption.

what is the voltage of this supply? we need at least say 5v difference between mosfet gate to its output to turn on... so maximum output voltage is 20v this means 25v aux supply. we have 30v here.

and it is meant to be a floating one for the regulators (assuming CV also) so a zener diode of 4.7v makes it 30-to-25v or maybe making it 30-to-10v rails floating supply.

^ Is that what you meant?

Now what type of circuit should we use? we made 2 kinds: first one is my initial suggestion with ground based cv and cc loops with cc stage consisting of a transistor pulling the base to ground... this was messy and oscillated a lot. Second one was your (or someone else idr) initial idea of having 2 diodes to separate the cv and cc modes while having a bigger output voltage before the diode... so the active stage is the one with lower voltage. This 2nd one didn't oscillate but was slow in the cc mode.

Can you post a circuit in ltspice to demonstrate this? I tried to play around with our last one but no hope, still nothing. I am open to using other typologies that guarantee low dropout of 1v.   

I learned a lot surely but I don't understand the concept of floating regulators and why they will help, plus don't know why the traditional circuit oscillated in the first place.

[VEGETA]

I have nearly completed my ideas about the rest of the supply like switching supply stage and microcontroller stuff as well as display and protection... the only thing remaining is this linear post-regulator stage!

[ZeTeX]

I have nearly completed my ideas about the rest of the supply like switching supply stage and microcontroller stuff as well as display and protection... the only thing remaining is this linear post-regulator stage!

Have a look at this thread:
https://www.eevblog.com/forum/projects/anything-wrong-with-this-linear-psu-design/
this guy is doing a good job at designing fairly simple PSU.

[VEGETA]

I have nearly completed my ideas about the rest of the supply like switching supply stage and microcontroller stuff as well as display and protection... the only thing remaining is this linear post-regulator stage!

Have a look at this thread:
https://www.eevblog.com/forum/projects/anything-wrong-with-this-linear-psu-design/
this guy is doing a good job at designing fairly simple PSU.

Very nice, I went through and understood many parts of his design... very similar to our old one. Perhaps this is what klen meant by floating. gonna play around with this soon enough to do a re-cap of mine. Do you think 1v drop is achievable with that design? can I make it suite an N-mosfet one?

thx

[ZeTeX]

Probably yes but with a few modification, e.g protection for the MOSFET and maybe replacing the current source with a voltage source as MOSFETs are voltage driving devices, but I might be wrong.

[Kleinstein]

The floating supply circuit is something like the circuit in this post:
https://www.eevblog.com/forum/projects/anything-wrong-with-this-linear-psu-design/msg1104085/#msg1104085
(change the OPs to something more common and unity gain stable, like TLC27x - the LT1037 is a poor choice)

The point is that the OPs (and the controlling µC) from supply that is later relative to the positive output. So this would be something like an flyback SMPS, DCDC block or a royer converter. No more need for the 30 V and negative GND referenced supply. It is easy to change to a MOSFET output stange: just replace the NPN darlington by an N-MOSFET. One might need a slightly higher supply for the positive current (R6) too.
Even with the darlington the drop out is around 0.8 V.

Output disable/enable and a minimum current is relatively easy to add (the minimum current is a little unusual though, as it uses a transistor in base configuration and the positive OPs supply). In addition the circuit would need one more OP for the voltage control setpoint voltage, and likely one for the measurement - but these are not critical.

There would also be the option, to go back to the more original circuit in this thread, with the CC mode regulator and shunt low side. Inspired by the last circuit here, I found a relatively easy way to speed up the CC mode, so that there will be no more large current spike, even without super fast OPs or critical adjustments. The trick is just an transistor in base configuration instead of a diode.
So one could stay rather close to the classical circuit. So this would use the extra 30 V and -5 V supply levels. The circuit is still shown for a BJT power stange, but is not much different for a MOSFET.


The combination with a SMPS shown earlier in the thread is not yet that ready. One usually want's to adjust the SMPS part for a constant drop out in analog.

[VEGETA]

Thanks for the reply. the circuit is a big messy  so I couldn't figure much of it, even the one in the original post is not understandable, especially the ground in the circuit that is on the output. It didn't work properly too, I keep seeing odd values all the time. Can you post a proper one that demonstrate the idea better. EDIT: I changed the transistor to ZTX849 and it worked. only LT1037 works well, even if i change it to LTC6085 and then get it back won't work

Anyway, this last circuit is rather not accurate in current limiting as it shows 1.98 instead of 2 which was achievable in older circuits, there is always a drop. It also has odd voltage monitoring ration, I fixed it by having 9k and 1k so it is now /10 of the output. Perhaps the most odd thing is the 2 shunt resistors and the ground vs the output. I tried making it ground referenced but no use as current opamp stuff didn't work.

I somehow get the idea of making a negative rail after ground to take the Rshunt, which is the concept made by the original creator of that thread. However, what about sinking all that current into the negative regulator? this is not good for me as my design is battery powered (which is a must) and there is no transformer to take a center tap and make a negative rail that can absorb all that power... mine was a small 10mA charge pump xD. Not to mention that his design didn't work with a mosfet nor it can handle 1v dropout.

As for the switching stage, my idea is to adjust it via a digital potentiometer controlled by the same MCU. So when the user gives an order to adjust output voltage, the MCU sends the command so that the pot is adjusted accordingly. There is not other way of digitally controlling the sepic (or any other regulator). Analog ones are not known to me, like how to adjust a pot in analog? voltage control is not available for these types of converters.

for the CC op-amp with negative input, this can be done by feeding the control voltage from the mcu to an inverting opamp which in turns feeds it to the cc opamp. However, accuracy is what bothers me in this circuit as I tried to figure out why and I failed xD. Also the CV loop itself is not ground referenced so it is not going to be accurate if fed by a ground referenced mcu as the output voltage feedback itself is not (always some mV dropout due to the lowside shunt).

[ZeTeX]

Thanks for the reply. the circuit is a big messy  so I couldn't figure much of it, even the one in the original post is not understandable, especially the ground in the circuit that is on the output. It didn't work properly too, I keep seeing odd values all the time. Can you post a proper one that demonstrate the idea better. EDIT: I changed the transistor to ZTX849 and it worked. only LT1037 works well, even if i change it to LTC6085 and then get it back won't work

Anyway, this last circuit is rather not accurate in current limiting as it shows 1.98 instead of 2 which was achievable in older circuits, there is always a drop. It also has odd voltage monitoring ration, I fixed it by having 9k and 1k so it is now /10 of the output. Perhaps the most odd thing is the 2 shunt resistors and the ground vs the output. I tried making it ground referenced but no use as current opamp stuff didn't work.

I somehow get the idea of making a negative rail after ground to take the Rshunt, which is the concept made by the original creator of that thread. However, what about sinking all that current into the negative regulator? this is not good for me as my design is battery powered (which is a must) and there is no transformer to take a center tap and make a negative rail that can absorb all that power... mine was a small 10mA charge pump xD. Not to mention that his design didn't work with a mosfet nor it can handle 1v dropout.

As for the switching stage, my idea is to adjust it via a digital potentiometer controlled by the same MCU. So when the user gives an order to adjust output voltage, the MCU sends the command so that the pot is adjusted accordingly. There is not other way of digitally controlling the sepic (or any other regulator). Analog ones are not known to me, like how to adjust a pot in analog? voltage control is not available for these types of converters.

for the CC op-amp with negative input, this can be done by feeding the control voltage from the mcu to an inverting opamp which in turns feeds it to the cc opamp. However, accuracy is what bothers me in this circuit as I tried to figure out why and I failed xD. Also the CV loop itself is not ground referenced so it is not going to be accurate if fed by a ground referenced mcu as the output voltage feedback itself is not (always some mV dropout due to the lowside shunt).

No need for digital pot at all, watch this:

[VEGETA]

My switching regulator is a SEPIC one, it is LT3757. Will it work for it? this is not the main issue now, I just want the linear stage to be done then I can see what to do elsewhere.

[Kleinstein]

The floating regulator circuit was a bit messy and needed extra models. There was also something funny hidden in the load - I had to remove is and add again.

With minimal higher supply (e.g. 6 V) and other OPs (here universal OPs with 1 MHz GBW used) it also work with a MOSFET, though I have not adjusted the compensation for this (compensation is still from using 2N2222+2N3055 before).  Even the BJT Version got down to 1 V dropout.

Looking at the result is a little more difficult, as one has to use differential probe: set positive (red probe) and drag mouse to negative (black probe).

There is a little overshoot in the current, but not much (way less than the current from the output capacitors).

Edit: Tracking Feedback is essentially the same as shown in Dave's video. It may need the the capacitor that Dave deleted in his video. Also keep the base resistor. It does not matter much what type of regulator. Only with a negative or insulated regulator you will need a different, but still similar circuit.

[VEGETA]

Thanks for all. Latest circuit is the best we've got so far, but I have these questions:

1- Why are we using the ground as + output and negative rail as - output?

won't it be better and easier to do it like traditional circuits?

2- I tried many op-amps and none of them worked! LT1007/1678/1037/6085/1013/...! the LT1797 seemed to work but bad result. I did that for both cv and cc together.

3- there is always 2mA or 1mA in the circuit that makes the output always less than required. Like having 999.74mA instead of 1A. I made the op supply -6 instead of -5 and it got a little better with 999.90 which is kinda good (still the 1.00 is awesome xD).

this opens the door for the question of what are these supplies? I can think of lm317 or similar for the positive one but the negative one is tricky with my battery pack being the source. I don't know if connecting them like you posted here will be ok or not.

4- I used the IRFP250N and it worked good without any problem, just a bigger spike (0.5A) before CC kicks in. Although I have removed the 0.2R totally and still no problem. Is there any other types of mosfets or similar stuff can be used to enhance the circuit? I am not insisting on a mosfet to be the absolute must, I just saw from my search that it allows better low dropout than bjts. I can go to an adventure of having a 0.5v dropout regulator!!! If it didn't work, then 1v is the choice... So I have to guarantee that 1v is always ok.

5- I will try switching regulator later, it is not a problem now. You way seems working nice which BTW will be better for me. Who wants extra parts (digital pot) and extra software stuff? ha?


6- this is similar to #1, will the user notice this flipped polarity? will it affect anything or will it work properly like other supplies? what if he wants to put it in series with other supply or say a channel 2 of this same design... will it work?

7- protection:

originally i thought of having a big diode on the output and another one reverse biased from the output of the mosfet to the input. Also a zener to protect the mosfet from exceeding its vds voltage, but this last one is not needed as we have our supply of maximum 6v or so.

THX

[Kleinstein]

The simulation might have a problem with many other OPs, as they are not coming close enough to the positive rail. So they might need a little more than the 6 V. It depends on the FET used.

The same circuit works with a darlington too - dropout would be around 0.8 V or so, depending on the current. There is not that much difference for this circuit - especially with a low threshold type, there is really not much difference in this circuit. So it is really to the personal choice or even later change.

You might need the 0.2 Ohms resistor (could be 0.1 Ohms or similar) to prevent too much gain for a MOSFET at high currents. This resistor does not to be stable or accurate, but low inductance could be an advantage.

The extra +6 and -5 V supply needs to galvanically insulated from the main power, so you would need something like an insulated flyback or royer converter. It would also need to power the µC. Depending on the OPs used and the MOSFET gate threshold, the needed voltage could be a little higher, like +8 v. The neagative side is essentially only for the OPs. So - 3 V, or maybe even without the negative side cold work. They do not need to be really stable, so just the switching regulator should be good enough, especially if R6 is replaced by a current source (could turn that off for disable and when supply is yet there).

If the gain is a little off, or a possible offset in measured current (e.g. some bias), this could be compensated in software. The shunt and ADC ref is usually not accurate anyway. So I would not care so much about this. The shown circuit uses rather low impedance sensing divider - one can easily go higher there by something like a factor of 10. R9 is effectively in parallel to the shunt and the current set-point also adds a little offset (e.g. 0.1 mA).

[VEGETA]

Well, is galvanic isolation a must? the cheapest linear.com part for doing this is LT3573 which is 5$ and for +-12v it needs a 7$ transformer xD. or can it be just an isolated dc-dc converter module. If so then this module is kinda good enough:

http://www.digikey.com/product-detail/en/murata-power-solutions-inc/CMR0512S3C/811-2899-5-ND/4693727

but it is only 30mA for each rail. there are versions with +-9v which can give more current.

why would it be isolated in the first place? plus, won't it share the circuit ground?

___

I forgot to mention that output caps make it worse if they got bigger. slower transition.

___


I've made it +12/-12v but still no opamp working! I even replaced R6 with a current source model of 10mA and still nothing.

___

You still didn't answer me about why ground is top and negative rail is there.

[Kleinstein]

The circuit with the floating regulator needs the isolated supply. Usually this is just a separate transformer winding. A DCDC converter brick would work. As the positive side is always using more current than the negative side one can use single voltage type (e.g. 9 V or 12V) and get the negative side from a shunt regulation / diodes. The problem is more like the often relatively large minimum load of some 10 mA. It depends on the µC - as the µC will also be powered from the source, and one might want to add an minimum current (simple circuit, but tricky to find).

If you want low cost and don't mind winding your own transformer (no need for good insulation), one could use an old style royer converter.

The reason for the insulated supply is, that the GND point (and that of the controlling DAC) is at the positive supply - that is the whole trick with this circuit. However the need for the extra supply is also a big downside. So this type of circuit might not be the most attractive one - it usually is, if the output voltage is higher than about 25, as essentially the same circuit can be used from a few volts up to 1000 V or so.  For voltages below 25 V and with no need for a low dropout, the other type of circuit, more like from the very beginning can be easier.

I tested the simulation with LT1001 and a +12 V (AFAIR), and it worked - most others should work to, just not a de-compensated type like the LT1037. Just take care to get it in the right direction (use mirror,
not rotate).

If you don't want the insulated supply, there should in principle be a similar (from control theory side) version, with the shunt and MOSFET at the low side. However this would be a negative regulator and thus might need a different interface to the SMPS part. Also noise could be different than.

P.s. with the FET output stage, there is a way to get around the second small resistor and use R2 as the shunt. It even makes the part still missing slightly easier.

[ZeTeX]

http://www.ebay.com/itm/B0505S-1W-DC-DC-5V-Power-Supply-Module-4-Pin-Isolated-converter-NEW-Z3-/252029953042?hash=item3aae27e412:g:RzIAAOSw3ydVqPj7
1.32$ including shipping and your problem solved.
You might get it even cheaper if you search only the part number and add a "lot" to your search, I just bought 5 of those for less then 2$.

[VEGETA]

Ok so we can use a single output DC-DC module to output 12v and use a zener diode or something as a shunt regulator for the negative terminal (although I connected it to ground and showed no problem).. Here are the DC-DC converters suitable:

http://www.digikey.com/products/en/power-supplies-board-mount/dc-dc-converters/922?FV=15c0002%2C2dc1bff%2C1f140000%2Cffe0039a%2C17d4002c%2C17d40071%2C17d40096%2C17d400b6&mnonly=0&newproducts=0&ColumnSort=1000011&page=1&stock=1&pbfree=0&rohs=0&quantity=1&ptm=0&fid=0&pageSize=25

The parts I want are those who can be bought from digikey. The shown parts allow 5v input to 9/12v output, so I will get a linear regulator ic of 5v before the module.

___

well for mirror.... yes! I was rotating the damn thing and didn't notice it is not the same! LT1013 worked well so I guess this is a final decison.

__

I am not sure I fully understood the ground as positive output, but how will this affect other stuff? like other circuits like LCD, buttons, other ics, ...etc. which are usually connected to a 5v regulator and to the ground which is the battery - terminal, just like the switching supply itself. I am not sure how will all this mix?

for one part of the circuit the ground is positive rail and the other part it is the negative one. according to the schematic, the SMPS will be connected instead of V3 which means the + terminal of it is to the mosfet and the - terminal of it is to out- which is somehow became -v voltage... while the SMPS itself is + and - voltage by itself... let alone the other stuff connected to MCU and misc. stuff.


I say MCU because if we power it from this DC-DC converter, and it has LCD and stuff... dc-dc won't supply much current at all.. like 80mA or so.


___

If other circuits are functional like this one, do you think it is good to use them or just stick to this? I mean, what is the gain of this particular one? The guy (power..) of the other thread made a simpler circuit and I tested it with success... the only thing I hate it is the negative sensing thing. which one is better and what do you think we should follow?

[ZeTeX]

sure I fully understood the ground as positive output, but how will this affect other stuff? like other circuits like LCD, buttons, other ics, ...etc. which are usually connected to a 5v regulator and to the ground which is the battery - terminal, just like the switching supply itself. I am not sure how will all this mix?

It wont affect anything, think about the ground as positive and that's it, what you connected is going to see a normal positive voltage, its not going to see negative (ground).

[VEGETA]

I understand that, the output voltage and the user is gonna get positive and negative. However, what about the other parts of the circuit? also can this supply be paralleled with the same or different supply?

Say if I want to add another circuit like LCD stuff or other analog control doing something else, what is the power supply rails that I connect it to? remember the ground of the battery is now the output voltage.

[ZeTeX]

I understand that, the output voltage and the user is gonna get positive and negative. However, what about the other parts of the circuit? also can this supply be paralleled with the same or different supply?

Say if I want to add another circuit like LCD stuff or other analog control doing something else, what is the power supply rails that I connect it to? remember the ground of the battery is now the output voltage.

Yes, the ground of the battery is the positive output voltage in respect to the positive side of the battery, usually the positive voltage is in respect to ground, here its the opposite, so you just assume that the ground of the battery is the positive and connect whatever you want there like usual.
always think of voltage as respect to something, usually one assume its in respect to ground but here its the opposite, but at the end its just a matter of how do you connect the load so it will see positive and not negative voltage.
any power supply basically can be paralleled as long as it is floating, so the ground of #1 power supply is not the same ground as #2 power supply.

[Kleinstein]

Other circuitry that has to work with the measured voltage, ADCs, MCU and similar would be power through the DCDC converter as well. One thing that does not work well is to use the same MCU to do things like control of charging or under voltage lockout of the battery. This would need an extra µC or extra circuitry.

The circuit from the other thread can also work, but it is not that much simpler. To get a low drop, if would need the extra positive (e.g. 30 V) and negative supply, and it takes an extra OP to bring the ref signals to the right place. Usually one also wants a fast current limit and thus a second "shunt". It is a little easier to understand and calculate, if you have to do it by hand (or experiment). The difference in the number of parts is not really big - so it is more like on par.

[VEGETA]

Ground which is battery negative is positive rail for the output... But it is not this way for the switching supply input. So you think I should connect the negative of the battery to the input of the sepic while the positive of the battery to the ground pin of it??

I understand that voltage is with respect to something but if this linear supply is the final stage...  Shouldn't this have any effect on the previous stages?

Anyway... This means should connect stuff backwards like voltage regulators having gnd as positive rail. Right?  If so, then I should put proper naming in the schematic such as switching ground and vcc to make it more readable.

Is there any chance of making this design ground referenced or not? If not then no choice but accept it xd

I wonder if this type of circuits is used in modern professional supplies since it is a new knowledge to me. To my understanding, the best benefit of it is the fast cc mode compared to the normal one.

Maybe one question I didn't ask is... Are there any professional supplies having this low dropout and same specs or not,  and why? I bet it is the only one with batteries too.

[Kleinstein]

Quite a lot of lab supplies use this type of floating regulator circuit. 
I don't know if this is still true with those that use a SMPS instead of a transformer.
The adjustment used in this simulation is already faster than on usually finds in commercial supplies, so there output caps are usually larger. Also the extra transistor used here to do some kind of anti-windup to speed up the CC-CV transition is usually not used. In real life one might have to keep the speed a little lower, as parasitic inductance can make things a little tricky. This is a general problem if you want a fast low impedance circuit - just like the more common case with parasitic caps in fast high impedance circuits.

Normally main powered supplies don't need an extremely low drop out and a little more dropout helps to react better to fast load changes without the need for a really fast SMPS part. A little more voltage at the MOSFET also reduces capacitance and thus could reduce output ripple.

The negative side of the battery will still be the negative side of the output. It is just that the reference point in the control circuit and for the ADC/DACs will be the positive output. This is why we need the insulated DC/DC to power this part. This type of control has no effect on how the SMPS part is connected.

The interface to the tracking SMPS part gets a little different with a full GND referenced version, that has the MOSFET and shunt on the low side. Aus this is a kind of low drop negative regulator. This type might be the easiest one, as it could get away without an extra supply voltage, but one has to expect slight poorer performance: e.g. less ripple suppression, maybe slower and more residual DC output resistance.

[VEGETA]

so you mean I should connect the battery + to the + input of the SMPS and the - to - input which is the GND pin? and then the ground of the whole design is the positive output of the supply while the negative side is the GND pin of the SMPS according to the schematic.

I have other circuits like battery protection, battery charging, lcd stuff, buttons and knobs, and linear regulators like 5v... < how should I wire these? there will be no external adc/dac stuff since i wanna use those in the MCU itself.

So you think I should make 2 grounds, one for the power circuit and one for other stuff? You said the control circuit is being done like always which means a voltage regulator of 5v connected to battery + and its negative side is the battery negative also, which we can call ground. However, the output stage only has the reference point to the positive input which confuses me. If the control circuit has the ground at battery negative terminal which is also the output + how can this work? if I can understand this, the design is nearly finished I guess.

So this leaves us with the isolated supply which supplies little current such as 100mA or so, is it enough? what are the stuff to be connected to it from those which I listed above?

[VEGETA]

I think I made something working after a bit of thoughts and trials... the circuit is in the attachments, please check it out. It is a combined SEPIC pre-regulator with this linear post-regulator design that we did. Never mind the way to set pre-regulator voltage for now, I will make it tracking later on.

I've set the sepic to 18.4v and the linear at 15 with current limit at 1A. It works nicely!! As I said, never mind the pre-regulator performance for now as it is somehow slow and needs a bit of time to regulate the current. One thing that bothers me is the extra 1.5mA in the output.

Anyway I've attached the negative terminal of SEPIC converter and everything else to the OUT- terminal so now it is the active ground so to say while the true GND is on the OUT+ as you suggested. So now everything I need to put must have its negative terminal connected to OUT- right? like a 5v linear regulator connected to positive side of the battery from its positive "In" terminal while its "GND" terminal is connected to the OUT-. After that I can connect whatever I like to this 5v regulator and they work perfectly. <<< is this correct? I hope!

Now as for the MCU with other stuff like op-amps... why not connecting it to that 5v regulator? since it is gonna be pure +5v voltage across its terminals as well as the op-amps which will get say +12v voltage.

One thing that is odd for me is that the mosfet gate voltage reaches 20v while the OPs supply is +11v differential (+6 to -5 from "GND" symbol)... this is the voltage from the mosfet gate to the OUT- terminal so I guess it is not the proper way of reading it right?

__________

can you name modern professional power supplies using this circuit? BTW, I would not care if it is not used or famous if it works, I am asking for information only xD.

I cannot say "thanks" enough for you.

[Kleinstein]

In principle the circuit is OK. The OPs supply should come from an DCDC converter.

The relevant gate voltage is relative to source, so more towards the GND point or out+.

The filtering inductor could likely be smaller (e.g. 5 µH or even less should be enough, maybe even less). One might want a resistor in parallel to damp a possible resonance.
The feedback compensation at the switched mode regulator does not look perfect. AFAIK the ringing could be less. The drop in the intermediate voltage is still a little large. The compensation part is anyway changing when going to tracking feedback - so no need to adjust it for constant voltage.

There is a way to get rid of the extra shunt and use the resistor between source and GND for current measurement. This also make the set voltage directly relative to GND.

[VEGETA]

If the OPs power is from the isolated supply, then how will it react to the mosfet and the rest of the circuit? its own current loop is not like them. How to simulate that in ltspice? having the ground symbol between the 2 sources makes it relative to the output. We agreed to have an isolated DC-DC converter of low power (<100mA) to power op-amps and MCU (what else?) to be the source, here it will be like 12v output only, so what and where should we connect its negative output terminal? to OUT-? Notice that the negative voltage of this isolated supply is not yet discussed, we only said it is gonna be a shunt regulator or diodes.

You made me notice one thing I didn't, which is the MCU/ADC set voltage, it is relative to OUT+ not OUT-! so the chip that outputs this voltage must be like that, but how? if the "OUT+" is the negative terminal of the MCU or w/e, then what is the positive rail? By having a DC-DC from +Battery to -Battery gives us an isolated 12v, call it +D and -D... then we connect a 5v 7805 regulator to it which gives us +5v relative to -D. Now MCU will output 2v relative to -D to the op-amp to make output go to 20v. How can this be functional?

I tried connecting the ground symbol to the battery positive but didn't work too.

[Kleinstein]

Simulating the DC7DC converter is simple:  it just provides an 12 V source you can put somewhere.

I did a little cleanup in the circuit, used a single 12 V supply for the floating part and changed current regulation to use a single low ohms resistor. I also added tracking for the SMPS  - it might still need a little tweaking.

The 2 K resistor at the 12 V supply is to add some current used by the µC and similar and just in case the simulation does not include supply current of the OPs.

[VEGETA]

I've understood the circuit of tracking pre-regulator, the 10k resistor sets the dropout. It doesn't always get it to 1v accurately, sometimes is more. I didn't play with it yet so I don't know if this is fixable.

I noticed 2 small problems:

1- huge ripple of the switching supply: I fixed it by putting more capacitance, multiple 220uF. Dunno if it is good without side effects.

2- the output voltage doesn't reach the maximum I want of 20v: this is because the switching regulator itself can not reach that far because you kept R2 and R1 the same as my last experiment which is about 18v max... I changed it for like 21.8v max which is nice for this design.

You can try it in the circuit below.

[Kleinstein]

To get a more or less constant 1 V dropout, one should replace R13 with something like 22 K and a capacitor (e.g. 10 nF range ?) in series. Also remove C16, as the new cap. does the job. This way the fast changes come from before the extra filter and the DC drop is only set by the 10 K resistor at the transistor.

Due to the large capacitance after the filter one does not see it that much, but there see, so be a kind of heavy ringing and oscillation in the 16 kHz range at the SMPS part. So I think the compensation is not yet good. Also R24 looks like very small - at least the simulation showed way to high current peaks on startup.

So I think the SMPS part still needs some work.

A large capacitance at the filter can effect the reaction to fast load changes. There might be some glitches if the drop out gets too small, and MOSFET might have to dissipate more power on a very dynamic load.  It limits the speed how fast the voltage can recover after overload like a short. The 3 x 220 µf might be still acceptable.

[VEGETA]

R24 is like that because it is for the output current to be suitable. I read in the datasheet that it must be smaller to allow for bigger maximum current spike, and I think I tried smaller values but didn't allow the regulator to give more output power. It's formula is R24 = 80mV/I_switching_max.

As for other compensation and values, I didn't touch them. Just took them from ltspice file from linear.com page of the lt3757. I just altered the output cap, coupled inductor, R24.

well, if you put a cap in series with R13 this will not allow dc voltage, and why 22k exactly? you seem confident that R10 will set the value although in the eevblog video of the circuit it seemed without effect.

[Kleinstein]

The voltage difference (nominal dropout) is set to U_BE + R9/R12*U_ref. To avoid trouble with too much gain R9 should not be larger than R12. So to get a smaller drop out one might have to subtract a little (e.g. at the base side).

The 22 K value is just a first guess, so to have some feedback from before the filter. For better stability a smaller value might be better. Feedback from behind the filter is coming too late (which is bad for loop stability). Feedback through that extra capacitor tends to be earlier than normal, which can be an advantage, but one has to find a good balance of the two.
It all depends on the compensation settings at the SMPS. Finding good values here can be a little difficult, as with a SMPS the compensation settings can depend of the used voltages. Also the speed of the output stage is rather low compared to a linear regulator - so there is usually not that much of reserve find a good compromise in speed and performance. So would expect that one really has to find suitable values for this application worst case one might need something like voltage dependent part / switches in the compensation circuit.
Usually the data-sheets provide more information on how to set the compensation part. Having the feedback from the difference is already a first complication, though not much. Without a good hint from the DS one might have to do it the hard way: find (measure, calculate or use simulation) the transfer function of the power stage and than calculate the desired parts. The full simulation in transient mode is rather slow - so a little more than just pure try and error is likely a good idea. One might do that without the linear output stage to keep the simulation fast and simple.

[VEGETA]

I didn't quite understand most of that, but my point is that I got the circuit from the part's page on linear.com and didn't touch it. The big question is: Is the circuit good enough as it is now? I mean, will it oscillate or do errors..?

Also, what about replacing our MOSFET with another one... namely: FDZB33N25. It is modern and has SMD version.

I made R9=5k and the result is: for 5v output voltage, 6.27v pre-regulator voltage. Same result when I make a resistor divider at the gate of Q2. Also can we replace C16 with an already used value like 1n or 10n?

One more thing, we have a separate supply for the op-amps and other stuff like MCU\ADC\DAC... right? so these stuff are all must be powered from the isolated supply that has the true GND (which is OUT+ terminal) as its negative terminal and thus supplies positive voltage to the MCU and other stuff. My concern is about everything else like LCD, other ICs,... etc. Should all of them be powered from the Isolated one or just the ones that has relationship of the power controlling loops? in this case, some ICs like external ADC\DAC will be I2C or SPI... which might cause an issue right?

We will end up with 2 linear supply ICs (LM317 for example): one is powered from battery positive terminal (after protection) which is labeled as "IN" in the spice file, and has the battery negative as its negative (called OUT-)... While the other one is power from the isolated supply's positive terminal and the GND as its negative terminal.

^ Which is for which?

I forgot how measuring and sensing of the output voltage and current work in this topology!! I tried to remember but failed with it, the only thing I do remember is the transistor Q3 is used for anti-windup function... probing voltages didn't give me any clue, the V_sense one has the proper 0.2v value while current sensing pin of the opamp gives odd values like uV! how does it sense output voltage and current? and exactly how can I read them into the MCU?

thanks!

[VEGETA]

UPDATE: I understood the current part, it takes a voltage directly from after the mosfet (before the shunt resistor) relative to ground which will be similar to current setting voltage. So 200mV = 2A. Can we make it 1v for 1A without headache? xD

I am still remembering the voltage sensing part though...

[Kleinstein]

The voltage drop at the shunt also determines the heat dissipation and to a large part the initial voltage drop on a load change. So it is a good idea to not make the shunt so large. So something like a 100-300 mV drop for full scale is about acceptable. A higher drop is usually causing more trouble than good.

For changing the linear mode MOSFET, one has to keep the SOA in mind. Modern MOSFETs often have a rather poor SOA and thus not attractive for the linear stage. This is different for the switched mode stage itself, if discrete MOSFETs a re used. Here modern type are usually better as they need less driving power or have lower R_on. Here one has to find a compromise for low driving power plus transition loss and the R_on. Beginners tend to choose a FET that is larger than optimum.

The compensation is not easy for a large voltage range of the SMPS. One really has to check the design equations. The feedback from the difference in voltage is also a little different from normal regulation it is more like a strong feedback, as one gets it at a low voltage. So it is more than just using the equations / diagrams - one has to understand them to know how they change with the different feedback. I have not done that myself, but worst case one might have to include nonlinear parts to make is work really well.
Normally there is some freedom in choosing the RC values, like using smaller caps and larger resistors to a certain extend. However there are limits.

[VEGETA]

The shunt is 0.1R as you can see which makes 200mV for maximum current allowed. 0.2v*2A = 0.4W of power which is good enough.

You didn't answer my last 2 posts, about how to know or measure output voltage and current. I guess I knew for current but not voltage. Plus what I said about power sources.

I told you I haven't played with compensation, I just took it from the SPICE file on the part's website page. So I assumed they are working nicely. Or do you mean the compensation of the linear stage? I don't think you do.

Can you name the comp. pins you mean? are they SS, RT, and Vc? also C15 shows a "x2" mark on it, what is that? does it mean 2 parallel ones?

[Kleinstein]

In the last LTspice ciruit (new_combined-2.asc) the capacitor C16 is just a left over - 1 pF is essentially 0, so no need for this cap anymore. This sometimes happens in such simulations, that one initially has parts but optimization shows you don't need them. To have an easy way back I often give them extreme values, like 1 pF, 1 fF or 1mOhms.

Compensation of the SMPS part is mainly C5,R16 at the VC pin, but the circuit at the feedback pin FBX also is part of this.

With much of the circuit powered from the isolated supply, there will be not much need to have a SPI or similar connection to the battery referenced part. Essentially the only part that needs to be powered from the battery referenced part is the DCDC converter and the part for monitoring the battery voltage. An SPI or I2C connection to the µC would need a special level shifter or maybe opto-coupler. One might prefer an analog signal transfer and only a simple under-voltage lockout at the battery side.

Monitoring the output voltage would need an inverting amplifier, as the output is negative relative to out+.

[VEGETA]

C16 is 500pF not 1pF. As for SMPS compensation, what is the problem that you think lies in this compensation?

So you mean powering nearly everything from the isolated supply? the power supply is not just this circuit, there will be LCD,ADC,DAC,buttons,encoders, other ICs... the best isolated DC-DC module I found with reasonable price is 12v-to-12v with only 80mA of maximum power! will it be enough to get all that?!

as for voltage, connect a op-amp with /10 gain then feed it to the adc?

[Kleinstein]

Yes for the voltage it could be something an OP as a gain of -0.1 or so.

For the C16 value, it depends on what you want - the last version I have got away without it. Instead it has a RC feedback from before the filter. This is likely the better version. The Version with C16 can have trouble with to much filtering.

Except for an possible LCD backlight something like 80 mA should be well enough - I would even guess 20 mA should be OK, if one really cares one might even get down to the about 8 mA minimum load for many of the small DCDC converters.

For the SMPS compensation, there is no easy fast simulation that directly shows you loop gain. So you essentially have to do it the classical way, getting a transfer function for the PWM output stage. The problem here is that the PWM stage gain can depend on the output voltage - so it is about finding a good compensation that work with one part that is variable. Also the modified feedback part means the ready calculated circuit do not match up, but we have to use a different feedback. The modified feedback might turn out to be even easier, but it is different so we can't expect it works without changing the rest.

A usual way is to replace the PWM generation and PWM + inductor/diode stage with a calculated theoretical transfer function - I don't know if this is given in the DS. There are than still quite some parts to adjust: the RC at the compensation pin of the SMPS controller, the feedback circuit (1 or 2 RC elements) and the filter / output caps of the switched stage. With something like 8 free parameters this is way beyond pure guesswork.

[VEGETA]

I made a new version with an op-amp in the attachments, it is good but will it need precision resistors of 0.1% or just the normal 1% ones? is there a need for RC compensation for it? I guess that the power supply for it is going to be the isolated one, exactly like the ADC that will take its value and the DAC that will supply control voltage for CV and CC.

Making a transfer function and especially for these 8 parameters is way more than my abilities, even at college I wasn't good with control stuff like transfer function and matlab. So I am going to search for another method. right now, the circuit functions properly so maybe datasheet can give good way to pick the Vc parts. Assume worst case of leaving it like this, what will happen? will it oscillate or something?

I removed C16 and it worked good => goodbye C16!! my concern is about other caps and resistors, I must consolidate as much as possible.

As for the isolated supply, I found this one: http://www.digikey.com/product-detail/en/murata-power-solutions-inc/NXE2S1212MC-R7/811-3184-1-ND/6009745

it is 12v to 12v by 167mA which is enough for back light too I guess, as well as any future additions (TFT screen?), all with 4$. Now it only requires El Cheapo boost converter as it's input to get the battery voltage from 8.4v to 12v which is by far more economical than other isolated modules. What do you think?

One thing that bothers me, it is how the CV op-amp works?! I totally forgot the principle of it! We worked on the principle of having the drop voltage supplied to it in the previous topology which didn't work... but what about this one? I don't seem to get it really. All I see is that the - input is connected to ground which is out+ all the time while the DAC voltage is supplied into a resistor divider to make it near ground too. can you explain?

[VEGETA]

I wish to use PIC microcontroller for the PSU (only one MCU) and make a PCB with CircuitMaker. My laptop is bad so I will get a new one in the last of February which will be suitable xD. That is why I need to finalize (or nearly) this main circuit so I can work on the other ones like battery pack and protection... etc.

what price do you think such a PSU can be sold at? just curious ~

[Kleinstein]

With simple PIC µC, the suitable display is more like a text based one with maybe 2 lines of 8 characters, or if the µC has a direct LCD interface even 2 simple 4 digit ones.

The resistors for voltage reading don't need to be very accurate (so 1% should be OK) - it depends on the ADC used, how much makes sense. One might not need R29/R32 - as they both essentially go to GND - only if true 4 wire sensing (e.g. for really high resolution) is needed these two could be a good idea.

The feedback and compensation for the switched mode still needs work ! The current plan will likely not work. May guess would be a capacitor in series with R13 and no C16.  If this part will be stable is still not clear - so at least run quite some extra tests, if you can't do the whole program. The compensation for the switched mode stage is about half the design effort - so this project is far from ready- more like 1/3 at best.

[VEGETA]

my plan is to get 16*2 or 20*4 character LCD and a good PIC16 (or PIC18 at most since ADC and DAC will be external 16-bit). I have removed C16.

So here is what I've done;

1- change the SMPS to LT3757A instead of the one without A, because it helps in stability according to DSh [ http://cds.linear.com/docs/en/datasheet/3757Afd.pdf ].
2- removed C16 completely.
3- changed R9 to 2.5K for smaller drop voltage, could be changed later.
4- followed the DSh and changed the comp. network, it is now 10nF with 10K resistor, parallel with a small 100pF.
5- put the negative supply for the voltage monitoring op-amp so I can use something like LTC6085 (or LT1014/LT6012/LT6005 if our voltage won't suit 6085) for the 4 op-amps! nice consolidation.

Datasheet didn't specify a certain way for compensation, it just pointed out that I should pick values in the application part and modify them. You also seem to know much about this but I don't. How do I run tests?

Here is the quote from datasheet:

ThestartofeachoscillatorcyclesetstheSRlatch(SR1) and
turns on the external power MOSFET switch M1 through
driver G2. The switch current flows through the external
current sensing resistor RSENSE and generates a voltage
proportional to the switch current. This current sense
voltage VISENSE (amplified by A5) is added to a stabilizing
slope compensation ramp and the resulting sum (SLOPE)
is fed into the positive terminal of thePWMcomparator A7.
When SLOPE exceeds the level at the negative input of A7
(VC pin), SR1 is reset, turning off the power switch. The
level at the negative input of A7 is set by the error amplifier
A1 (or A2) and is an amplified version of the difference
between the feedback voltage (FBX pin) and the reference
voltage (1.6V or –0.8V, depending on the configuration).
In this manner, the error amplifier sets the correct peak
switch current level to keep the output in regulation.

So I guess if the values are too much, it will be slow. Is that correct? What is the indication and the thing we must see to say that circuit is complete and compensation is done? and is it now only lies in Vc alone?

_______

anyway, you haven't answered me about how CV op-amp works. I still didn't get it.

_____

I've searched and found LTpowerCAD 2 tool for doing compensation, it seems pretty powerful and novel! However, it doesn't support LT3757A!!!

[Kleinstein]

The CV OP is comparing the the weighted sum of the (negative) output voltage and the (positive) set voltage to zero. C11 and R33 are for compensation and set the AC performance. I would guess R33 should be more like 1 K. Depending on the set voltage source one could also use higher resistor values for that part.

For the SMPS part, a slow compensation is easier than a faster one. So something relatively slow could be at least a good starting point. A small value for R9 causes more feedback gain. So this could be a problem and might need adjusted compensation (e.g. larger cap at the VC pin). It is also important that the current sense resistor is not to small. 1 mOhm like is the spice file is too low - this sets the peak current limit. AFAIK it takes a 100 mV maximum drop, so something like 10 mOhms would allow up to 10 A of peak current from the source - much more is calling for trouble. Especially for a first test less current is preferred. However the sense resistor is also setting loop gain - so one should use the right value.

For the tests of the SMPS part, I would use a very much simplified version (e.g. no current limit, universal OP) of the linear stage. And than is is about load transients of something like 10 mA -> 1 A and back, at a few output voltages (e.g. 1 V, 5 V , 15 V). Simulation could use quite some time !

[VEGETA]

As for the SMPS sense resistor, I choose this value to allow for 2A output to be available. I will try changing it to 0.02 and see if it will output 2A or not. Theoretically it is like this:

R_Sense = 0.08 / I_switch_maximum

the rest of the formulas (approx. results):

I_L2 = I_out = 2A (max)
I_switching = 11A
thus R_sense should be 0.007R, assuming 22 volts of output voltage (affects max duty cycle calculations).

Gonna try out 0.01R for now, and I will update once it is done.

___

So you idea is to use a {STEP} parameter for the load current sink to make it 10mA,1A,10mA,2A of 5mS between each of them... or something similar, right? now what is there for us to see? I could make it and let it simulate until morning xD... with full design not simplified one.  Also make that thing that makes LTSpice does the simulation 3 times for 3 different voltages (I'd have to check it because I don't remember it). And why not adjust temperature to see if it does matter. Is that what you meant?

____

@CV op-amp:

so the - input is 0v while the positive is V_set + OUT-? like saying 2v set is going to give 20v output which means -20v of OUT-... 2 --20 = 22v. how does this compare to 0 here? what I think is it is going to be fast and more stable since it doesn't rely on a measuring op-amp (which adds another loop).

[Kleinstein]

The CV loop uses something line 1 x V_set + 0.1*(V_out-). So for example 2 V + 0.1 * (-20 V) ->0. There is no second OP involved. The voltage measurement is completely different.


For the simulations, it is more like having a pulse function for the load current (advanced options under current source) to give something like 30 ms with 10 mA, than 5-10 ms with 1 A and 5 ms with 10 mA. The length of the sections might need some adjustment, as it takes some time for startup and step
As even in individual simulation will take some time, one might want to do the simulations one by one, at least in the beginning. One could even first start with slightly smaller caps at the SMPS output to speed up startup.

A sense resistor of 7 mOhms or 10 mOhms is about the right size - much better than 1 mOhms.

[VEGETA]

as for R_sense what about 5mOhms? if it does work like the 7-10mOhms then these are what I found:

www.digikey.com/product-detail/en/panasonic-electronic-components/ERJ-MP4QF5M0U/P19420CT-ND/6096848
http://www.digikey.com/product-detail/en/riedon/CSR1206-0R005F1/696-1372-1-ND/2813305

the first one is 3W and the 2nd one is 1W with 1% tolerance (it is not important here I guess) with 0.5 ~ 0.57$. Cheap and available! what do you think?

I ran the simulation with 0.01R to give 20v @ 2A and it didn't work! 25mS and it didn't reach it, it flattens out at around 16v or so. Thus we need smaller one, I picked 5mR since it is a nice round number, calculations are as follows:

5mR -> P=I2R = 12*12*0.005 =~ 0.7W --> 12 is I_switch_max, actually it is around 11.
7mR -> P=1W approx.

So picking a 2W one is a lot safer and it is not even pricey! here is one for 7mR: http://www.digikey.com/product-detail/en/rohm-semiconductor/PMR100HZPFU7L00/RHM.007AUCT-ND/2094559

now, why it is "much better" than 1mR while not being so different? 5mR vs 1mR is not much at all really.
________

For my trial now of 5mR and Vc compensation capacitor of 10nF, it reaches 20v @ 2A in around 20mS which is a lot really, don't you think so? I am not even sure is it because of the sense resistor or the compensation cap or even the output caps? the output caps didn't change thus it is not the main issue. I suspect compensation cap has anything to do with it, so I am going to try returning it to 6800p (6.8n) to see the difference while having the same 5mR sense.

[Kleinstein]

It takes some time to charge up those relatively large output caps, especially if the supply also has to provide much of it's power to the output. So a 20 ms startup is not bad. The time constant at the VC pin is in the 10 K  * 10 nF = 100 µs range and thus much shorter.

Changing the sense resistor from 5 mOhms to 1 mOhms is like increasing the loop gain by a factor of 5. Due to the difference feedback, the loop gain already is higher than in most normal applications. Going for 2 K for R9 is also a factor 5 up in loop gain. Having a small R13 and capacitor in series might bring this back closer to 1 - still more than something like 1/5 you get for a normal divider to get a fixed 8 V output.

As the TC / precision of the current sense resistor is not critical, this could even be just a piece of wire - board trace or a fuse, if it is low enough in inductivity.

[VEGETA]

Well, isn't 20mS too slow for fast changes? or is it normal?

I tried changing it back to R9=10k (but drop out is still so low like 0.5v) while removing the 100pF cap from Vc, as well as removing most of output caps keeping only 2 of them one before the inductor L3 and one after. L3 is now 10uH to try filtering the current more. It settles around 15mS now but only reaches 19.5v not 20v. Remember that switching frequency is set to 300KHz, so will it be better to make it 100KHz (needs larger inductor but more efficiency) while it can operate at 2MHZ with less efficiency.

The result is something not good enough, there is a lot of ripple in current (around 200mA which is not acceptable because it will make current monitoring very bad!). So we are forced to accept 20mS or so?

[Kleinstein]

The startup part has three components: one is the initial startup for the controller chip. The second phase is charging the output caps at essentially the maximum current and the last part is approaching the final voltage. The only critical part the the last the other parts can be slow with little problem. One might not it on recovery from CC mode, when the voltage goes up a lot - but here one often adds a slow increase anyway. The response to load changes should also be reasonably fast and more important have little drop in the voltage in between, as this sets the minimum voltage difference for the linear MOSFET.

Something like 300 kHz might be an acceptable compromise, though still one the high side. A higher clock should also allow a faster response, so one might want such a high frequency. But I would not go much higher if you don't want a 4 layer board.

[VEGETA]

I modified it more, and here is the new stuff:

1- made the FBX resistors 1K and 20K which allows for a maximum output voltage of around 33v which is much higher than the maximum needed of 21v or so. I did so because I noticed the 0.5v dropout is not enough somehow.

2- modified output cap and L configuration, as you can see in the attached schematic (plz do ). I did so to eliminate the damn ripple (or noise) that exists nearly everywhere, in output voltages and current. It is still not cured even after this! so what to do?

3- made the final output cap (after linear stage) 47uF instead of 10, and picked an Ai elec cap model for it. I felt it will help eliminate noise but nothing is done xD. I hope this doesn't affect stability.

4- returned R9 to be 10k to make a bigger drop but it didn't do a thing, which is weird.
______

somehow, the 5mR resistor is causing the whole circuit to be slow, as the 1mR gives significantly faster reaching of the final output voltage. Now with 5mR it needs at least 25mS to go from 0v to 20v output.

You mentioned adjusting FBX resistor divider along with R9 to get better results... However, I made FBX resistors very small compared to the DSh examples. The equation is V_output = 1.6 * (1 + R2/R1) which is for 20k/1k equals 33.6v. We need 21v maximum so it is good... the good thing is that the tracking pre-regulator doesn't care about this, it only needs the full range to be covering the maximum output voltage it needs, which is the case of this circuit.

How to solve slowness problem now? and most importantly, the ripple and noise one?! this one is really annoying as it didn't appear before. If you think slowness is not a bad problem then it is ok, I just don't want critical problems to appear such as oscillation and CC not recovering.

thanks

[Kleinstein]

The SMPS part does not look good. It kind of oscillates and peak currents are really high and current flowing back an forth. For the first test with the SMPS one could replace the linear regulator with a more simple one. At least remove the current limit part and LEDs. This nearly doubles simulation speed.

[VEGETA]

This is yet another version, updates:

1- updated the switching frequency to 500KHz.
2- soft-start cap is now 10nF instead of 20nF, faster.
3- re-adjusted output caps and inductors. more frequency = faster response -> we can add more filtering and still get fast response.
4- R9 = 3.3K. this gives <2v but still not 1v. I didn't lower it more since you dislike it for some reason.
5- FBX R2 = 15k. Max allowed voltage is ~25.5v.
6- C8 is 10uF again.
7- most importantly, the coupled inductors are 10uH instead of 4.7uH. this is the key in my trials, I guess saturation has something to do with it.


Now oscillations are no more, just a very small SMPS output voltage ripple which is not significant, linear output is just perfect. Even current ripple when it is not yet reached it's value is not more than 50mA and when it reaches set value it is pure.

what do you think now?

[VEGETA]

I noticed something weird in the last circuit, which is when I make it 5v final output, the pre-regulated supply output voltage is very very large! like 15v! WTF!!

[VEGETA]

I redid the output caps and inductors along with other resistors... the result is better and faster! the only thing bad is the relatively huge ripple of the SMPS output voltage. I don't like the idea of putting 1000uF capacitors in the output of the SMPS (3 of them as the current setting) because it will be extremely slow and we won't benefit of upgrading from 300KHz to 500KHz this way. I updated the 2 output inductors to be 10uH each which eliminated all current spikes and ripple which is a great advancement! Output caps are 100uF each not 220uF like before.

What can we do to enhance this? or is it good enough and beyond further enhancements? If so, then we should start thinking about output enable circuit (activating and deactivating of linear mosfet gate?) or possibly a down programmer if it is useful. let's not argue about them now.


Also there seems to be a small error in current set, like 1-2mA less and I don't know why.

[Kleinstein]

The massive filtering is very good in suppressing high frequency ripple, but the feedback look of the SMPS is oscillating. This is expected for feedback from behind the filter. Also R13 will make the drop for the linear stage voltage dependent.: to higher at low voltages and low at a high voltage.

I would suggest replacing R13 with something like 10 K and a capacitor in series. And / or move R9 from the output after the filter to before the filter.

[VEGETA]

This is the response of the new one with your suggestion, 0.1uF+10k instead of the R13. filtering still there though. I noticed that the pre-regulated voltage keeps increasing gradually. SMPS voltage is not "pure" but it also not huge continuous ripple like before. Linear regulation is accurate and no problem with it.

I am interested to know why SMPS voltage is constantly ramping up, which leads to how can we fix it to an approximate fixed voltage. My point of view is that by putting a capacitor (0.1uF here) with R13, this makes it like an open circuit of some sorts, thus maybe affecting the feedback itself since it needs to have resistor network connecting from the output to the FBX like you know. By putting 125k resistor as R13 with no capacitor this puts a solid maximum allowed output voltage which equals to 21.6v but when it is open... I don't know, but the curves shows that no max voltage limit is there.

This is an image of making the FBX resistors 10K and 1k (instead of 10k to the OUT-), it is noticeably faster though:

[Kleinstein]

Reducing R12 to 1 K and keeping R9 at 10 K is asking for a rather high drop over the linear stage. So the voltage is still ramping up. If the current limit will not set in first, it would eventually stabilize at something like 30 V.

With the SMPS there is one point missing to make it work as intended: L1 and L2 are supposed to be coupled inductors. The coupling (K1 L1 L2 1) is missing.This makes the converter run much better, but I still have it close to the edge of oscillation. Attached is a version that just at the border to instability.
A simplified the linear part to speed up simulation - the final version would have to add things again, but for the SMPS part this does not matter. Also 10 V output is used to speed up simulation for the initial tests.

[VEGETA]

I think this is kinda complete now because I re-added everything else and modified it a bit to achieve 1v dropout (R26 = 2.5k) and eliminate as much noise as possible. What interests me is the little repeated noise or sparks (1-2mA) in the current output, they seem to fade out when I put something like 1000uF. This version does use massive filtering of around 9 of 100uF caps and 2 of 4.7uH inductors. Maybe we can live happily without all that but there will be that noise in current which is annoying since maybe 1mA can be set by the user (or maybe make it a minimum of 10mA to be more realistic).

There is also one weird thing which is the output of SMPS is not flat when I set the design for 20v. I mean it doesn't output 21v flat but with these mountains and valleys  . Perhaps this has something to do with the "repeated" noise in current. I think it is ok since the final voltage is from linear stage and will filter out all of that, but is it ok to put a very big filter to clean it out without bad side effects like slow response? or is it better to keep it this way?

As of your changes, interesting thing is the 10R you added to the shunt of the switching IC. it makes the total resistance 1uR less xD. What is the purpose? I understand the 100pF is for filtering. On the other hand the 20pF (C26) is for filtering too right? these values might be bad for consolidation purposes later on.

As for coupling, datasheet didn't make it a must but it did put it in the recommended parts. Your addition of that coupling parameter is nice since I thought the dots are enough for it. I picked 10uH coupled inductor because I saw a suitable cheap part for it, since the original datasheet suggestion of 4.7mH one is not gonna be used.

[Kleinstein]

I am not sure if the extra small caps at the shunt and the FB pin are actually needed. I added them before a found put the coupling was missing. One might get away with 100 pF each. The 10 Ohms are not in parallel to the shunt, but for an RC filter with the extra cap. If one needs it, depends on the layout and inductance of the shunt, so hard to tell from a simulation.

At 20 V (or high power in general) the SMPS seems to be a little sensitive to oscillation. So I would guess the compensation is not really good yet. Changing R9 for a lower drop makes things even more critical. Having a larger inductor could also change things. With the coupled inductors one has to be careful: they have to allow for a relatively high current before saturation. The cheap ones are often current compensated chokes - they only work well with the same current trough both coils and saturate fast otherwise.

For the filter caps, I used relatively small one to keep the speed of the simulation high (lack of patience). To dampen the high frequencies it is more like the small low ESR caps in parallel are as important and the large ones.

[VEGETA]

Here is where I searched for the coupled inductor: http://www.digikey.com/products/en/inductors-coils-chokes/arrays-signal-transformers/73?FV=d300001%2C11240026%2C1f140000%2Cffe00049%2C1d74007b%2C1d740142%2C1d74014c%2C1d74004a%2C1d740051&mnonly=0&newproducts=0&ColumnSort=1000011&page=1&stock=1&pbfree=0&rohs=0&quantity=1&ptm=0&fid=0&pageSize=25

I made output caps different, all 100uF with 1uF and 0.1uF caps for high frequency stuff. I could make then 220uF but this would be kinda too much right? However, there is still non-flat result even with these settings. The first filtering stage has 5x 100uF caps. Paralleling caps is much better than picking one big "beefy" 1000uF cap. output inductors are 10uF as you can see. How do you know that the circuit is about to oscillate or near that edge?

I couldn't find a better solution for making 1v dropout than adjusting R9 to 2.5K. Maybe because the loop itself is not clear to me, or more precisely how to calculate the required value. Which leads to the question why making it low value could damage the loop stability? since it sets the value.

[Kleinstein]

You usually don't want so large filter inductors: 1 st off they are big and expensive. They also make the response slow - to slow to have the feedback from behind the filter. This is why I choose the feedback from after the first filter.  With the unstable loop there will be the 300 kHz main clock and something like 10-60 kHz oscillation of the regulator loop. One needs to get rid of this second frequency by adjusting the feedback, not by filtering. The version I showed did that at least most of the time (except at more than about 30 W of power). So it likely needs some optimization with the simplified linear stage (this speeds up simulation).

The regulator loop gain for the SMPS is proportional to R12/R9  (older versions). There is a second feedback path via R13 /C26 (older version) - this is faster and may be needed for this reason. So R9 < R12 is problematic as this extra gain compared to direct feedback.

To test the SMPS loop, one can use a step function in the load current. I used something like a 0-1A step in addition to a little base load. The step response looked reasonably good (not too much drop one the load change) - so much of the loop is Ok. This makes me think the funny looking oscillation in the 10-50 kHz range could be due to current limiting or similar setting in, not just classical instability of the normal loop. Changing the compensation helps a little to reduce the oscillation (e.g. only with high power). Still this problem needs to be solved first - one we have a working SMPS you can add the full linear part. This could be still a long way to go.

There is a way to set the drop without effecting the look gain: this is by having the base of the transistor not going to GND, but may be a -1 V.

[VEGETA]

how did you know the rough number of 10-60KHZ? I remind you that the current frequency of the SMPS is 500KHz not 300. So did you do AC analysis or something? I didn't learn it yet.

the -1v can be taken from a diode to the battery - terminal like we did with the isolated supply right?

[Kleinstein]

The -1 V can come from the negative side of the isolated supply. Depending on the diode used it might be directly the negative supply, or a divider to GND.

The oscillation frequency depends a little on the filter used. I got something like a 10-50 kHz superimposed to the output when the SMPS loop is oscillating. In the last shown circuit the frequency is rather low (e.g. 4 kHz) as the filter caps are really large and the inductors quite large. The SMPS part was way better in the version I had attached. Also the filter caps in inductors were much more practical and the response to a current step was good. So nearly acceptable. One might be away with it by lowering the specs a little (e.g. add an extra 20 W power limit, so only 1 A at 20 V or <10 V at 2A).

AC analysis for the SMPS part is difficult. I only did the transients, but at different voltages (the higher voltages are more critical) and with a step in the load current (it is included in the circuit). As each run takes quite some time one can only do sample testing (e.g. 2 V, 6 V 10 V, 20 V). I started with a lower voltage as this is faster - it helps with a try and error search.

[VEGETA]

Lowering the specs is out of question (I thought about it before), originally I wanted something crazy like 50v/5A or so, but 20v/2A is nice and more than good enough for most people.

The -1 V can come from the negative side of the isolated supply. Depending on the diode used it might be directly the negative supply, or a divider to GND.

Pfff I misunderstood you there! I thought the output of Q2 not the base! the base is before the 0.1R shunt which is effectively ground. So yeah, from the isolated supply with a simple divider! resistor tolerance won't be a problem since it is not needed to be that accurate -1v.

The oscillation frequency depends a little on the filter used. I got something like a 10-50 kHz superimposed to the output when the SMPS loop is oscillating.

Well, I tried to figure out what that means and this is the result:

This is when it is 20v with 2A (10R load).



I zoomed on the output voltage and it is like this, I noticed that there are spikes in the waveform that are not like the rest of it. I know from some videos I watched that this shouldn't exist, the correct thing is a uniform clean waveform... thus I considered it to be the thing you said about 10-50KHz stuff. Is it correct?

Now for a closer look:



This is when it is 20v with 2A (10R load).

the image is for the output voltage but zoomed and focused on it when it is stable not in the ramping up stage. I measured the frequency of the blue one (red one is a little shorter on its zenith than the blue) and it is around 11.1K or something (don't remember correctly). Is this what you meant?

Now, you said lower voltages are good and could be a final circuit for them... I tried 5v to see the exact way I did with 20v and this was the close look on the waveform:



I guessed it is correct since the waveform is clean and let's say "homogeneous" unlike before! the ripple here is natural I guess since it is zoomed a lot and  there must be something like this.

___

^
Is my understanding correct here? I used my mind to think of what you said and I hope I learned something correct! 

when the SMPS loop is oscillating

how did you know the loop was oscillating? I mean is it from the waveforms like the ones I posted?

___

If my understanding and analysis is correct, then what means should be taken to fix the thing? taking the feedback from before all filtering? or make more filtering?

[VEGETA]

I re-changed the circuit according to your recommendations and a bit of what I understood and tried (see previous post), I came out with these changes:

1- The transistor base is now connected to a -1.13v instead of ground. the -1.13v is from using a divider (1K || 1.5k) from ground to negative isolated source. I did a bit of trials to achieve a true 1v dropout (tested it with 5v and 20v).

2- Put a 10nF+1kR from the FBX pin to OUT- as a filter, which eliminated that 10-50KHz component (if my understanding in the previous post is correct). Now even 20v output is very clean without that component. Even 30v is good but it is out of our spec of 20v max.

3- changed R10 from 10K to 1K for no obvious reason. I just thought that I already have high resistance in there due to the new divider as a source, so lowering R10 seemed good since Q2 is a BJT and needs current to open xD.

I haven't tried this on the full version yet, I just want your opinion.

THANKS!

[Kleinstein]

The extra filter (RC to "ground") at the FBX pins seem so have done the magic. There is only a little of the oscillation left during start up.

However with the small IRFP240, the 1 V drop seems to be too little as now it includes the shunt. On a load current transient (0-2A) there is a little of drop out. However this should be relatively easy to fix (use the divider form the shunt, instead of from GND). For 2 A the slightly larger IRFP250 might be the better choice if so little drop is wanted.

The SMPS part seem to run better with the 4.7 µH inductors. Due to the high current load one might need two of the 10 µH inductors in parallel anyway. Even than up to 20 A peak current is a lot and relatively close to saturation. One might be able to reduce the peak current with a larger current sense resistor a little.

[VEGETA]

Yup it has done the magic after spending the night trying and measuring rather that the obvious choice of playing League of Legends! (do you play it?)

Currently, the IRFP250N is the choice that I will go for it but someone suggested this mosfet: http://www.digikey.com/product-detail/en/fairchild-on-semiconductor/FDB33N25TM/FDB33N25TMCT-ND/1923068

I think I examined it and worked in simulation. It has the advantage of SMD version at least, I still don't know if it is good enough or not.

If you increase R_sense of the SEPIC converter, it will reduce the maximum output current allowed. We are already near the edge, now it supports 2A and it is stable as you see. The coupled inductors are 10uH each so I guess it is OK even for 20A spikes. you mean by 4.7uH inductors the coupled ones in the SMPS circuit or the output filtering ones?

I remember 4.7uH didn't work nice and I had to use 10uH to allow more current with the 5mR sense resistor... so getting back to 4.7uH will be bad I guess.

As for the oscillation in the start up, I did notice it but didn't give it importance since it is eventually gone and the output became clean. Should we try to kill it or just leave it as it is?

My interest is to know if my previous analysis and posts are right or not?

What should we do next?

[VEGETA]

"""However this should be relatively easy to fix (use the divider form the shunt, instead of from GND)"""

?

[Kleinstein]

The 10 µH inductors you linked before had ratings for the saturation current of something like 10 A. So it will be a big problem if the current goes higher than this, as the current will than go up way to fast. The peak current has to be limited to less than the saturation current.

Also the DC resistance is not that low - so there will be quite some power loss at the inductors. As a 3rd point, there will be magnetic loss in the inductors. At such a high frequency the maximum useful magnetization is usually reduced (but rare peaks at higher current still allowed), as otherwise the inductor would overheat from the loss. This could mean the useful current may be only at half the saturation current - so even 2 of those inductors in parallel might not be enough. The loss rating on inductors are not that simple and I have not looked in detail on the data-sheets. With the 10 µH inductor there is also more "ringing" after a load change. So in this case the compensation would still need a little more tweaking (double C5 to 20 nF). The simulation does not even look bad with only 3 µH inductance.

A larger inductor is also physical larger and more expensive. This is also true for the filters. One might get away with 1 µH there if 2-5 µF ceramic caps are used.

I know the power is somewhat limited by the peak current, but so far is looks like we could go slightly down with the peak current. Under normal steady state operation something like 15 A is good enough, even for 2 A at 20 V.

For the output rating, the hard part is high current at high voltage. So limiting the peak current at high voltage would make some sense. At lower voltage, even more than 2A are not a problem. So maybe 1.5 A at 20 V / 2 A for  < 15 V and 3 A for < 10 V, maybe even 5 A at < 5 V, might be a kind of compromise. For this type of SMPS it is just natural to have a power limit, and not a fixed current at all voltages.

I think the SMD MOSFET (FDB33N25TMCT) should also be OK. I have some doubt in the higher voltage part of the SOA curve shown in the DS (not sure this is not just reflecting the Ptot curve without case for thermal stability). But as the voltage is quite low here, this fet should still be ok.

The previous analysis on the feedback and for the "10-50 kHz" is OK. For those oscillations there seem to be two types: the ones shown in your simulation plots, with a rather non sine waveform. These somehow involve reaching some hard limits and thus likely appears during start up when the current is very high. There is also a slower more sine like version, after a step in the load current. For the current configuration this is damped enough (at least with 5 µH, not so well with 10 µH).

[VEGETA]

I've set inductor settings to 15A saturation current and above, then I chose 4.7uH and this was the result:

http://www.digikey.com/products/en/inductors-coils-chokes/arrays-signal-transformers/73?k=&pkeyword=&pv1097=248&FV=d300001%2C1f140000%2Cffe00049%2C1d7c000a%2C1d7c000b%2C1d7c0011%2C1d7c0012%2C1d7c00bf%2C1d7c00c5%2C1d7c00d9%2C1d7c00dd%2C1d7c0019%2C1d7c011f%2C1d7c0035%2C1d7c0038%2C1d7c0050&mnonly=0&newproducts=0&ColumnSort=1000011&page=1&stock=1&quantity=1&ptm=0&fid=0&pageSize=25

As I told you the specs are out of question, I can search for suitable parts all day long otherwise xD.

Here is what I did:

1- changed the mosfet to FDB33N25.
2- made soft-start capacitor 20nF instead of 10nF (practically I will put 2x 10nF in parallel for consolidation).
3- changed R_sense to 7mR instead of 5mR. This will surely help reduce the maximum peak switch current.
4- changed filtering inductors to 2.2uF because of point 5 below.
5- coupled inductor is 3.3uH now (+21A saturation current and +10A rated current!). I tried 4.7uH (16A saturation current) and worked well too.

the 3.3uH is here: http://www.digikey.com/product-detail/en/bourns-inc/SRF1280A-3R3Y/SRF1280A-3R3YCT-ND/5031136
new 7mR sense resistor: http://www.digikey.com/product-detail/en/rohm-semiconductor/PMR100HZPFU7L00/RHM.007AUCT-ND/2094559
2.2uH filtering inductor (suggestion): http://www.digikey.com/product-detail/en/laird-signal-integrity-products/MGV10042R2M-10/240-2935-1-ND/5269990  << this has +25A saturation current.

for 2A output current, the max peak is about 11A or so, call it 12A. For the new circuit of 3.3uH and 7mR the current waveform shows around 10A peak when it settles on 2A max output, and around 17.5A before during ramping up. so 10A maximum peak current while the inductor of 3.3uH allows a maximum peak saturation of more than 21A... this is the half saturation current you looked for isn't it?    filtering inductors are the same too, +25A saturation if it is necessary, if not then it is ok to pick for the rated current only.

here is an image of the current in 7mR:





and this is the image for the current in L1 and L2 (coupled inductor):



settles around 9.5A and 6.5A.

So I guess this is the solution, right?

[Kleinstein]

The 3.3 µH inductor should work ok. In theory power loss could be still an issue. But this is hard to tell. So it needs a prototype.

For saturation the relevant current is the sum of the two current. As they are often out off phase this will usually not make a big difference.

The output filter inductors do not need such a high current rating. Here the current will no be much above 2 A (maybe 3A) and occasional saturation would not be a big problem (output noise spikes). So these inductors could be  smaller form factor - more the DC resistance is important.

[VEGETA]

So can we put another coupled inductor in parallel with it? to solve saturation issue. Off phase will help right? I will try to choose another filter inductors which has very small resistance with 3A or more capability.

So besides saturation current issue, can we saw the circuit is good and ready?

I will "try" to make a PCB using CircuitMaker (hopefully before next month) but my laptop is wooden! I am gonna buy a new one in the last of this month anyway. A PCB will be only this stage not the full PSU, so no LCD, battery,... etc. Just the circuit shown here. I will make the "Isolated" supply a battery pack while the input is something else like a laptop charger or maybe another battery... since it is isolated.

[MarkF]

I haven't read through entire thread but offering the power supply design Peter Oakes did as a reference. It's similar to your design.

[Kleinstein]

Having a second inductor in parallel could be a little tricky with coupled inductors, if they are not perfectly 1:1. Normally they should at this low inductance, as there will be something like 5 or 10 turns - so easy to get exactly the same number of turns.  If one wants one could have the input side directly in parallel and have the coupling capacitor, inductor half to ground and the diode separate.

The peak current through the diode is rather high anyway. So splitting the current to two smaller diodes might not be so bad for thermal reasons.

Having the option to use a second inductor is a good idea.
Now the frequency is rather high - this helps with small inductors and easier ripple filtering, but is also makes it more sensitive to the layout and parasitic effects. As I don't have much experience with SMPS, I would prefer a lower frequency for the beginning and thus more like 2 of the 10 µH inductors in parallel.

There may be still a few points of BOM reduction at a few points. I am not so sure the 100 Ohms in parallel to the filter inductors are really needed. The input side might need a little more capacitance for EMI reasons. Also a fuse might be a good idea - though not that easy at 10-20 A. I would guess a under-voltage lockout is a good idea too - I don't know if the SMPS chip is good enough for this, or if more is needed.

In the linear part, there is still the trade of question on how fast the current limit needs to react. A very fast current limit cause larger voltage drop on transients, when close to the limit. There is still the question if an extra fast current limit is needed - this could be rather simple, like just one more small transistor. As the SMPS part can deliver more than 2 A at lower voltage, one could allow more than 2 A for lower voltage settings in the linear part too.

The circuit has 3 main logical parts: the SMPS, the linear regulator part and control / display part with µC/LCD and ADCs/DAC. For a first try one could use simple pots instead of digital control.

The DCDC converter is just a small part - so I would still have place for it on the board (e.g. near linear regulator) some of the DCDC blocks have a good chance to work directly from an 6-8 V battery as well - so one might get away without a regulator before the DCDC. Having a regulator just for the DCDC block is somewhat strange - the efficient way would be an isolated SMPS like a small flyback converter or a Royer converter.

With the SMPS part there is still a chance it will not work well the first try due to layout or similar issues.
If there is sufficient cooling (e.g. IRFP250), the rest would also work without the SMPS part.

[VEGETA]

Having a second inductor in parallel could be a little tricky with coupled inductors, if they are not perfectly 1:1. Normally they should at this low inductance, as there will be something like 5 or 10 turns - so easy to get exactly the same number of turns.  If one wants one could have the input side directly in parallel and have the coupling capacitor, inductor half to ground and the diode separate.

The peak current through the diode is rather high anyway. So splitting the current to two smaller diodes might not be so bad for thermal reasons.

So you suggest putting 2 of the same diodes in parallel to each other, as well as, 2 of the same coupled inductors in parallel too? Like L1 || L2 and L2 || L3 while both of them are 3.3uH? splitting the current helps for sure but I hope it won't do other problems. The inductor is cheap and around 1.5$, 2 of them is not a problem. No reason to believe they are not identical because they are the same part.

Now the frequency is rather high - this helps with small inductors and easier ripple filtering, but is also makes it more sensitive to the layout and parasitic effects. As I don't have much experience with SMPS, I would prefer a lower frequency for the beginning and thus more like 2 of the 10 µH inductors in parallel.

Well, I don't like the idea of returning to use 10uH L1 and L2 since the overall saturation current is high and it will cost a lot to get one to suit it, that is why 3.3uH one is nice since it is cheap and can tolerate saturation currents. Unless you want to put 2 10uH coupled inductors in parallel.

Also, I believe 500KHz is still considered slow in SMPS world. Some ICs allow 2 MHz or even 3 MHz of operation. As for layout, I will try to do it like the datasheet suggests and why not read about it more.

There may be still a few points of BOM reduction at a few points. I am not so sure the 100 Ohms in parallel to the filter inductors are really needed. The input side might need a little more capacitance for EMI reasons. Also a fuse might be a good idea - though not that easy at 10-20 A. I would guess a under-voltage lockout is a good idea too - I don't know if the SMPS chip is good enough for this, or if more is needed.

the additions must include output enable and short circuit protection, as well as, a down programmer if it is necessary. output enable can be added by putting a transistor as a switch from the "+P" voltage to the linear mosfet gate right? no need for the current mirror circuit. I don't know about short circuit protection, but maybe the type of circuit that you posted before can work... the transistor using the current monitor shunt resistor, so it can provide 2 jobs. I don't know anything about under voltage lockout.

what do you mean by the IC being good enough? this IC LT3757A is a must here for many reasons. the A version is to be used not the normal one.

remind me why we put the parallel 100R?

In the linear part, there is still the trade of question on how fast the current limit needs to react. A very fast current limit cause larger voltage drop on transients, when close to the limit. There is still the question if an extra fast current limit is needed - this could be rather simple, like just one more small transistor. As the SMPS part can deliver more than 2 A at lower voltage, one could allow more than 2 A for lower voltage settings in the linear part too.

faster CC is better I guess, but can we actually manipulate it? the faster current limit (short circuit protection) is good idea as I said before. Well, I'd like to keep the design simple in terms of specs with 2A maximum current at all times. My concept is to use 18650 batteries as the source, like putting 2 parallel and 2 series which will be 8.4v @ 6AH approximately. So drawing 2A is around 3 hours without a charger which is nice. increasing the specs will make it a non-practical design which will eat the batteries so fast.

The circuit has 3 main logical parts: the SMPS, the linear regulator part and control / display part with µC/LCD and ADCs/DAC. For a first try one could use simple pots instead of digital control.

Hmm I must include the op-amps in this (didn't decide on which one yet -> LT1014 is the first to my mind). Yes POTs can be used but I must get a 2.048v voltage reference anyway. I will get some pots to do it as you suggested.

The DCDC converter is just a small part - so I would still have place for it on the board (e.g. near linear regulator) some of the DCDC blocks have a good chance to work directly from an 6-8 V battery as well - so one might get away without a regulator before the DCDC. Having a regulator just for the DCDC block is somewhat strange - the efficient way would be an isolated SMPS like a small flyback converter or a Royer converter.

I will try to get one, the requirements are 5-9v input to 12v output while delivering something like 100mA or so. Help me out searching for one. I know that it is not efficient to get a boost for this DC-DC converter but it won't be pricey.

Anyway, this is what I think a suitable part is: http://www.digikey.com/product-detail/en/cui-inc/PCN2-S5-S12-S/102-3929-ND/6181024

it's only drawback is the input is 4.5-5.5v only so my solution is one of these:

1- from a 5v regulator which I think will exist in the design << referenced to "battery" side of course.
2- from a simple resistor divider, this is bad because of the battery pack voltage won't be the same thus it will get lower than 4.5v. so forget it. (not to mention power).
3- connect a 5.1v zener diode before the input. I think it is the best choice since the max output current is around 167mA @ 12v thus 2W of power. I think this can work.

so it is either 1 or 3. what to choose?

With the SMPS part there is still a chance it will not work well the first try due to layout or similar issues.
If there is sufficient cooling (e.g. IRFP250), the rest would also work without the SMPS part.

what about " the rest would also work without the SMPS part"? do you mean supplying it with 6v and asks for 5v?

I don't believe SMPS has any good reason not to work ^_^. What stuff in layout can affect it?

[Kleinstein]

A lower frequency would likely need a higher inductance, like 4.7 µH. 2 of the 10 µH inductors in parallel would be 5 µH and twice the saturation current. For the inductors one could use them directly in parallel or alternatively have the second coil, that goes to out- separate, so with it's own capacitor and its own diode. The second version would also provide current sharing for the diodes.

A low frequency SMPS is more like 20-50 kHz. With an external MOSFET 500 kHz is already quite fast. The really high frequencies SMPS are controllers often have the power stage integrated. The critical parts in the layout are the different current paths that change - they need to be low area. Also ground currents can be tricky, as at 500 kHz there is no such thing as a low impedance ground. The "reverse rovery"/capacity discharge current from the diode can include current spikes in the ns range and thus frequency components up to the 100s MHz range - this can cause surprising resonances. So there is some room for surprises.

There is already a two step short circuit protection: the CC mode regulation and the current limit at the SMPS part, thought this might give something like 15 A at 1 V.  I would suggest a second fast acting current limit that would act at something like 5 A, just with a small transistor to parallel the CC mode regulation.  When having a second fast current limit, it may not be that desirable to have the current limit extremely fast - it really depends on what the user prefers. There is an option to make it a little slower if needed with just a minor change (e.g. move one resistor).

Most SMPS chips include a protection against to low a input supply and will turn off in this case. I am not sure if this function could also be used to protect the batteries from to low a voltage. There is a small chance it could, but I am not sure. So one might need an extra one or could be lucky and get away without.

Increasing the specs would be only at low voltage, like < 10 V.  The SMPS is mainly power limited, so is the battery. At 2 A and 20 V the battery will only last about 1 hour, just like 4 A at 8-9 V.

For the OPs I would tend towards an TLC274 for a low cost option and maybe OPA4177 as an accurate version. One might still use 2 dual OPs as well. The LT1014 is rather slow and expensive. It somewhat depends on the voltage of the DC/DC converter.

A down programmer part is possible, but it should also be included in the output enable part. For this reason the current mirror version might be the better choice. Otherwise just pulling the gate towards GND would be enough. The down programmer version I have in mind would however deliver current that is not measured with the shunt - so the current reading would not include it. Software could compensate a constant current version.

For the DCDC converter, a small flyback converter would be the logical solution. It just needs the suitable "transformer". Having an extra regulator before the DCDC will waste quite some power and thus might not be good if the µC /LCD needs a lot of current. If you don't mind winding a small transformer, a royer converter would be also easy - it like a DCDC converter the old style: jelly bean parts (except for the transformer - e.g. small ring core), low noise and a fixed ratio, but free to choose via transformer windings. So something like 6-8 V to 9-13 V would be OK.

[VEGETA]

A lower frequency would likely need a higher inductance, like 4.7 µH. 2 of the 10 µH inductors in parallel would be 5 µH and twice the saturation current. For the inductors one could use them directly in parallel or alternatively have the second coil, that goes to out- separate, so with it's own capacitor and its own diode. The second version would also provide current sharing for the diodes.

if it won't affect stability I have no problem with it, not to mention speed. So should we revert back to 300 KHz? In the schematic it shows the coupling capacitor has "x2", is it 2 of it in parallel? this means we must put 2 to each second inductor which means a total of 4x 4.7uF caps.

A low frequency SMPS is more like 20-50 kHz. With an external MOSFET 500 kHz is already quite fast. The really high frequencies SMPS are controllers often have the power stage integrated. The critical parts in the layout are the different current paths that change - they need to be low area. Also ground currents can be tricky, as at 500 kHz there is no such thing as a low impedance ground. The "reverse rovery"/capacity discharge current from the diode can include current spikes in the ns range and thus frequency components up to the 100s MHz range - this can cause surprising resonances. So there is some room for surprises.

So get back to 300 KHz? you mentioned 4 layers board is good for high speed, but it is not preferred here. what could we do?

There is already a two step short circuit protection: the CC mode regulation and the current limit at the SMPS part, thought this might give something like 15 A at 1 V.  I would suggest a second fast acting current limit that would act at something like 5 A, just with a small transistor to parallel the CC mode regulation.  When having a second fast current limit, it may not be that desirable to have the current limit extremely fast - it really depends on what the user prefers. There is an option to make it a little slower if needed with just a minor change (e.g. move one resistor).

So a transistor with the shunt resistor is ok here? is our current CC fast or too fast?

Most SMPS chips include a protection against to low a input supply and will turn off in this case. I am not sure if this function could also be used to protect the batteries from to low a voltage. There is a small chance it could, but I am not sure. So one might need an extra one or could be lucky and get away without.

I guess that is another issue, as I will design (I am have to) a battery protection and charging circuits since it is Li-Ion battery pack. So that could solve it if the SMPS IC cannot.

OP-AMPS

this is yours: http://www.digikey.com/product-detail/en/analog-devices-inc/OP4177ARZ/OP4177ARZ-ND/820357

8$ is too much, plus is there any linear.com part instead?

Increasing the specs would be only at low voltage, like < 10 V.  The SMPS is mainly power limited, so is the battery. At 2 A and 20 V the battery will only last about 1 hour, just like 4 A at 8-9 V.

As I told you, no need for such high currents. 20v @ 2A is only one hour with 8.4v/6AH battery pack?

A down programmer part is possible, but it should also be included in the output enable part. For this reason the current mirror version might be the better choice. Otherwise just pulling the gate towards GND would be enough. The down programmer version I have in mind would however deliver current that is not measured with the shunt - so the current reading would not include it. Software could compensate a constant current version.

I don't really understand the goal of down-programmer so much and why it is good for power supplies. Combining it with the current mirror output enable adds more complexity unless you have something in mind already.

For the DCDC converter, a small flyback converter would be the logical solution. It just needs the suitable "transformer". Having an extra regulator before the DCDC will waste quite some power and thus might not be good if the µC /LCD needs a lot of current. If you don't mind winding a small transformer, a royer converter would be also easy - it like a DCDC converter the old style: jelly bean parts (except for the transformer - e.g. small ring core), low noise and a fixed ratio, but free to choose via transformer windings. So something like 6-8 V to 9-13 V would be OK.

The reason I hate this is that I don't know how to design such circuits, plus the need for a transformer which will be pricey with the other ICs. For now the DC-DC module works fine... this maybe an enhancement when everything else is working nice.

[VEGETA]

I couldn't get a suitable Linear.com part, maybe LT1884 was nice but the output had some weird little spikes. Do you know a linear.com op-amp to use here? it is ok if it is only dual channel. OP4177 is massive 8$ so out of question already (is its accuracy gonna affect much?) and TLC274 seems good 4 op-amps in one cheap package with 2.2 MHz but I fear its accuracy is going to ruin what we want.

[VEGETA]

I started a project in CM for the prototype board, but now I should search for SMD version of our parts. I replaced the PNP with BC807-40 due to this reason, simulation was ok but the drop voltage is now a little bit less than 1v.

Although there as some nasty stuff in the ramping up stage when using the new PNP:



I don't know what that is but it eventually settles up. Is it ok or should we search for a new SMD PNP? I choose BC807-40 because it is in LTSpice already and it has SMD package (SOT23-3).

[Kleinstein]

For the OPs it really depends on the source where you get them. Another possibly good type (more on the cheap side) would be the TLV4171 - could be slightly better than the TLC274. The specified dirft is not that bad at all, and due to the switcher up front the supply will not be super low noise anyway. One might use a better OP for the slightly more critical part of current sensing, so two dual OPs instead of a quad.
I have not found much at LT - they are not so much in low cost general purpose parts, more higher price good quality.

The circuit is not critical to the OPs performance, so there is no need to limit the parts to those where you have special models for.

The current limiting in the last linear regulator is relatively fast. So it could just work without an extra fast current limit. However this fast limit also means there will be a not so good response to transients that go close the to set current limit - a slower current limit would allow a short current peak to go higher and this way it can be faster back to the set voltage. In this case the extra fast current limit is likely needed.

I would at least plan for 2 inductors in parallel, so there would be the option to go for a lower clock like 200-300 kHz if we need to. It also leaves some room for the case a higher current is needed.

The down programmer is a circuit part to allow the output voltage to be regulated down too. So a kind of limited 2 quadrant output. It depends on the application if you need it or not - it can help a little with a fast voltage regulation. The minimum version would be a constant current sink, maybe with control from the µC, so it can be turned off together with the normal output disable. The constant current sink is rather simple.

The under voltage lockout of the LT3757 might be good enough - only still need to turn off the DCDC converter to.

2 A at 20 V is a power of 40 W. With something like 80% efficiency this would need something like 50 W from the battery and thus something like 7 A at 7.2 V. The battery will be 8.4 V only when full. On average it is more like 7.2 V. So it might not even last a full hour at full output power.

[VEGETA]

For the OPs it really depends on the source where you get them.

Digikey only for now.

One might use a better OP for the slightly more critical part of current sensing, so two dual OPs instead of a quad.

Ok, like what? I got the idea of using a nice dual op-amp for CV and CC while the rest are with TLC274 or so. Just what op-amp should it be? I searched linear.com parts because they are in LTSpice, but they are kinda pricey. Actually, some of them didn't show a good output at all in simulation. How do I know a certain op-amp is suitable or not?

The current limiting in the last linear regulator is relatively fast. So it could just work without an extra fast current limit. However this fast limit also means there will be a not so good response to transients that go close the to set current limit - a slower current limit would allow a short current peak to go higher and this way it can be faster back to the set voltage. In this case the extra fast current limit is likely needed.

Should we do it now or make the prototype without it?

I would at least plan for 2 inductors in parallel, so there would be the option to go for a lower clock like 200-300 kHz if we need to. It also leaves some room for the case a higher current is needed.

2 inductors of 10uH each @ 300 KHz?

The down programmer is a circuit part to allow the output voltage to be regulated down too. So a kind of limited 2 quadrant output. It depends on the application if you need it or not - it can help a little with a fast voltage regulation. The minimum version would be a constant current sink, maybe with control from the µC, so it can be turned off together with the normal output disable. The constant current sink is rather simple.

you mean faster transition from high to low voltages?

include it now or after first prototype board?

The under voltage lockout of the LT3757 might be good enough - only still need to turn off the DCDC converter to.

maybe they are the same result anyway.

2 A at 20 V is a power of 40 W. With something like 80% efficiency this would need something like 50 W from the battery and thus something like 7 A at 7.2 V. The battery will be 8.4 V only when full. On average it is more like 7.2 V. So it might not even last a full hour at full output power.

that is the responsibility of the user. also, the design has a wall adapter of at least 2A (ready ones, won't make it myself) for charging purposes. So if he wants such high powers continuously, he must connect the charger to charge the batteries and share current too.

the other option is to go for 6 of 18650 li-ion batteries. either 3 parallel x 2 series (8.4v @ 9AH) or 3 series x 2 parallel (12.6v @ 6AH). Fort now, let's keep it like it is.

[Kleinstein]

The requirement for the OPs are not really high. Something like 1 MHz (maybe 500 kHz) is fast enough, and no need to have single supply or rail to rail IO. The supply would need to go up to about 12 V - so the modern 2-5.5 V OPs are not a real option.
Just avoid the LM358 (and related) as they have this nasty cross over delay.

Something like the TLC272 / TLC277 (slightly better) should be well good enough. I would not go much cheaper/older than the LM1458. This is one thing one can change later if one really needs high accuracy and has decided on a good DAC/ADC. So I would consider the TLC272(or 4) good enough for the first board.

With the speed of current limiting, you have to decide. One can slow it down a little with moving the path to the anti windup transistors base to the other side of the diode. The extra fast limit is just a small transistor, that limits the drop over the shunt to 0.5-0.6 V. So I would include the extra transistor (it does not really hurt) and maybe the option for the second resistor position.

Similar the current sink to bring the voltage down again faster is not a big effort and nothing special. So one can include it from the beginning. There is still the option not to populate.

[VEGETA]

OK, I will choose TLC277 dual op-amp for CV and CC for now, this one: http://www.digikey.com/product-detail/en/texas-instruments/TLC277CDR/296-26747-1-ND/2255142

What I want to know is how to determine "quality" increase of the op-amp in the design. Or namely how op-amp1 is better quality here than op-amp2? My guess would be the minimum voltage that it can detect and the speed which it runs by - 2.2 MHZ (according to digikey) for the TLC277 I guess, right? although it says 0.3 MHz GWP in datasheet.

I am willing to use 16-bit ADC/DAC (not a very great pricey one, just one that works) so a good op-amp is a must here. I wanna know how to choose one and how to differ between them.

What I came up with is the following choices:

1- LT1678, it is a good high quality choice with somehow reasonable (not really xD) price of 5$. there is the 79 version of 4 op-amps but no need.
2- OPA2180IDR, price is 2.87$.
3- MAX44245ASD+  -> 4$ but has 4 op-amps in it.

I leave this topic for discussion later on, for now we'll get normal opamps.

Now the rest is 2 opamps, one for CV\CC indication and the other is for voltage monitoring. I guess TLC272 can work here for now: http://www.digikey.com/product-detail/en/texas-instruments/TLC272CDR/296-1310-1-ND/404948

or maybe get the 4 opamps version if I need more. If not, then maybe a precision high quality 4 op-amp package can be used for component consolidation.

TL;DR:

For now, TLC277 for CV\CC and TLC272 for the other 2.

___

I don't see why we should slow the CC part, if you remember, it was THE problem of the past typologies xD. Thus, adding an extra current limit which acts only when short circuit or violent events happen is the best option. Dunno how to do it now so I will leave it to the rest... down-programmer is the same too.

___

I feel very confident now since the major stuff are good enough in this main circuit, the rest is somehow manageable. I will "try" to make a PCB with CM in this laptop, so I hope I will make some progress before getting the new laptop in the last of this month.

___

BTW, I made a newer version with these changes:

1- parallel 10uH coupled inductors.
2- changed the shottky diode to MBRB2545CT because it has SMD version (which is important)... circuit functions better now, or maybe I am not seeing correctly.
3- Q2 is now BC807-40 for SMD version.
4-  switching frequency is now 300 KHz.
5- due to 4, filtering inductors are 4.7uH again.
6- Q3 is now BC807-40 for the smd version.

drop voltage is now less than 1v (0.94v @20v) due to the change of Q2. Notice that the negative supply of it's base is not precise too so there should be some compensation or just leave it as it is. I picked a divider resistor of 1k with 1.5k due to standard values. the negative isolated supply is not precise too since it doesn't give 9v and -3 exactly.

from now on, anything must be SMD except for what is impossible to get SMD for.

[Kleinstein]

The main important properties for the OP are offset drift and to a lesser extend low frequency (e.g. 0.1-10Hz) noise. For voltage regulation the the contribution to output drift would be something like 10 times that of the OP. So an OP with a 2 µV/K drift would cause 20 µV/K for the output voltage. Normal (not extra expensive) resistors are at about 100 ppm/K and thus at 1 V output would cause something like 100 µV/K. So for the initial version the LTC272(4) should be well good enough for the voltage regulation. If really high precision is wanted, one would need to use better resistors (R1 and R4) and a good reference too.

For the current regulation, the voltage at the OP is smaller (e.g. 200 mV for full scale) - still the TLC272 would cause about as much error as the use of normal 100 ppm/K resistors. With a 0.1 Ohms shunt, 1 µV of drift gives something 10 µA for the set current. The more critical part is usually the shunt, as the shunt will also get hot from the current and thus can have a significant temperature change. Still a few mA of drift neat full scale ouput is usually not that bad.

The diodes specified are rather big one, especially with two diodes. The peak current for both diode might reach 20 A, but the average will be only 2 A. So somewhat smaller diodes should be better.

R22/R34/R36 can be simplified to two resistors (e.g. 10 K and 15 K).

Even with 300 kHz I don't think L3 and L4 need to be so large, 2,2 µH could still be enough.

[VEGETA]

this TLC272 has an offset of 290uV (per temperature?): http://www.digikey.com/product-detail/en/texas-instruments/TLC272BCDR/296-26742-1-ND/2255137

while this one TLC277 has 250uV: http://www.digikey.com/product-detail/en/texas-instruments/TLC277CDR/296-26747-1-ND/2255142

TLC272 is 1.45$ while TLC277 is 2.16$ and both has 2 op-amps.

this TLC274 has 390uV which is a lot more than the 2 op-amps in 272 version: http://www.digikey.com/product-detail/en/texas-instruments/TLC274BIDR/296-1312-1-ND/276580  (TLC279 is quite the same with 4 ops: http://www.digikey.com/product-detail/en/texas-instruments/TLC279IDR/296-1315-1-ND/276583)

So for the initial version the LTC272(4) should be well good enough for the voltage regulation

I think you mean TLC not LTC.

I looked into the input offset voltage, I don't know if it is what you meant by drift. the LT1678 I suggested have superb specs but still 5$ is expensive... kinda worth it too.

I will choose a 2.048v voltage reference with normal 0.1% resistors for the CV\CC and measurements, with something like LT1678 (or the lesser quality TLC277) I guess we'll achieve very nice quality for the price, don't you think so?



I originally picked LT1678 for this.

the shunt of 0.1R will be 10 of 1R resistors in parallel to reduce heating and enhance tolerance. I found this one (all SMD of course): http://www.digikey.com/product-detail/en/stackpole-electronics-inc/RNCP0805FTD1R00/RNCP0805FTD1R00CT-ND/2240534

0.25W per R = 2.5W total. now I2R = 2*2*0.1 = 0.4W which is far less than 2.5W. So one resistor will consume 0.4/10 = 0.04W maximum. pretty solid solution I guess, better than one shunt resistor.

The diodes specified are rather big one, especially with two diodes. The peak current for both diode might reach 20 A, but the average will be only 2 A. So somewhat smaller diodes should be better.

well, I only picked the ones in LTSPICE that has SMD version... I will try and pick another one from digikey. requirements are at least 5A of current and the lowest drop voltage, right? do you have a suggestion?

R22/R34/R36 can be simplified to two resistors (e.g. 10 K and 15 K).

I have done that and made the filtering cap for the -1v now 10n instead of 1n. maybe good for consolidation.

Even with 300 kHz I don't think L3 and L4 need to be so large, 2,2 µH could still be enough.

Hmmm I think they gave me around 6mA ripple or something with 2.2uH, with 4.7uH it is better of course (around 1.2mA or so).

This drives 2 questions:

1- can this design set current be as low as 1mA steps? (1mV for voltage too?)
2- can we do something about the slight error of 1mA or so in the output?

[Kleinstein]

With most of the OP, there will be a significant offset voltage. So one will need a kind of software compensation for this. A 1 mV resolution over 20 V would need an DAC that us good for about 15 Bits. The OP is not really a limit here.

For the current setting the OP also sets a limit. The TLC272 or similar should be good for about 10-100 µV - that would be about 0.1 to 1 mA.

Having the 10 resistors of 1 Ohms relatively close, means they are also thermally coupled and heat sinking might not be that good. 40 mW is than not that low in power. So the temperature rise at full power might reach something like 50 K or even more - the nominal power ratings of SMD resistors assumes a rather large board and good cooling, still leading to a high temperature (thus possibly higher rating with lead free solder). Also the board might add some copper to the resistance. So I am not that convinced that 10 parallel resistors are a good choice.

Not sure why, but the TLC27x seem to be rather expensive at digikey (could be time or just a high price for small quantities). So there might be other alternatives, could be LT1013 if precision is needed.

Using slightly larger MLCC could be an alternative to higher inductance.

[VEGETA]

With most of the OP, there will be a significant offset voltage. So one will need a kind of software compensation for this. A 1 mV resolution over 20 V would need an DAC that us good for about 15 Bits. The OP is not really a limit here.

I planned all along to use 16-bit ADC\DAC since the power of this design is this core circuit. A cheap DAC\ADC can be good enough for me. The other solution was to get a big PIC MCU with internal 12-bit ADC\DAC but this is not a good one. A small MCU is always better, especially whenever there is no need for massive computation power.

2.048v reference voltage is a perfect choice here. 16-bit DAC is 65536 steps which means each bit is equal to 31.25 uV which is awesome. Now this is gonna be x10 for the output and the result is 312.5 uV minimum output voltage step... Amazing.

For the current setting the OP also sets a limit. The TLC272 or similar should be good for about 10-100 µV - that would be about 0.1 to 1 mA.

since it is 200mV maximum, I wanted to get a voltage reference for it with the same voltage, but that is not gonna be good. So will use the 2.048v one. So each bit is 312.5 uA of output, which is good.

Software compensation is a later stage, first this should work.

Having the 10 resistors of 1 Ohms relatively close, means they are also thermally coupled and heat sinking might not be that good. 40 mW is than not that low in power. So the temperature rise at full power might reach something like 50 K or even more - the nominal power ratings of SMD resistors assumes a rather large board and good cooling, still leading to a high temperature (thus possibly higher rating with lead free solder). Also the board might add some copper to the resistance. So I am not that convinced that 10 parallel resistors are a good choice.

well you could say that but it is a good solution so far. 40mW is not that big too, eventually this is the maximum power so 10 resistor will share its heat. Dave mentioned this in the video along with enhancing tolerance.

The other solution is also not that good... getting a 0.1% 0.1R shunt resistance by itself. This alone can cost more than 7$ or even 10$! It will get so hot too xD.

Not sure why, but the TLC27x seem to be rather expensive at digikey (could be time or just a high price for small quantities). So there might be other alternatives, could be LT1013 if precision is needed.

LT1013 is very nice and relatively cheap at 1.98$ at Digikey SMD version, affordable! I can use the 2 op-amps in it for CV and CC while the rest of non-important stuff are left for cheaper op-amps. You mentioned that LT1013 is slow though.

It has 200uV offset voltage which is not good enough to handle our 31.25uV of the DAC/ADC... while LT1678 is offering 20uV which is significantly better that LT1013 and even more than our requirement. It is 5$ which is not cheap but totally worth it, right?

This makes me wonder why EEZ-Supply uses TL072 which has 6mV offset along with 16-bit DAC/ADC?? if the op-amp is not gonna tolerate your DAC resolution, then why bother with such a high resolution DAC anyway? However, they are using OP27GSZ (30uV offset) for current sensing of the shunt. We are doing it along with current limiting with one op-amp.

So I guess with my humble opinion is that LT1678 is the perfect choice here for CV and CC op-amp. The rest are using lesser op-amp.

Using slightly larger MLCC could be an alternative to higher inductance.

like 47uF ceramic caps with the already existing one (1uF I guess) plus 2.2uH?

___________

Anyway, I modified the isolated supply to have 4 series 1N4148 diodes (similar to the ones in the loop) to give similar operation to the previous LED simply because of SMD version (LED didn't have that) plus they are so cheap and used elsewhere. Also, I modified the resistance divider to be 10k with 15k (15k to the negative) which is now outputting a true precise 1v drop voltage. Capacitor is 100nF which will be near Q2 in the practical circuit.

[VEGETA]

using LT1678 made this effect:



I don't know what causes it, perhaps the high speed and high sensitivity of the op-amp? I am going to investigate it.

It happens at 5v and 10v output.

UPDATE: LT1678 showed this in my latest circuit v3.6.5 which has the 4 diodes in series to give negative voltage, while on the previous circuit v3.6.4 which uses your LED negative voltage,it also showed this error while LT1013 didn't in both versions. When this happens it is around 4mS or so. I tried putting capacitors everywhere (FBX, Q2 gate, CV opamp....) but no use. the problem in the CV stage since CC is not active.

So LT1013 works fine now, the questions I have to answer are:

1- what resolution will LT1013 allow for both current and voltage? is it dependent on the offset voltage?

2- why LT1678 didn't work and showed that huge ripple? although being significantly better than LT1013. My guess is it is extremely sensitive and extremely fast so that it produces these stuff.

3- anything to solve this? other than what I tried.

[Kleinstein]

The LT1678 is rather fast and rail to rail. The high GBW might need an extra capacitor to slow it down. The rail to rail input stage means that there is a transition between the two input stages somewhere in the input range in this range the can be extra errors. So rail to rail is not so good for best precision.

The LT1013 should be fast enough for current regulation and the voltage read-back. For the CV loop I am not so sure, but a simulation would show. The TL072 is not such a bad low cost choice - at least better than the lm358, so are MC/RC4558, even if they usually don't have a drift rating, but BJT based OPs are usually not that bad.

The shunt does not need to be high accuracy. So even a 10% tolerance would be OK - the more important parameters are a low TC and high power rating, which means not so much drift due to self heating. The exact value of the resistance and reference voltage is usually considered by an calibration for the final circuit. Similar an offset of the OPs can be compensated in software. So it is not a low offset that is important but low offset drift.

One might need an extra circuit to ensure a clean start up. Usually this is to start with an disabled output. So if the DCDC converter voltage is low, the output should be off be default. So a clean start from output disable is important.

[VEGETA]

Well, I have tried many LT parts and pretty much all worked well except for LT1678 and maybe LT6016. I searched again for good suitable op-amps and found this result:

1- LT6014: around 4.4$ for the 30uV offset and 0.2uV/C drift which is maybe ok.
2- MAX44245ASD or any similar. Around 4$ with 2uV offset and 30nV/NC drift. It is R-R though. This one is 4 OP-AMPs.
3- OP2177, 2 op-amp version. 0.7uV/C drift and 15uV offset.

LT1013 has around 150uV which is too much for 16-bit DAC.

The LT1013 should be fast enough for current regulation and the voltage read-back. For the CV loop I am not so sure, but a simulation would show.

I simulated it for many voltages like 3,5,10,20v and didn't show anything bad to my knowledge. You can verify. However, I want you to try LT6014 too since it's offset and drift are much better. Maybe it can be the true final choice.

The shunt does not need to be high accuracy. So even a 10% tolerance would be OK - the more important parameters are a low TC and high power rating

So this could be a nice first choice: http://www.digikey.com/product-detail/en/ohmite/LVM25FVR100E-TR/LVM25FVR100ECT-ND/6047793

It is 50ppm and 1W (remember our max is 0.4W) with good temperature range.

the full list of resistor search is here.

So it is not a low offset that is important but low offset drift.

Which drives me to think LT6014 is kinda the best here. What is your opinion? remember the 1mV/1mA set capability. We can compensate in software for the extra/missing 1mV/1mA due to several stuff, but set capability should be achieved especially with the power of 16-bit DAC and ADC too.

Imagine my day dream of making a business selling this product when it is finished is complete, how can I calibrate all of them? thus I need a kinda accurate shunt (not absolute accurate). The one I linked is 1% which is the same as getting ten of the 1R 1% resistors or nearly the same... so it is OK right?

One might need an extra circuit to ensure a clean start up. Usually this is to start with an disabled output. So if the DCDC converter voltage is low, the output should be off be default. So a clean start from output disable is important.

Later on I will work on getting output enable circuit ready which can do this job. How to get it done though while having it tracked with the linear (output) stage? I mean shutting linear stage will make pre-pregulator 0v.

[Kleinstein]

The LT6014 is not a good choice: it is compensated for gain >= 5. We need a unity gain stable OP. Otherwise the performance data look good. I would also consider the OPA2170.

Using a 1 W shunt at 0.4 W would mean a temperature rise of about 40% of the nominal value, which is about 50K. So there will be quite some self heating on the shunt. It will work, but not necessarily good.
The offset itself is not a problem unless it gets really large (e.g. > 10 mV). There likely will be a software calibration procedure to adjust at something like 0 V and 0 A and maybe 10 V and at 1 A. So neither offsets nor the absolute values of the reference voltage and the resistors matters. Only stability is important. One kind of needs these points for a test anyway, even if one would decide to use expensive accurate parts (e.g. 0.05% resistors and similar precision reference) to circumvent calibration. To do the calibration one would need something like a good DMM, preferable 5.5 digits or better.

Shuntdown on the linear stage will make the SMPS stage to go towards about 1 V, not 0 V. So the chip is already active.

[VEGETA]

As a side note, I set output voltage to be 0.5v (0.1v too) and the SMPS rose up to 9v then settled to around 5.8v, I expected it to be something like 3.2v or so. It is kinda weird.



___

That aside, you mentioned OP2170 but I see OP2177 better with slightly more price. What do you think? what about other op-amps in the previous post?

I want to know how to precisely simulate such third party op-amps in ltspice, so I stop relying fully on LT parts. Other candidates are something like:
1- LT1801 which is 80MHZ (too much more than needed), but still confused about offset.
2- OPA2180, this one seems nice. 2 MHz, 15uV offset (max is 75uV) which is totally suitable for true 1mV step.
3- OP2177 which is mentioned before.



I put some conditions and this was the resultant Digikey search: HERE

Hmmm LT6014 is for sure suitable for x5 gain but in test it performed very well and accurate. So here is what I think about:

Assuming 2.048v reference:

16-bit DAC has one bit of around 31uV which means 310uV/uA output capability.
14-bit DAC has one bit of around 125uV which means 1.25mV/mA output capability.

So for 16-bit DAC we need an op-amp with 31uV offset to be able to differ between one bit and the other... Or maybe a 100uV op-amp that treats 3 bits (~94uV) as its smallest step which will still allow for true 1mV\mA step. While 14-bit DAC can run with more op-amps but it is 1.25mV not 1. So I am confused, especially that 16-bit DAC is so expensive!

So now I need a true 1mA/1mV smallest step capability, but confused about what to do... 16-bit or 14-bit dac with relatively normal op-amp?

Using a 1 W

we can get the 2W or even 3W version with slightly more price.

Shuntdown on the linear stage will make the SMPS stage to go towards about 1 V, not 0 V. So the chip is already active.

I don't think so, because SMPS chip has some kind of a minimum output voltage but I am not so sure. So how to do output enable and other stuff?

[VEGETA]

Well, even the more powerful EEZ supply is specifying a 10mV/10mA step "or better" as they call it, so I wonder if our 1mV step is a dream or not. The strange thing is that they at EEZ have 16-bit DAC/ADC so fully capable of around 39uV steps (2.5v ref) but they limited it to 10mV step.

[VEGETA]

For now, the best choice is:

Op-amp: LT1881 [ http://www.linear.com/product/LT1881 ], 5.78$ @ digikey which is not cheap but surely powerful.

DAC: MAX5136 [ http://www.digikey.com/product-detail/en/maxim-integrated/MAX5136AGTG-/MAX5136AGTG--ND/2041669 ] which is 16-bit (or 12) and cheap, around 4.5$

Voltage reference: MAX6071 [http://www.digikey.com/product-detail/en/maxim-integrated/MAX6071BAUT21-T/MAX6071BAUT21-TCT-ND/5051521] around 2.16$ which is not cheap but 10ppm quality.

OP-amp is 50uV max which is good enough, 30uV typical < one bit of the DAC. Now it surely can output 1mV by a very big margin. Actually a maximum offset of 50uV can output 0.5mA but that is not needed and maybe not possible considering the rest of the circuit. I am not sure about the DAC since it is half the price of the other 16-bit DACs, what do you think?

so 4.57 + 5.78 = 10.35$ for just 2 parts xD. the adc won't be cheaper than 5$ too which makes it 18$ (with V_ref) for just a portion of the analog circuit, but I guess it is worth it. By this we have strong analog core.

P.S: Hmm what is the price you think this project can be aimed at? just a question of curiosity xD. I originally wanted a 100$ maximum price but the parts alone might cost that lol.

[Kleinstein]

The MAX5136 is a lower grade 16 bit DAC - thus the relatively low price. Anyway with this DAC there is no need for a super accurate OP. So the LT1013 or OPA2170 should be well good enough for the current part and the voltage part could us the TLC272 or similar. Also using just TLC272 (or TS272) should be OK. Remember that the offset voltage itself is not a problem - software can compensate for this error. Adjustment at 0 voltage / current does not even need a good meter. Due to the INL specs of the DAC, 1 mV steps would not be really accurate, but one could still offer them. One can always decide later if one wants to show the not fully accurate 1 mV steps.  The EEZ supply is for a higher output voltage range and for this reason might not want to offer 1 mV steps.

The DAC even includes a reasonable good quality reference. So one could get a way with the internal reference. This supply will not be super low noise anyway due to the SMPS part - so the main drawback of the internal reference (the relatively high noise) does not matter that much. There are also ADCs with internal reference (e.g. MCP3422) - so one could get away without an extra reference.

Also remember that there are other parts that also contribute to drift: the two resistors in the divider for the voltage and the shunt and set point divider for the current setting. So something like a 50ppm/K rating is already relatively good for a PSU.

For other OPs, there is the universalOP2 model. Here one can adjust the main parameters (GBW, SR, ouput current) to what one needs or knows form the DS. With the common mode range and special properties (like latchup on leaving the CM range) one has to take care be hand. Things like saturation of the output might not be well modeled in more specific models too.

[VEGETA]

How about this 8.5$ DAC: DAC8552 ? It is for sure better than the previous one but with huge price jump. Now maybe we can just rely on LT1013. However, I don't yet understand why the op-amp offset is not a problem. DAC gets accurate voltage out while the opamp such as LT1013 can offer out 150uV offset which translates to 1.5mV accuracy only, my point is that since the opamp is the last one in the chain then it determines accuracy assuming DAC already meets the accuracy specs.

Note: this DAC [ http://www.digikey.com/product-detail/en/cirrus-logic-inc/CS4334-KSZ/598-1046-5-ND/923166 ] is 24 bits and 3$. What??

So LT1013 can recognize around 4.8 bits of DAC as its smallest step. one step is 31.2uV which is *6 = 150uV. Maximum offset is around 200uV so 6.4 DAC bits. Anyway LT1013 (from Linear @ Digikey) is 4$ while the significantly better LT1881 is 5.78$ which is not much difference. Also, you said it maybe slow.

op-amps in ltspice

I made this:

GBW=2Meg Slew=1Meg Vos=30u

so it is 30uV offset and 2MHZ gain. while 1MEG slew is weird as well as the rest of the parameters. I wanted to simulate OPA2180 which I think can be good choice here.

OPA2180

I think this one is the one. It has a maximum of 75uV offset while having 15uV typical offset. It is 2.87$ @ Digikey which is great. 2 MHZ which is nice, also Zero-Drift type of 0.1 ?V/°C. I am somehow comfortable with this, while not being linear.com part lol. What are the parameters needed to simulate it in ltspice rather than the ones I mentioned above?

This part (and all new ones) do not have the PSPICE file which is compatible with LTSpice... which is silly from TI really!

___

So far we have 16-bit DAC (MAX5136 or DAC8552) and OPA2180 op-amp and any good external 2.048v reference (not necessarily the one I mentioned... maybe a 1$ one is good). This will surely allow us to have 1mV output resolution, right?

As for ADC, MCP3422 that you suggested is fine. 18-bit with 2.048 is 262144 steps of 7.81uV. Even if internal reference has some error, it will be more accurate than the 16-bit DAC. The cheapest one with external reference is LTC2489 which is around 4.5$.

I would be very happy if we could achieve 1mV steps without these parts, especially the DAC beast. So something like 14-bit of 125uV steps... can it work? The issue here is our opamps are designed to output a gain of 10 which requires 16-bit DAC to get 1mV steps.

Also remember that there are other parts that also contribute to drift: the two resistors in the divider for the voltage and the shunt and set point divider for the current setting. So something like a 50ppm/K rating is already relatively good for a PSU.

So what is the best resolution step that we could achieve? if we can not get 1mV resolution even by using such good analog ICs, then it is better to get cheaper parts (12-14 bits of DAC for example), right?

Hmmm what does 50ppm mean here?

___

One thing more to mention is that if we choose an output voltage below 2v doesn't achieve 1v dropout. most of these output voltages like 100mV gives something like 6v on the SMPS output... I tried putting a current source on mosfet gate (fed from "P") but no use. I couldn't figure this out, can you?

I guess minimum voltage of this smps ic is around 3.2volts... so why not getting it for these low output voltages.

[Kleinstein]

The offest voltage of the OPs, does not really matter, as it stays constant and the µC can correct it. So the µC will add the appropriate values to make the output or reading fit. This needs to add a little intentional offset so you have an adjustment range that also includes something like -5 mV in case the OPs offset is +5 mV.

The DAC8552 does not look better to me than the cheaper Maxim part. This DAC itself has an offset spec of 2,5 mV typical, so it would need software adjustment anyway.

The CS4334 is an audio DAC - need even a very cheap one. The problem with these is they usually have quite some drift one the gain - so like having a poor quality reference (100 ppm/K spec for the gain). They may also need a certain data rate and might not even allow for DC output (some do, some don't).

The OPA2180 is a AZ OP. These usually have a significant recovery time from saturation. So one has to make sure there will be no extra glitches from that. For one direction there is that extra transistor already - so with some care it could work. However the CV mode part would need some additions (e.g. a similar transistor) and the output disable also needs to take care of this.

[VEGETA]

Hmm so what is your suggestion for the prototype in terms of parts? if there are modification to the circuits, then let's do it now. I didn't understand saturation time effect relationship with the extra transistor, but what good care is necessary to overcome that? I am now confused about which op-amp is to be chosen for final circuit with high quality.

Also, should we limit the steps to just 10mV instead of 1mV? I see 10mV kinda practical enough with cheaper 14-bit DAC (125uV/bit) and even 12-bit DAC (0.5mV/step)! Downgrading the design from 1mV/1mA to 10mV/10mA is a brave decision of some kind. What encourages me is that no other design is offering any better or in particular 1mV steps of the output. Not EEZ nor Ian's one. So what do you think?

Cheapest 14-bit DAC is LTC2612 with around 7$ which is not much different than 16-bit one. However, something like MCP47FEB22 12-bit DAC is kinda good enough if you don't have any comment on it's internal limits. I mean, 500uV/step is 5mV step of output voltage and current. So 2 bits can be 10mV step that we want.

This may open the door to use even cheaper ADC and op-amps. I still want your opinion on this drastic change. So either we go by it or return to aim for 1mV resolution and solve the problems that we have.

and the output disable also needs to take care of this

How about we delay this to post-prototype time?

I still didn't figure out how to do it - I assume it is the exact same "output enable" feature. The only OE I thought of is putting a transistor which turns off the linear mosfet gate. However, you don't seem to like it.

The other rather harsh solution is to get a transistor or a mosfet to pull SHDN/UVLO pin of LT3757A to negative (ground) to turn it off. I don't know but does the same thing can work if we tied the gate of Q2 (or it's input) to ground/negative to turn the whole thing off?

right now I wanna try to pick some final decisions on parts so I can start doing some real PCB stuff by the end of this month when I get a new laptop.

__

You haven't told me about your opinion on the pricing if this thing ever made it to crowd funding or something similar.

thanks again for your generous efforts.

[Kleinstein]

Except for the rather small case, the Maxim DAC looks good. There is a larger case available too
The very cheap 12 bit DAC is not really good - it is more like 10 good bits and 2 of limited accuracy. Much like many of the 16 Bit DAC having 14 good ones and 2 more which are below possible error levels. So the cheap 12 Bit DAC would not really be good enough for 10 mV steps - even worse than the cheap 16 Bits DAC for 1 mV steps.

One could still make a version with the cheap 12 Bit DAC and thus cheap OPs (like TS272). This would give something like not very equal 10 mV/1 mA steps to set the voltage, but could still give a 1 mV and 0.1 mA reading.

Even with the Max5136 one could still use the TLC272 and get about 1/10 the setting accuracy (1 mV and 0.2 mA, though not perfect). The current loop might profit a little from a better OP (e.g. LT1013 from Ti, OPA2170/1), but not that much. There is already something like a 0.5 µV/K drift from the DAC after the divider.

The extra transistor (the PNP at the CC regulator in the shown circuit) prevents the OP from going to positive saturation, e.g. when CC limiting as not currently active. A similar circuit could be added to the CV regulation as well. Depending on the OPs used this might be a good idea - especially with an OP that is slow to come out of saturation (or just slow).
Having the OP in negative saturation is not bad - this should not happen in normal operation and would just have the output disabled for a little ( usually < 1 ms) longer than normal. So it should not be a real trouble.

One part of output enable could be just pulling down the gate to GND. However there should also be a way to make sure this is done of the DCDC converter gives about 3-6 V during start up and there should be disabling of the minimum load / down programmer. So output disable and prevention of a startup glitch might need a little more than just one resistor.

[VEGETA]

Ok, to make some kind of conclusion to this, this is my decision so far:

Op-amp: OP2177
DAC: MAX5136
ADC: MCP3422
V_Ref: MCP1501

Specs:

voltage set: 1mV step (if it showed serious problems, 10mV it is! but we will aim seriously for 1mV)
current set: 1mA (should be well capable to do it)

the other packaging of the DAC is 6.6$ which is 1$ more. Why this package is bad?

Now since the critical parts are done, what about the voltage sensing op-amp?! how accurate should it be to get 1mV accurate reading? if the requirements are high as the others, why not having a nice quad op-amp like: OPA4180 (same as OPA2180 which requires CV modification) or OPA4197 which seems nice?

Here is my calculations for the voltage sensing opamp, I hope they are kinda correct:

assume 10.001V output, now this is divided by 10 which means 1.0001V to be fed into the ADC. Thus our op-amp should have the capability to recognize the 1mV in the input and the 100uV in the output. So an input offset voltage of 1mV is enough for the task, but I am not sure about the output. I assume the output is OK as long as the op-amp deals fine with the input.

This means pretty much any cheap op-amp like TLC272 is good for the task, this package is the version with 290uV: Here.

while the others are 900uV and 1.1mV which won't work. What do you think about this quick analysis? Even this TS272 shows suitable requirements too and it is 1$ of price! So this has 2 op-amps, one for the important voltage sense and the other for CV\CC indication which is not important at all.

Can we consider this a final decision?

One part of output enable could be just pulling down the gate to GND. However there should also be a way to make sure this is done of the DCDC converter gives about 3-6 V during start up and there should be disabling of the minimum load / down programmer. So output disable and prevention of a startup glitch might need a little more than just one resistor.

I couldn't get that, you mean the shutdown pin of LT3757A that I mentioned? Or the gate of the linear mosfet?

The extra transistor (the PNP at the CC regulator in the shown circuit) prevents the OP from going to positive saturation, e.g. when CC limiting as not currently active. A similar circuit could be added to the CV regulation as well. Depending on the OPs used this might be a good idea - especially with an OP that is slow to come out of saturation (or just slow).

Yup I knew it is like this. By positive saturation you mean the full positive rail being equal to the output as seen here? So it needs time to get from there to negative when we want it to be active, right? isn't slew rate the one responsible for that?

Having the OP in negative saturation is not bad - this should not happen in normal operation and would just have the output disabled for a little ( usually < 1 ms) longer than normal. So it should not be a real trouble.

if my previous lines were correct, negative saturation is the output of the op-amp being exactly equal to it's negative supply, but why would this affect the output disable?

[Kleinstein]

The MCP3422 has an optional internal gain of 8 and differential input. So it can work with a +-250 mV  range and thus can measure the current without any extra amplifier. It has still something like 17 Bit resolution. However direct sensing will not work with the voltage, as the voltage is negative - so it needs the difference (mainly inverting) amplifier.

The OP for voltage sensing is not that critical. So the TS272 is good enough, even the cheap version with something like 2 mV offset is no problem, as software can subtract it. Even than 1 mV or even 0.1 mV (at least with lower voltage) resolution should be possible. It is only if you need to avoid the zero adjustment that a zero offset OP is really needed.

The small version of the max5136 has an exposed bottom pad - this one is usually difficult to solder, though I am not sure it needs to be soldered. So soldering would need something like a good reflow process. The TSSOP case is much more conventional and could still be soldered by hand, if trained.

I don't think the MCP1501 reference would be an advantage over the DAC internal one - so no need for it.

Even with the 16 Bit DAC, I see no reason to use an expensive OP2177 - the OPA2171 should be good enough. Having an Rail to Rail output has the advantage that is could work with a relatively low voltage from the DCDC converter too.

Depending on the µC used, one might not even need the extra amplifier working as comparator for CV-CC mode. Quite a few µC have an internal comparator that could be used. So it would be 6 resistors instead of the OP. This would leave only 3 OPs - so one good one and two more simple ones for the CV mode and measurement.

The normal output enable would be mainly at the MOSFET gate. One might also turn of the SMPS, but this would be more like a separate path from the µC, as to avoid startup of the SMPS with the linear output enabled.

With positive saturation a meant saturation at the positive rail. How long it takes to come back from this depends on the OP. With normal OPs this could be about 1 µs. It is not directly related to the slew rate, though faster OPs tend to be faster here too. However with AZ OPs (like the OPAx180), it can take much longer, more like 100 µs. So it needs a modified circuit.

[VEGETA]

The MCP3422 has an optional internal gain of 8 and differential input. So it can work with a +-250 mV  range and thus can measure the current without any extra amplifier. It has still something like 17 Bit resolution. However direct sensing will not work with the voltage, as the voltage is negative - so it needs the difference (mainly inverting) amplifier.

So we have 2 TLC272 or whatever op-amp, one for voltage sensing and one for current sensing.

The OP for voltage sensing is not that critical. So the TS272 is good enough, even the cheap version with something like 2 mV offset is no problem, as software can subtract it. Even than 1 mV or even 0.1 mV (at least with lower voltage) resolution should be possible. It is only if you need to avoid the zero adjustment that a zero offset OP is really needed.

Well, maybe I am not understanding offset voltage properly. My understanding is that it is the minimum voltage value that the op-amp can recognize. So if it has 100uV offset, it cannot differ between 30uV and 90uV for example. Is that correct? What will the software be able to do here?

The small version of the max5136 has an exposed bottom pad - this one is usually difficult to solder, though I am not sure it needs to be soldered. So soldering would need something like a good reflow process. The TSSOP case is much more conventional and could still be soldered by hand, if trained.

Fortunately it doesn't need to! This is from datasheet:

Exposed Pad. Not internally connected. Connect to a ground or leave
unconnected. Not intended as an electrical connection point.

So consider that it doesn't exist. Simple!

I don't think the MCP1501 reference would be an advantage over the DAC internal one - so no need for it.

The only problem with the internal reference is that it is 2.44v not 2.048v I want. So I've got to have this one. It is cheap and there is cheaper but 150ppm which is not good, this one is suitable.

Or maybe we could use it to get a 37.2uV step (instead of 31.2uV) and still get 1mV and 1mA. What do you think?

Even with the 16 Bit DAC, I see no reason to use an expensive OP2177 - the OPA2171 should be good enough. Having an Rail to Rail output has the advantage that is could work with a relatively low voltage from the DCDC converter too.

OPA2171

OPA2171 has 250uV offset and according to my understanding it cannot handle 1mV. As I mentioned above, I might be misunderstanding the concept of offset voltage.

Is it the minimum voltage between the 2 inputs of the opamp that it can recognize\sense or is it something else. If it is like I said, 250uV will be x10 = 2.5mV minimum output step. Please clarify if you know better, which I am sure you are. Didn't get the DCDC low voltage part too.

Depending on the µC used, one might not even need the extra amplifier working as comparator for CV-CC mode. Quite a few µC have an internal comparator that could be used. So it would be 6 resistors instead of the OP. This would leave only 3 OPs - so one good one and two more simple ones for the CV mode and measurement.

yes, you reminded me with PIC MCUs CCP module, it has "capture" mode. The good one is for CC and since it will have 2 op-amps in it, we will use it for the CV too. This leaves us with another cheaper dual op-amp for voltage and current measurement. seems nice!

The normal output enable would be mainly at the MOSFET gate. One might also turn of the SMPS, but this would be more like a separate path from the µC, as to avoid startup of the SMPS with the linear output enabled.

I got what you mean, which is turn the SMPS first then turn the linear stage right? Hmmm maybe we can make an analog circuit for this function instead of relying on the MCU... something like a comparator cheap op-amp to activate the supply for the mosfet (and OE) when SMPS is ready (dunno what is the condition). However, this won't make it in the prototype. How to make one for SMPS without uC? maybe an opto-coupler should be used to control the circuit since it has different grounding.

With positive saturation a meant saturation at the positive rail. How long it takes to come back from this depends on the OP. With normal OPs this could be about 1 µs. It is not directly related to the slew rate, though faster OPs tend to be faster here too. However with AZ OPs (like the OPAx180), it can take much longer, more like 100 µs. So it needs a modified circuit.

for now the OPAx180 is not to be used, thus won't be a problem.

[Kleinstein]

The offset voltage is an additional DC voltage the OP sees at its input. As a consequence it looks like the input voltage is to high (or low) by that amount. However as the offset voltage is essentially constant this is only shifting the zero. So there is no problem in detecting voltage changes that are much smaller. In combination with an DAC and ADC the µC can simply add a certain number to the digital value. So the offset voltage is not an important parameter here.  The more important parts are drift of the offset voltage and the low frequency (noise) - the limit on how much the OP can resolve is more like 10 K * drift specs + noise specs. So for the TLC272 this is something like 10 K * 2 µV/K + 3 µV = 23 µV.

The DACs discussed here also have an offset spec (called DC zero error): this is in the 5 mV range.

It does not matter if the Ref voltage of the DAC is 2,5x V: The ration of the DAC output to the final ouput voltage / current is set by a resistor divider. So one can adjust it there. So better use 2 extra (possibly slightly odd) resistor values in the BOM instead of an external reference.

Doing the disable / enable sequence for the SMPS and linear part is perfectly Ok for the µC. There is nothing really bad happening if something goes wrong in the sequence and something like a delay in the 10-100 ms range is very easy for an µC. Sending the signal to the SMPS is a little tricky, but still possible without an opto-coupler.

While we can get away without the OP to sense CC/CV mode, we might need an extra OP to buffer the output of the voltage setting DAC. This is needed if we need / want an extra filter to reduce higher frequency noise of that OP.

[VEGETA]

The offset voltage is an additional DC voltage the OP sees at its input. As a consequence it looks like the input voltage is to high (or low) by that amount. However as the offset voltage is essentially constant this is only shifting the zero. So there is no problem in detecting voltage changes that are much smaller. In combination with an DAC and ADC the µC can simply add a certain number to the digital value. So the offset voltage is not an important parameter here.  The more important parts are drift of the offset voltage and the low frequency (noise) - the limit on how much the OP can resolve is more like 10 K * drift specs + noise specs. So for the TLC272 this is something like 10 K * 2 µV/K + 3 µV = 23 µV.

YES! that sums it, I was understanding it so wrong! thank you very much, your previous posts seems clear sense!

According to that and since we have 4 precise op-amps (CV, CC, V_mon, I_mon), I picked this one: OPA4171. It is around 2.5$ and quad op-amp, 3 MHZ, 1.5v\uS slew rate which is kinda nice. This seems a final choice. Never mind other non-important op-amps for now, they can get whatever there is available. This one is faster than LT1014 too.

DAC internal reference

well, I read this in the datasheet:

Configure other reference voltages by applying
a resistive potential divider with a total resistance
greater than 33k? from REFO to GND

which means we can get away without an external reference, but I don't know how could it be a precise 2.048v since resistors are not perfect and the ratio is hard to get correctly. Also DSh didn't specify clearly how to connect refi and refo with the resistance divider.

this site: http://www.ti.com/download/kbase/volt/volt_div3.htm offers a calculator which resulted in odd values (1.47k and 7680k), so if they exist we would have to buy them specifically for this purpose. Here they are from digikey:

http://www.digikey.com/product-detail/en/panasonic-electronic-components/ERA-3AEB1472V/P14.7KDBCT-ND/3075805
http://www.digikey.com/product-detail/en/panasonic-electronic-components/ERA-3AEB7682V/P76.8KDBCT-ND/3076054

they are 0.1% and price is nice, but will buying these 2 odd values better than getting an external reference? combined cost is nearly the same xD.

Doing the disable / enable sequence for the SMPS and linear part is perfectly Ok for the µC. There is nothing really bad happening if something goes wrong in the sequence and something like a delay in the 10-100 ms range is very easy for an µC. Sending the signal to the SMPS is a little tricky, but still possible without an opto-coupler.

so turn off the linear part then switching one, and for on we turn switching first then linear. sending the signal is something to be made later, but an extra cheap opto is not a big issue.

While we can get away without the OP to sense CC/CV mode, we might need an extra OP to buffer the output of the voltage setting DAC. This is needed if we need / want an extra filter to reduce higher frequency noise of that OP.

why do we need such a buffer stage? is it due to output and input impedance? I am afraid buffering with a normal op-amp will cause even more quality errors.

[Kleinstein]

There is no need for an extra OP to amplify the current signal: the MCP3422 is perfectly fine with a +-250 mV full scale range and 200 mV full scale at the shunt.

There is no need to scale down the reference voltage before the DAC: to set the current, there will be a voltage divider of about 1:12,5 to bring the 0-2,5 signal from the DAC to an 0-200 mV  (or a little more) for regulating OP.
For voltage regulation the gain is set be the two resistors in the feedback circuit (currently 10 K and 1 K - but should be slightly larger values like 3.3 K and 27 K, as the DAC output is a little weak).

As the DAC is not perfect to the last digit, there is no much sense in get an exact scaling to something like 0.333 mV per DAC step.  It is not a problem if the full range of the DAC might be good for a -50 mV to 21 V range. The fine adjustment of the gain can be done in software. So there is no need for 0.1 % precision resistors - one the drift of the two critical resistors that set the gain should be reasonable low.

If not buffered the output resistance of the DAC would enter in the gain. As this should be low - it would not yet be a problem. However cheap references like the one in the DAC usually have quite some noise and it might be worth filtering at least the higher frequency part of the noise. As there will be some noise background from the SMPS part anyway, my guess is just filtering between Ref_out and Ref_in should be good enough (e.g. 50 pF + 1K/1µF). So no absolute need for an extra buffer after the DAC, but it could help a little.

The output disable should be two stages: On turn off one could stop the linear stage and SMPS together. To turn on, it might be better to first turn on the SMPS and with a little delay turn in the linear stage and maybe even ramp up the DAC (in software) after that.

I think the OPAx171 is a good choice - initially I did not like it very much for being Rail to Rail, but this is only a problem near the upper supply - so it would not apply in this application. Having an OP with Rail-Rail output allows a relative low supply. So we only need something like a + 6 V and -0.5 V.

So far the circuit only needs 3 OPs - so a 4 th OP could be used for the DAC filtering / buffering anyway.

[VEGETA]

There is no need to scale down the reference voltage before the DAC: to set the current, there will be a voltage divider of about 1:12,5 to bring the 0-2,5 signal from the DAC to an 0-200 mV  (or a little more) for regulating OP.
For voltage regulation the gain is set be the two resistors in the feedback circuit (currently 10 K and 1 K - but should be slightly larger values like 3.3 K and 27 K, as the DAC output is a little weak).

Well I still prefer the previous approach of a unified DAC reference of 2.048v by the 2 resistors I posted. I didn't want to divide the current voltage and just use up to 200mV out of 2.048V but now I am more convinced that a full 2.048V then divide it by 10 is better in terms of resolution. This is better for voltage too, so clean numbers for everything. no need for the 3.3 and the 27 ones.

As the DAC is not perfect to the last digit, there is no much sense in get an exact scaling to something like 0.333 mV per DAC step.  It is not a problem if the full range of the DAC might be good for a -50 mV to 21 V range. The fine adjustment of the gain can be done in software. So there is no need for 0.1 % precision resistors - one the drift of the two critical resistors that set the gain should be reasonable low.

So you suggest using the full range of the DAC of 2.44v? well, it could be done without problems. The 0.1% resistors are actually cheap so they are not that much critical in terms of money.

So far the circuit only needs 3 OPs - so a 4 th OP could be used for the DAC filtering / buffering anyway.

yes, I originally wanted to make a current monitoring op-amp but since the range is so low then it is ok... especially is that the voltage is positive with respect to the true ground which the uC/DAC/ADC side.

[Kleinstein]

The 10K/1 K resistors in voltage feedback in the last simulation would be too much load for the DAC, but going higher in impedance here is not a problem.
Even with a 2.4 V reference one could use the voltage feedback with lets say 100 K and 10 K. Thus would leave a little over range (e.g 24 V). If the range should be not much higher than 20 V it would be 12 K and 100 K. The resistors should be good quality but no benefit from a low tolerance. I know sometimes the low TC resistors come in 0.1% only. I see no advantage in dividing the reference to 2.0x V first - it only adds more resistors and does not even help much in getting a simpler divider: with a 2 V reference one would need a 1 K / 9 K divider for the current setting. With a 2.4 V reference one could use 1 K and 10 K.

From the whole circuit the resistors that need to be stable are the shunt, the two for dividing down the DAC voltage to set the current, the two in voltage DC feedback and two of the voltage reading amplifier.

The other two resistors at the voltage reading amplifier look a little odd as they go to GND and sensing the positive output which is connected to GND too. So they don't have to be accurate, as they are only to compensate for a small possible drop in the wires. One can even get away without them, as the ADC has a differential input that works all the way down to GND and a little below - just use the right point (output connector) to sense.

[VEGETA]

The 10K/1 K resistors in voltage feedback in the last simulation would be too much load for the DAC, but going higher in impedance here is not a problem.
Even with a 2.4 V reference one could use the voltage feedback with lets say 100 K and 10 K. Thus would leave a little over range (e.g 24 V). If the range should be not much higher than 20 V it would be 12 K and 100 K.

you mean R1 and R2? you mean the value is too low impedance? I thought it is good enough.

Why they can be 1k and 10k while the CC resistor divider should be 1k and 9k? 1 and 9 makes a perfect /10 factor but is R1 and R4 doing the same job of dividing input DAC voltage by 10? I don't think so.

I am not sure I understand the concept of R1 and R4 correctly, but they are dividing the negative voltage with respect to ground which is the output voltage itself divided by 10. So for a voltage of 5v it will be 500mV which will make its way to the op-amp + input while the - input is always tied to ground... so here is what happens according to me:

1- there is 500mV on + input (cuz it is from ground reference to negative output) and a constant 0v at the - input.
2- this makes the output of CV op-amp is the positive rail which is 9v, this means it is not active since it is already 9v before the diode.
3- DAC outputs 500mv which will cancel out the other 500mv making it negative output of the op-amp.
4- negative op-amp output = CV is active and diode is on.

is it correct? here I noticed the voltage at the R1 and R4 junction is not 500mv precisely... is it due to not being 1k and 9k?

I see no advantage in dividing the reference to 2.0x V first - it only adds more resistors and does not even help much in getting a simpler divider: with a 2 V reference one would need a 1 K / 9 K divider for the current setting. With a 2.4 V reference one could use 1 K and 10 K.

The benefit is getting a pure 2.048v from the DAC then feed it directly to the voltage op-amp to get a maximum of 20.48v (20 is the true wanted value) and feed it also directly to CC opamp to get 2A maximum. For current op-amp I originally planned to never use any resistor divider and just output a maximum of 200mV out of the DAC. Your idea is to output the full 2.048v from the DAC to a resistor divider then to the CC opamp which maybe achieves better resolution but needs resistor divider. Your idea might guarantee 0.1m setting steps but I aim at mere 1mA which is achievable in my method.

My point was since we are making a maximum of 20v why using 2.44v? it will give 24.4v so we are wasting around 1201.49 bits of resolution (from the total of 65536)... so the better idea is to use the full resolution to give the output that we need.

What is the best choice here? calculations with 2.44 is a bit harder and clean as 2.048v one.

From the whole circuit the resistors that need to be stable are the shunt, the two for dividing down the DAC voltage to set the current, the two in voltage DC feedback and two of the voltage reading amplifier.

which are what I thought too. 0.1% is good to have while being so cheap, but temperature stability is something else and might be costly.

The other two resistors at the voltage reading amplifier look a little odd as they go to GND and sensing the positive output which is connected to GND too. So they don't have to be accurate, as they are only to compensate for a small possible drop in the wires. One can even get away without them, as the ADC has a differential input that works all the way down to GND and a little below - just use the right point (output connector) to sense.

since I am buying 0.1% of 1k and 10k resistors, I thought of why not also get these two to make gain better and more stable. Should they be 1k and 9k too or these values are good?

[Kleinstein]

The DAC is limited to a 2 K load, as is can't accurately drive a higher current. So R1 and R4 should get larger. For the set voltage the ratio is R4/R1, so with the 1K and 10 K resistors this would be exactly 10. But 1 K /10 K is to much load for the DAC so we need higher values, still with a ratio of about 1:10 to 1.2:10.
The DAC steps are not that accurate, so i think it would be worth the extra divider to get good 1 mA steps. With the voltage setting 1 mV steps are possible but they will not be very equal - so the errors would be something like +- 0.3 - 0.5 mV DNL and +- 2-4 mV INL for the voltage. So I don't think one should through away a factor of 10 in the current resolution and this way get only marginal 1 mA steps if a much better way would be possible with just two resistors.

Adding an extra divider to get 2.048 V out of the 2.44 V also adds two resistors, with at least one new value. When using a 2.4 V ref one could use a 1 K and 10 K (or 10K/100K) divider for the current setting and a 12 K and 100 K or 10 K and 100 K resistor pair for R1/R4. The nominal range would be something like 2.2 A and 21 V / 24 V. So not that much is lost of the DAC range, especially if 12 k are used.

For voltage sensing I would go for something like 100 K and 10 K and leave out the GND side completely - so use the differential input of the ADC to get the correct sensing.

No need for 0.1% resistors, it is better to have <= 50 ppm/K, even if they are +-5%. These are also not that expensive (e.g. like 10-15 cents). A consolidated BOM could use 3 pairs of 10K and 100 K and the shunt as precision resistors only.

[VEGETA]

I didn't get why it is 1.2:10 ratio instead of the normal 1:10, since it is for accurate clean number measurement.

Also, if we are to use full DAC ref, it will be 2.44 not just 2.4v. So why not actually using an external 2.048v ref (rather than the one I linked here if you hate it) to get clean number and best resolution?


As for resistor values, I am not fond with 12k value so why not 10k in series with 1k and 1k? we are going to get 0.1% of these resistors anyway. Or like you suggested of using 0.1% < 50ppm version of 10k and 100k only... actually it is a good solution since it gives the same factor but this leaves the 12k one... should it be precision 10k resistor with normal 1k+1k resistors? or just get precision 1k resistors too?

As for consolidation, we have 10, 20,500k,100,15k,2k,50k and especially 106k+46.4k and the 43.2k resistors of the smps chip. As for caps we have 10p, 20p, 10n,20n,1n,10,200p,200n,100p,1u.....etc especially the 4.7u of the smps both in the series path or input filtering... it shows "x2" mark which I don't knwo what it is. Does it mean 2 in parallel?? my consolidation way is for example, for the 20n cap I could get 2 of 10n in parallel and same for others. do you agree? However, the 500k needs 5 of 100k in series which is not pretty.


So my first guess is to get these values:

R: 10, 100, 1k, 10k, 100k + other odd value ones + special precision ones.
C: 10p, 100p, 1n, 10n, 100n, 1u, 10u + SMPS big filtering 100uF electrolytic caps

So for example, we can use 1n instead of the 100p for most parts except for C9 which is in the current compensation network, unless you have a way of doing that. Similarly the 200n (2 of 100n) in the output filtering of the linear stage. While we can use 2 of 10R in series instead of R33 (in voltage feedback), we cannot (I assume) use 2 series capacitors to get a smaller value one unless it really functions the same.

I already changed diodes, shottkeys, pnps... to get SMD parts for them and use the same part for all.

[Kleinstein]

The 1.2 to 10 ratio would be to get closer to a 20 V maximum range for the DAC. The 12 K could be a precision 10 K and a normal (not too bad) 2 K in series, or just a stable 12 K.

Under voltage lockout for the LT3757 is at 2.7 V at the input so with an 100K/100 K divider this would be 2.7 V per cell. Could be already low. Anyway only one odd value would be needed. So one could end up at 100 K and 110 K.

If parts in a schematics a marked as x 2, they are supposed to be there several times. 2 of the 4.7 µF caps at the input is a good idea. Not sure it would help with the coupling capacitors between the inductors, as the current is now divided over two caps already.

[VEGETA]

Long time no see 

I am gonna restart working on this next week (after this period of my current work at the factory), so PCB design of the prototype is what needs to be done.

Anyway, I wanna revise this:

Adding an extra divider to get 2.048 V out of the 2.44 V also adds two resistors, with at least one new value. When using a 2.4 V ref one could use a 1 K and 10 K (or 10K/100K) divider for the current setting and a 12 K and 100 K or 10 K and 100 K resistor pair for R1/R4. The nominal range would be something like 2.2 A and 21 V / 24 V. So not that much is lost of the DAC range, especially if 12 k are used.

If DAC [ https://datasheets.maximintegrated.com/en/ds/MAX5134-MAX5137.pdf ] voltage is 2.44v, when we put 10k/100k between REFO and ground while connecting the divider output (between 2 resistors) and connecting it to REFI... we will get around 2.44*100/110 = 2.21v (could be 2.17v if 12k/100k used).

So we should make this resistor at DAC so that its output is 2.21v without dividers at the OP loop side?

Assume it is 2.21v @ full 16-bit, this would be good for voltage since we have R1/R4 = 10k/100k to get the /10 gain... so it is ok without problems since no extra resistors will get in the loop.

However, the problem in my understanding is in current loop. 2.21v will need to be amplified by /10 for the OP as you know... this means if you put 10k/100k this will not give an exact division of 10! so you need 10k/90k which is not good for parts consolidation AND it will mean extra resistors in the loop. I made an op-amp circuit to divide the 2.21v by a factor of 10 same as the voltage measurement but not sure if this is good enough.

By that we use OPA4170 chip for: CV op-amp, CC, voltage measurement, current /10 gain buffer. This will mean we need other op-amps for CV/CC indication and other stuff that will come out.

What do you think?

You seem to have 2 dividers for each loop and maybe you are not dividing the DAC reference like I explained. My whole problem is in getting an accurate division result.

So for example, if 2.44v is used and you want 1A this will mean 1v out of the DAC. So 1v*10/(10+100) = 0.0909v which is not the expected 0.1v. This is what I mean... and same for voltage, especially if 12k/100k is used. For CV loop, R1/R4 is a direct division which is not like resistor divider. so R1/R4 = 10k/100k will mean a clean factor of 10.

Can you clarify exactly what technique should we use?

[VEGETA]

I tried using the full 2.44v dac voltage reference with a resistor divider for each loop. For current: 2.44*10/110 = 0.221 which is 2.21A maximum. So how can software know this?

16-bit DAC is 65536 bits which will have a function like this:

DAC_current_output = (65536 * Output_current_wanted) / 2.21;    // assuming 2.21A maximum current and very accurate and stable resistors.

As for voltage:

2.44v is scaled down to 20.33v using 12k/100k since here is not a resistor divider but a direct gain or 12k/100k:

DAC_voltage_output = (65536 * output_voltage) / 20.33;    // again, assuming accurate resistors.

___

So here software will have to scale the thing as well as having very accurate resistors to get say 1A with the calculated DAC bit value. This will add errors due to the scaling and parts... I don't think this is what you meant.

My idea was if I want 1A for CC I will output exactly 1V from the DAC, without scaling. Same for voltage too. However, if this method is used, you need to output something like 1.10v to get 1A and so on (not accurate as explained).

[Kleinstein]

As there will be tolerances in the resistors, it is normal that the DAC values would be calculated compensate for tolerances and also possibly for a not perfect fit with the nominal values. The resistor values only need to give approximate scaling, so that not too much (e.g. less than 10-20%) of the DAC/ADC range is lost.
So the the calculations are similar to the formulas shown. However terms like 65536/2.21 would be likely calculated up front - during calibration. In addition there would be correction for an offset.

This was a little different in the old times, with direct reading ADCs and direct output Resistor switches (e.g. KV dividers). Here they used trimmers to adjust the gain during calibration. However the modern ADCs / DACs are in a way that the resolution is higher than the accuracy and thus fine scale adjustment can be done in software without a significant disadvantage. The exact scaling factors are determined during calibration / adjustment for the individual units. So no more need to buy 0.1% resistors - just a good TK is a good idea.

Dividing down the current set point signal by a factor of 11 instead of 10 is not a problem, it actually helps. I don't think it is worth changing this even to a factor of 12 or 11.8.

[VEGETA]

As there will be tolerances in the resistors, it is normal that the DAC values would be calculated compensate for tolerances and also possibly for a not perfect fit with the nominal values. The resistor values only need to give approximate scaling, so that not too much (e.g. less than 10-20%) of the DAC/ADC range is lost.
So the the calculations are similar to the formulas shown. However terms like 65536/2.21 would be likely calculated up front - during calibration. In addition there would be correction for an offset.

This was a little different in the old times, with direct reading ADCs and direct output Resistor switches (e.g. KV dividers). Here they used trimmers to adjust the gain during calibration. However the modern ADCs / DACs are in a way that the resolution is higher than the accuracy and thus fine scale adjustment can be done in software without a significant disadvantage. The exact scaling factors are determined during calibration / adjustment for the individual units. So no more need to buy 0.1% resistors - just a good TK is a good idea.

Dividing down the current set point signal by a factor of 11 instead of 10 is not a problem, it actually helps. I don't think it is worth changing this even to a factor of 12 or 11.8.

So you say my method is correct?

We should use resistor dividers to each loop as seen, then do the scaling/calibration in software? this is what I said but didn't expect to be correct. It has sources of errors too.

I have a simpler solution that I would like to hear your opinion on it:

We have the CV voltage take the dac voltage directly (2.44v) so the full output is 24.4v which we won't use. While the current is the same except that it has an op-amp (one of the OP4170 with /10 gain) using 1k/10k (or 10k/100k) standard values (maybe 0.1% too if needed) to make the signal divided by 10. Here the DAC won't see a problem driving the effectively very high resistance op-amp input.

By this we can have better accuracy without scaling or software stuff involved, except for necessary stuff like offset voltage and so on.

An enhancement to this would be adding a resistor divider to the reference of the DAC via the REFO/REFI pins (it won't get in the loop = no resistance added!) to make it like this: 2.44 * (20k/100k) = 2.033 which is just perfect!! the 20k is two 10k (0.1%, low ppm) and one 100k (0.1%, low ppm) to make sure the 2.033 is stable enough.

So a final circuit will have CV voltage directly from DAC, CC voltage through a simple op-amp with /10 gain. The only drawback is if this is gonna affect stability or not? I mean the added op-amp. I tried it in LTSpice without problems.

My whole point was to remove work done for "individual units" that involves software.

what do you think? I think this is more cost effective than an external reference.

[Kleinstein]

Having extra gain in the CC loop can be a stability problem, but one can make it work. Using a divider for the set point current signal is still easier than the amplification, and it is the same resistor values.

The only alternative to using scaling in software would be adding trimmers and doing hardware adjustment. There are quite a few factors with errors, so that one can no rely on the DAC steps to directly correspond to something like 1 mV or 1/3 mV without an adjustment: it is the DAC reference, the DAC scaling factor, the dividers (DAC output for CC mode and feedback for CV) and the shunt. In addition there will be an offset. There is no good reason to replace software with old style hardware trimmers adjustment. There are already resistors than can be chosen for adjustment of current and voltage gain. So it is crazy adjusting the reference. Even if you would like to do the 1970's style analog trimming, one would adjust the resistors already in the circuit and not add an extra divider for the reference.
By lucky coincidence the resistors for coarse adjustment of gain are not even crazy values: they could be just 10 K and 100 K with the option to use 10K+2 K instead of 10 K to reduce the over-range.

Like with many modern DACs the DNL and INL is not that good, that an odd scaling factor would make a big difference. The extra rounding error (e.g. about +-0.15 mV for the voltage) is well below the uncertainty of the DAC anyway. One could even argue that the quantization error is already there from the offset anyway.

Avoiding trimmers also means less drift. Modern µCs usually have an internal EEPROM to store calibration values - so it is a simple software only solution, instead of 2 trimmers and low tolerance resistors.

[VEGETA]

So basically the extra op-amp is the best solution if stability is guaranteed.. Don't u think it is worth a try? or maybe refer to the old easy way of using an external reference?

Anyway, how can it be done using software? especially in a way that can be done to all units not just individually. Anyway, I still think having the 20k/100k divider (or any similar) at the REFO/REFI pins to make the dac output voltage near 20v max, then use it directly on CV. It can be easier and more accurate to use on CC too.

I have some kinda weird idea, which is to use an EEPOT as a divider! this will allow having nice resolution for multiple ranges right? and maybe make the calibration automatically done in some way. Don't mind this if it doesn't seem right since I came up with it without testing or even thinking enough.

__

EDIT: I attached the one with op-amp amplifier to make it easier for you to test. Here I assume ref voltage is still the same 2.44v or maybe adjusted at the ref specified pins (not in the loop or output so it is perfect). OP to be used is the same OP4170.