The input capacitor plays a relevant role in the behaviour and should also be simulated with parasitics. I don't know how to do the complete analysis, but noone will do it with only the information you provided; MOSFET driver circuit, circuit topology, layout, simulation results (are we suppose to compare the measurements you provided with what?), ... And things such as "typical rise-time of 4.5ns (10ns maximum)" are completely useless, as rise/fall times depend on how you drive your FETs.