MOSFET Voltage Regulator design

[tombi]

Hello,

I am in the early stages of designing a lab PSU (for fun) and am presently trying to work out how to make a voltage regulator. I am testing out the transient recovery (see other thread https://www.eevblog.com/forum/projects/linear-psu-transient-recovery-response/) and don't like what I am seeing.

The PSU output will be variable between 0-15V @ 5A and 15 - 30V @ 3A. The PSU will run @50Hz. I am planning on building a pre-regulator also but haven't done that yet. It will eventually have current limiting but I haven't done that either.

I am using an N-channel MOSFET and I am using a voltage doubler to generate the gate drive voltage.

In my model I have a load switching from 0 - 3A and back to 0 with some lead inductance between the PSU and the load. I find that when the load increases, the transient recovery is pretty good (110mV droop and totally recovers within 150uS). When the load drops though, while the overshoot is not too big (80mV) it then undershoots again and then takes a while to recover. At higher currents it is worse. The reaction seems the same at different output voltages.

The load drop reaction seems to be when the error amplifier tries to drive the gate to zero. In the load step-up case it just neatly increases the voltage with no overshoot.

I experimented for a while with different MOSFETs, and different op amps. I also experimented with using an NPN and PNP transistor to control the gate voltage using a lower voltage (so I could then use a lower voltage op amp and so I would have less hassles with slew rate) but I couldn't get this stable. Probably because I couldn't get the NPN/PNP combination linear enough I think.

I tried a couple of op amps capable of 44V supply rail operation but the LT1639 seems preferable as it has faster slew rate.

I found using an emitter follower to drive the gate worked better as I think it provides more current. I probably have to pick a better transistor...

How can I make the response better? i.e. quicker and with less overshoot. See LTSPICE file and circuit diagrams attached.

Or is this Ok for a general purpose (relatively precision) PSU?

Thanks,

Tom

[Seekonk]

Does spice let that doubler work?  C3 is parallel with D2, D3 anti parallel with D6.

[T3sl4co1l]

Replace C5 with an R+C.

I think this was suggested on the original too.  Instead of drawing a dominant-pole compensation capacitor, get in the habit of using an R+C (pole-zero compensation).  It's way better.

Tim

[tombi]

Replace C5 with an R+C.

I think this was suggested on the original too.  Instead of drawing a dominant-pole compensation capacitor, get in the habit of using an R+C (pole-zero compensation).  It's way better.

Tim

Maybe - PJotr made a comment about making the loop response counter the output capacitor.

Do you mean like this? Hmm need to read more... Been reading about lead, lag and dominant pole compensation.

Tom

[T3sl4co1l]

Oh.. FWIW, current pulse at the end of an inductor does nothing.  An inductor (at least, an ideal one, not the preloaded BS LTSpice uses by default) approximates a current source as frequency goes up, so it's like connecting two in series.  The result, goofy voltages.

A damping resistor on the gate may help.  As in https://www.eevblog.com/forum/beginners/single-transistor-oscillating/msg637171/ it is well known that a low impedance (e.g., emitter follower) into a common-drain (in this case) circuit is prone to oscillate.

A switched resistor load may also be more representative.  Ideal current sources are rarely best suited to this.

For safety, some mods to include: current limit, gate voltage protection (zener from S to G), maybe overvoltage/reverse polarity protection at input/output.

Tim

[tombi]

Oh.. FWIW, current pulse at the end of an inductor does nothing.  An inductor (at least, an ideal one, not the preloaded BS LTSpice uses by default) approximates a current source as frequency goes up, so it's like connecting two in series.  The result, goofy voltages.

A damping resistor on the gate may help.  As in https://www.eevblog.com/forum/beginners/single-transistor-oscillating/msg637171/ it is well known that a low impedance (e.g., emitter follower) into a common-drain (in this case) circuit is prone to oscillate.

A switched resistor load may also be more representative.  Ideal current sources are rarely best suited to this.

I think R1 does the same thing. I tried adding a resistor between Q1 and Vgate but I can achieve the same thing by varying R1

I added a voltage controlled switch as you suggested - thanks. The inductor doesn't do much and if anything seems to smooth out dips when the load drops. I added some hysteresis in the switch model however to slow the rise a bit - not sure if this is cheating.

I also added a resistor to model the ESR of the output capacitor which does seem to change things.

For safety, some mods to include: current limit, gate voltage protection (zener from S to G), maybe overvoltage/reverse polarity protection at input/output.

I added the reverse protection diode and the zener to clamp the gate voltage.

I also added another op amp configured as a differential amp so it can read the voltage at the terminals. I added a resistor to model wiring losses in the negative rail and the diff amp seems to work.

While at it I added an op amp to sense the difference between the set voltage and the output which will crow-bar the output using a MOSFET if the voltage goes too high. My plan is to have a fuse that will get killed by this action.

The transient response time is now pretty quick but I can't get rid of the overshoots. The overshoots are independent of output voltage but seem to be related to the output current drop. If I increase the size of the output capacitor it just slows things down but doesn't stop the shoot.  If I increase the high-frequency gain of the amps (decrease the compensation capacitors) I just get more oscillations but the overall envelope of the pulse remains the same.

Not sure what else I can do. I'm still waiting on parts but plan to build this and see if the real circuit behaves like the simulation.

I think I'll work on the regulator a bit more before I move on to current limiting or the pre-regulator.

Thanks again for all your help.

Tom

[tombi]

Hang on...

The transient recovery response spec from the Agilent service manual is:

"Transient Response Time
Less than 50
sec for output recover to within 15 mV following a change in output
current from full load to half load or vice versa"

I was measuring from zero to full and vice versa. Under these conditions the response is *much* better.

Never mind.

Tom

[Seekonk]

Do you just not see a big problem with your voltage doubler.  Post video of the smoke when you build this.

[tombi]

Actually I didn't... Sorry I saw your comment before, didn't understand it at first and forgot to look at it. Thanks for pointing it out again.

I think I see the issue. When AC1 goes positive it forms a dead-short to ground over D6. If I remove the ground at the junction of D6 and C3 and change this to be connected to Vunreg I think this fixes the problem.

Does that sound right?

Thanks again,

Tom