My first PCB - MSP430 - Will it explode?

[Josh]

Edit: Thanks for all the comments - I've updated the design and it's in the post below for a second round of abusing =)

Okay, okay... I don't think it will explode, but this is my first PCB (and micro schematic really), so I was hoping some of you veterans could give me some feedback. If there's anything obvious I've messed up or done unconventionally, the constructive criticism would be much appreciated 

Some pictures are below and gerber and schematics are attached. The project is simple - it's just a MSP430 micro talking over USB with some digital IO. The board is going to be used to make a class compliant USB MIDI controller similar to the MIDI Fighter. I'm planning on using Seeed Studio's PCB service.

Some of my uncertainties are:
1) This is my first PCB so I don't really know if I'm doing it all right - did my research and passes design rule checking. But if anyone sees anything unusal or wrong that I did, I would much appriciate the learning experience gained from you pointing it out =).
2) This also goes for the schematic - first time with a TI micro and USB. Made with the DS on hand and checked with examples, but if somethings off I'd much appriciate the criticism =).
3) The USB pins are quite small and close together. To meet the solder mask -> pad clearance, I reduced the solder pad expansion from 0.1mm to 0.05mm on each pad. Is this the best option? My thoughts are if mfx is off, the mask could cover the pad and make it unusable. The other option is to un-mask the block of all 5 pins - but then will the pins become easily bridged when soldering.
4) The solder mask on the MSP430 has super thin gaps between pins. I can't imagine a strip this thin of mask will stick, but the footprint I download from TI - so it must work...? It also didn't cause any rule violations (I'm using the handy Seeed Studio template from here)

Any comments much appreciated by this newbie - thanks!





Gerber Files: https://www.dropbox.com/s/ksludp2c37k819e/PCB%20GERBER%20FILES.zip?dl=0

[Fred27]

Of the top of my head, SBWTDIO could do with a capacitor to ground. Some ESD protection on the USB data lines might be a good idea.

TI development boards are a good place to get some ideas on designs. Have a look at this one and see if you've missed anything: http://www.ti.com/tool/MSP-TS430RGC64USB

A great place to get MSP430 info is http://forum.43oh.com

Sent from my Nexus 6 using Tapatalk

[Josh]

Of the top of my head, SBWTDIO could do with a capacitor to ground. Some ESD protection on the USB data lines might be a good idea.

TI development boards are a good place to get some ideas on designs. Have a look at this one and see if you've missed anything: http://www.ti.com/tool/MSP-TS430RGC64USB

A great place to get MSP430 info is http://forum.43oh.com

Sent from my Nexus 6 using Tapatalk

Thank you! I wish I had that forum link before! It's a good one! Been looking at TI examples but didn't see that one yet - thanks.

A question - is the USB ESD chip more-or-less a necessity or simply just a "good idea"?

[alexanderbrevig]

Congratulations on taking the step to design your own PCB! It's a lot of fun

@Fred27 is giving you the best tip; research application notes and reference designs. You will thank yourself later.

More generally, here's my 2 bits (I'm new too);

• You're not doing power VCC right, which is made clear by:
  
• Your decopuling capacitors (C7..9) are not correctly laid out (see below)

The thing about power and decoupling capacitors is that it's not an exact science (well, it really is) so  the way you have it may very well work. Especially if you use a proper power supply while testing. I know by experience that it really sucks to find it does not work in the real world situation off the intended power supply.

Power should be supplied from a thicker trace (you got that right  ) but, the path must look like:
VCC -> CAPACITOR -> IC_VCC

Doing:
VCC -> IC_VCC -> CAPACITOR or CAPACITOR -> IC_VCC -> VCC is not right.

The capacitor must be close for it to function the way it is intended

[alexanderbrevig]

A question - is the USB ESD chip more-or-less a necessity or simply just a "good idea"?

Any time a user may come in contact with your circuitry (i.e the USB plug) ESD is a good idea. If you leave it out, chances are someone will destroy if after doing something odd like rubbing against a balloon. You can't control how they handle your circuit, only how you handle their input.

[chicken]

R2/R3 at 27K seem high. From memory those should be 27 ohms or so.

Another TI document to check out is the MSP430F5529 launchpad documentation, the USB bit is identical with your MCU.
http://www.ti.com/lit/ug/slau533c/slau533c.pdf

[Josh]

Thanks for the reply alexanderbrevig! Couple things:

1)

Power should be supplied from a thicker trace (you got that right  ) but, the path must look like:
VCC -> CAPACITOR -> IC_VCC

Doing:
VCC -> IC_VCC -> CAPACITOR or CAPACITOR -> IC_VCC -> VCC is not right.

I was reading this post where the top answer said this did not matter... thoughts?
Regardless, I'm going to update it as you say as a best practice thing.   

2)

The capacitor must be close for it to function the way it is intended

...but on that note, I suppose my caps may not be close enough to the pins. Yet the board is on 50 mm square, so they're not all that far?

3) Do your comments also apply to the load capacitors on the crystal. My understanding is that these are load caps required for the xtal to oscillate accurately, rather than byspass caps.

R2/R3 at 27K seem high. From memory those should be 27 ohms or so.

wow thank you, big error on my part! (edit: atleast I had the right ones in my DigiKey cart!)

[Tac Eht Xilef]

3) The USB pins are quite small and close together. To meet the solder mask -> pad clearance, I reduced the solder pad expansion from 0.1mm to 0.05mm on each pad. Is this the best option? My thoughts are if mfx is off, the mask could cover the pad and make it unusable. The other option is to un-mask the block of all 5 pins - but then will the pins become easily bridged when soldering.
4) The solder mask on the MSP430 has super thin gaps between pins. I can't imagine a strip this thin of mask will stick, but the footprint I download from TI - so it must work...? It also didn't cause any rule violations (I'm using the handy Seeed Studio template from here)

The decent prototype places will check and adjust the mast to suit their processes, although it's probably not a good idea to rely on it completely. I can say I've used iTead for boards with 0.5mm pitch packages (i.e. 0.2mm or so between pads) & the mask between pins has been OK on all bar the first occasion - and that may have been the fault of my footprint.

[codeboy2k]

Good first job!  I like the MSP430 too, more people should use it.   You don't see it too much, as most people choose a PIC or AVR.

I won't repeat what's already been said. 

Here's my additional thoughts on your board:

1) USB 2.0 needs 90-ohms nominal impedance, and on a two layer board this means you need wider traces. I've given some trace widths and spacings for 90-ohms on various thicknesses of 2 layer boards. Note that thinner boards can get away with narrower traces, so if you find that you just can't route a wide trace, you can choose a thinner board and use a narrower trace width.

FR4 Er = 4.2
1 Oz copper thickness = 1.4 mils

90 ohm nominal trace width/space for various 2-layer board thicknesses (in mils):
board thickness : 1.6 mm (63 mils)  50/6 or 55/8 mils
board thickness : 1.2 mm (47 mils)  40/6 or 42/8 mils
board thickness : 1.0 mm (39 mils)  34/6 or 36/8 mils

2) the termination resistors R2 and R3 should be 16-33 ohms, and placed as close to the CHIP as possible, near the DM and DP pins, not close to the USB connector. The two  filter caps C5 and C6 should also be close to the USB transciever, i.e. close to the micro's DM and DP pins.

So you need to come off the USB connector with the wide track widths above, and maintain that track spacing right to the termination resistors that you will put at the chip pins, just before entering the chip.

3) the 1.5k pullup should be on the D+ side before the termination resistor, NOT on the microcontroller's DP side.  Since the termination resistors and filter caps want to be close to the micro, they will take all the space up there, so keep the 1.5K near the connector and run a thin trace to it.  It's just a pull-up control, so not a problem if it's long and far from the micro. But the resistors need to be close (as well as the crystal.. see #5)

4) ESD protection diodes should be used too, and these should be placed close to the connector, on the D+ and D- lines and pull up to VBUS and down to GND.  A MAX3207 in SOT-23 or Semtech RCLAMP0503F in SC-70-5 would work (the Semtech is slightly cheaper, even though it has 1 more port).

5) The crystal and caps want to be close to the pads (doesn't everything!) so try to see if you can rotate the crystal 90 degrees and get the crystal closer and the caps in between.  If you can't do that then swap the traces at the microcontroller pins 45 and 46, and come off the top of C2 down to pin 45. This will at least put C1 and C2 in between the crystal and the microcontroller pins, but I would still try to re-orient the crystal and get  it and the caps closer to the micro.

You look like you are using all 1206 parts.  They are easy to solder by hand, but you might find them hard to get near the pins as you need them to be, especially things like decoupling caps and for the USB termination and filtering.  If you have routing issues with these bigger parts you should consider smaller parts, at least for these components. Smaller parts are not that hard to solder, and you don't have too many anyways.

Cheers!

[Neilm]

VCC -> CAPACITOR -> IC_VCC is needed so the capacitor filters the high frequency current pulses generated by IC from the supply and any other components on it. This becomes important when you are designing for EMC compliance, or have sensitive circuits on that rail.

You look like you are using all 1206 parts.  They are easy to solder by hand, but you might find them hard to get near the pins as you need them to be, especially things like decoupling caps and for the USB termination and filtering.

In addition, smaller components tend to have less parasitic effects which are important at higher speeds. You might find the following link useful for background reading. https://www.maximintegrated.com/en/app-notes/index.mvp/id/5663 I tend to not have too much trouble with 0603 packages and a good pair of tweezers.

Neil

[Josh]

Thank you all for the comments! It really helps, and I'm learning 

I've remade the board with the suggestions posted and I also changed the IO scheme (including adding some shift registers). My changes are posted below - let me know what you think!

board thickness : 1.6 mm (63 mils)  50/6 or 55/8 mils

I wasn't sure what 50/6 meant, but I increased the thickness to 0.4mm and followed this guide: http://www.cqpub.co.jp/dwm/article_english/dwm050/USB2_05.htm
What was difficult was that the pins on the connector and chip were opposite (ie. the traces have to swap sides) so I did an odd trace around the connector - I hope it's fine. Only other way is via's which I hear are bad for this. There's not enough space between the resistor pads to route the swap through there.

3) the 1.5k pullup should be on the D+ side before the termination resistor, NOT on the microcontroller's DP side.

I ended up keeping this after the termination resistor b/c it fit there anyway - and that's how the TI reference schematics are, so I'm thinking it's ok?

Thank you for all the help codeboy2k!


Here is the updated board:

Top+Bottom / Top Only / Bottom Only


USB+Power+MCU / Main IO / LED Matrix IO / Button Matrix IO

[Josh]

Good first job!  I like the MSP430 too, more people should use it.   You don't see it too much, as most people choose a PIC or AVR.

I'm quoting this because I'm not sure where your other post went? It seems to have disappeared... I did manage to read it all and make some changes though - so thank you (no it wasn't too long haha). Here's what I came up with based on your suggestions.

• I opted for 2 single ESD diode chips (Diodes Incorporated DRTR5V0U1SO-7) and changed the traces. I still had to fit that ground via in there, which adds a couple bends in the trace - which I could minimize by changing to a smaller via (can half the size of all vias to be at the min specified by the manufacturer, but then I may as well do all of them because they're all the same).
• I also changed the xtal for a smaller package with integrated caps - it was also cheaper, what a deal. I put a cutout in the gnd plane below the xtal per some recommendations to reduce any shunt capacitance (I read mixed opinions)
• I dropped the 33k resistor between the USB connector shield and ground per your comments, as it's nice to reduce the unique part count where we can
• I also added a cap on the SBWTDIO line based on what I read from other sites.

I do hope codeboy's post comes back... it was very helpful.

[codeboy2k]

That looks better now!   Yes what happened to my post? it was indeed very long but I'm glad you were able to see it and make some changes based on my suggestions.   I'm happy you saw it, that's all that matters. 

Yes, those 2 ESD diodes was exactly what I was thinking when I suggested it based on the wider traces now. 
USB overall looks way better -- better impedance, no stubs and minimal discontinuities 

I think you misunderstood me, I didn't say that you should remove the 33k resistor from shield to ground, in fact I suggested that you even add a second pad in case you wanted to put a small cap there parallel to the resistor.  There are many camps when it comes to connecting the shield to the digital ground -- some people like a direct connection, no resistor, some like a 1Meg resistor, some like a 33k, some like a 100k, some like a 1Meg resistor parallel to a 0.47u cap. My suggestion was to add cap parallel to the resistor, in case you found it was needed. You can put the pad, just don't populate it. I would not go into production without the option of at least putting a resistor there from shield to ground.  You can put a single pad, or two pads if you have room. and also have the option of just using a 0-ohm resistor too.

I've marked up the image a little bit

1) in the right corner, near the USB connector, I still recommend at least 1 pad there for a resistor, and another in parallel if you have room for a cap too. It's better to go to into production with the pads already there for a resistor or cap or both.  You can use a 0-ohm link, or just put a resistor there anyways.  There are many camps, as I said, but you should produce the board with the option available to put it there later if you need it.   If you don't want to populate it at all, you can make a custom 0603 pad that can be shorted with solder, like this one:



2) Are you hand-soldering the board, or getting it reflow soldered?  If you are reflowing the board, then the wide traces on the pads where I have circled might cause tombstoning. i.e. the pullup resistor, and the 2 termination resistors.  Tombstoning occurs when one pad has more thermal mass than the other pad -- one side flows first because it gets hotter first, but the other side is cooler and still not wetted to the part, and it lifts up and away.  See the youtube video at the bottom. Tombstoning is mostly a concern for smaller parts like 0201 or 0402, but it can also happen with 0603, and much less chance with 0805 parts.  So to prevent tombstoning you might want to neckdown just a little bit where the wide trace enters the top pad of R4, to make a smaller link between the wide trace and the pad, increasing the thermal resistance there. Also,  increase the trace width of the trace leaving the other pad of R4, to give the other pad more thermal mass. So make it thicker where you have the room.  Also, use an 0805 part for those resistors if you can find the space, ie for R1, R2 and R4.  You can also try to balance out the thermal masses on both pads of the R1, R2 resistors.  So where I circled at the termination resistors' connection to their caps, you can make that trace wider too, giving it more thermal mass and slowing it down during the reflow. Don't go too wide, otherwise the capacitors will have tombstoning problems next The point is to try to give both pads near equal thermal mass so that you minimize the chance of tombstoning.  (PS: Even if you are going to hand-solder only, I would still change the design to minimize tombstoning while your thinking about it now.  If you have the room for 2 or 3 slightly larger parts and can make a few small changes, then there is no good reason not to)

3) I like the new choice of crystal.  I always thought that other crystal was huge   I recommend you remove the ground trace I highlighted in yellow.  Leave the via to GND near the crystal.  At AVSS2 pin 44, use a via to GND on the inside of the part, i.e. move the two vias at the top of the part just down a little bit to make room, then put a via to GND for AVSS2 pin 44.  You want the GND connections to be short and lowest inductance, i.e. not over a long trace.

Cheers!

.

[codeboy2k]

one more I just noticed...

The connection from SW1 to pin 9 on U1 cuts across the bottom and divides your ground plane up there.  This is absolutely not going to be an issue, and you can leave it as it is if you want, since there are no signals on the top side in that region.  But I wanted to mention that you can elimate 2 vias and bring that trace to the top side if you go between pin 1 and pin 48 on U1,  similar to the USB pullup trace.

[Josh]

Thanks again for all the help - yeah it's odd the old post is gone.

Talking about the 33k resistor - I thought some argued that it could be done with so I did away with it - but I like your idea of the pad that can be shorted.

I'll be soldering by hand - will it still be advantageous to make the changes re: tomb-stoning you mentioned in this case? Nevermind, kept reading on and saw your suggestion. A thought, maybe necking is not for R4 because reducing the trace then going to a large pad would add an impedance change? Can make that one a 0805/1206 though. As a side note, I really don't expect to be reflow soldering this.

With the ground trace, I was a little confused, because other suggestions included making sure that power/ground traces around decoupling capacitors be routed to the cap first, then to ground or Vcc. In this case the caps are still there, but integrated into the crystal. So I was unsure if the same guidelines applied. I suppose the crystal caps are load caps instead of decoupling cap, maybe that's an important difference?

In regard to routing SW1 on the top: to bring a trace between the MCU pins, I have to shorten them ~0.2mm for clearance. The top trace is a more elegant solution - is it worth the slightly shorter pins? (I know, probably splitting hairs here)

Anyway, will have an updated board tomorrow to post up here!

[codeboy2k]

re:  33k shield resistor: Yes, it's good to put a pad there for shield to ground and then you have the choice to short it with solder or put a resistor, a cap, or a ferrite bead there if you find you need to.  What you eventually end up using is more often an environmental decision.  How will it be used? Will it be in a RF noisy environment that is coupling lots of noise into your system? Or is the device an RF generator that can radiate into the environment?  There are many situations.   Just make sure that the pad you place is an 0805 package pad, not 0603.  0805 is large enough to accommodate most things you might want to put there.

An ideal system shield is different and separated from the system ground, and the shield (as a system) is designed as a low impedance path to earth ground.  You want it separate, so that HV ESD spikes on your vcc and data lines are shunted into the shield and the metal case, and to earth ground, going around your device electronics.  But what if you don't have an earth ground, then what should you do?   This is where some say connect shield ground directly to system ground, and allow HV ESD and EMI to ride on your system ground.  This actually raises your device's system ground during the ESD event, but because the ESD event is a common mode event, it raises everything, so your device doesn't really care, everything keeps working, the spike is shunted to ground and dissipates on your ground plane.  This is very good, actually.  It's the same with any RFI conducted in, your ground just floats up and down with the conducted RF energy and your device just keeps working.   What you are trying to do with the SHIELD-GND connection is to get both HV ESD spikes and low voltage RFI that is coupled in via the voltage and data lines to be quickly shunted to (earth) ground with as low-impedance path as possible. I put "earth" in brackets because that is the ideal destination, but in systems that don't have an earth, then the system ground is the next best place to put it.  And this is also why some engineers like to use a parallel RC to connect the shield ground to system ground. The resistor provides a DC path for the shield to system ground, to keep these two grounds at about equal potential, and the capacitor shunts any conducted RF noise (RFI) to ground.

BTW: in this scenario, your ESD protection diodes should ideally be on the shield side, connected to shield ground and VUSB, not on the system ground side or VCC side

The downside of directly connecting the USB shield to your system ground is that it can cause the USB shield to become an antenna for any ground currents created by your device and riding on your device's ground plane.  This is mostly going to be a problem at higher speeds and with higher device currents, for example a big FPGA board.  At your lower speeds, and with your layout (see below, re: decoupling caps) you probably won't have much switching currents running on your ground plane that can get conducted into the USB shield anyways, so you can safely tie them together without worrying about it becoming an antenna.  However, even a single resistor here will help attenuate these ground currents if you do find that you have them in your final design.   

In my opinion, however, my best practice has been to assume that, in an ideal situation, the shield will be connected to Earth Ground at the PC HOST end (or at my own end if I have an earth ground), so I use a 1 Meg resistor and 0.47u capacitor in parallel at my DEVICE end.  This combination provides a low-impedance path for shunting high-frequency RF noise to ground and a DC path to keep the shield and ground at about the same DC potential.  Then make sure to do all the right things on the system ground planes to reduce high-frequency ground currents on my planes so the device does not become an RF transmitter.  If I can't reduce conducted EMI originating on my device, then I'll use a ferrite bead to connect the shield to ground, thus blocking any RF energy from reaching the shield.  This has the downside that an ESD event or conducted EMI into my device will cause it to fail with data errors since the system GND can't rise up with the common mode voltage.  The device needs to recover from the data errors at the upper protocol layers then, and if this is a frequent event (i.e. the environment it is operating in causes this to be a frequent event), then it can seriously degrade system performance.

Regarding your decoupling caps, they are placed well enough. The ground traces on the top are short and when the device needs current in a hurry it will source it via the cap, into the VCC pin and out via the GND pin back to to the cap and then reach the GND plane.  This is very good, since it keeps this HF switching off of the ground plane and keeps it all on the top traces only.  The goal here is to reduce the size of this loop, which will reduce EMI and ground bounce due to trace inductance. That's why you often see decoupling caps loaded on the bottom side of PCB's, since it makes the smallest possible loop for these HF switching currents. In your case I think you'll be OK with what you have, and you won't need to do anything on the bottom (so you can keep your bottom side free of parts).

Yes, the crystal caps are load caps, not decoupling.  They can go to ground directly.  The other trace should be removed and connect the ground pin directly to the ground plane.

re: SW1, shortening the two pins by 0.2 mm to make some room for routing a trace won't cause any issues, because you are using a gull-wing package, so the solder is mostly at the outside ends of the pad and there's enough pad left to make it work. I would not recommend it for a QFN package (no leads). 

[Josh]

Made a bunch of changes then saw you're message ...  Anyway, here's what I've got now. I opted to keep the 0603 resistors and just change the trace thickness for tombstone prevention as I'll just be hand soldering and the larger components make the fit quite tight. Given what you've said I think this will be an ok compromise, the info is very good though.

I added the DNP resistor and cap for the USB Shield and made a custom footprint to aid in shorting the resistor's pad. I had to make it slightly different than the one you posted because of seeed's required clearances. I also needed to omit the solder mask for the whole space between the pads - hope that's ok, and certainly not an issue for now while shorting. You mentioned putting an 0805 pad for flexibility - before I read your post I put 0603 package pads so that's what's on there right now.

Another thought about the SW1 trace splitting the ground plane: the IO headers on the left side are analog - so should the ground plane be split up even more than it is? Precision really isn't an issue and they will be fed by pots (ie. extremely slow changing analog signals), but I've read recommendations to split the ground plane for analog signals to isolate and HF currents on the analog ground plane from the digital system ground plane.

(also Altiums 3D is pretty fun. The model's aren't necessarily accurate here though)

edit: as a note there are also some components on the bottom already (shift register and some caps and resistors), but wanted to keep it as empty as possible to avoid splitting the ground plane and to make routing easier during that phase.

[Josh]

re: SW1, shortening the two pins by 0.2 mm to make some room for routing a trace won't cause any issues, because you are using a gull-wing package, so the solder is mostly at the outside ends of the pad and there's enough pad left to make it work. I would not recommend it for a QFN package (no leads).

moved the switch trace to the top...

[codeboy2k]

"moved the switch trace to the top..."

Good. Because that helps with my next suggestion:

Regarding splitting the ground plane too much.. your JTAG signals SBWTDIO and SBWTCLK cross a split made by VCC, which might not be an issue since JTAG is only used during debug/programming and it's not that fast anyways (I've seen MSP430 programmers up to 4 Mbps on the clock), so I was thinking you could probably get away with leaving that split in... then I started looking at the big split under the IC, made by the 3.3V power, and saw that DVSS1 and DVSS2 are below the split.  So with the SW1 trace on top now you can also reroute the 3.3V power to not cause the split under the chip like that.   So in my attached image you can perhaps remove the red parts and re-route via the yellow traces.

What size cap did you decide to put on SBWTDIO ?  1 nf is a good compromise for reset and high-speed programming.

The analog section doesn't need it's own ground plane. It's fine just as it is, and your analog parts (the pots) are low bandwidth anyways.  Your pots should have low-pass filtering either in hardware or  in software, otherwise you will get noisy and erratic behaviour.

It's looking good. 

[codeboy2k]

Re: C11 and AVCC pin 7

Normally I'd want to run that power trace straight back to the regulator output so that it's not sharing any current with anything else.   If you can do it that way, then great!  However, I think in your case it's less important since you are only using the ADC's for reading potentiometers, so it's less critical for you. Also your onboard voltage reference has some PSRR which will help keep AVCC noise out of your ADC samples.  I'll think you'll be fine with that AVCC trace sharing with the DVCC back to the regulator.

[Josh]

Good. Because that helps with my next suggestion:

Good call on re-routing the power trace! 1nF sounds good - would have been nice to not add an extra item to the BOM but the next lowest cap under TI's 2.2nF limit I have is all the way down at 10pF, which I imagine will do nothing for the line. Looking close to prototype ready I think! Thanks again for all your help on this - really appreciate it.

[alexanderbrevig]

This thread is amazing You're a fast learner Josh, and codeboy has plenty of good advice! I've learned a lot from this too.

If I were you Josh, I'd align your headers on a 100mil grid so it's easy to use strip-/vero board for prototyping and snap in on top. This may just be something I like because I'm used to it but it's worth considering maybe?

[Josh]

This thread is amazing You're a fast learner Josh, and codeboy has plenty of good advice! I've learned a lot from this too.

If I were you Josh, I'd align your headers on a 100mil grid so it's easy to use strip-/vero board for prototyping and snap in on top. This may just be something I like because I'm used to it but it's worth considering maybe?

Thanks alexander! Good idea - putting the headers on a grid so they align with a board. I'm planning on soldering directly to the board for the projects I'll be making with this (ie. no headers except for programming). I haven't decided, but may still rework it with 100mil spacing for flexibility.

Here's a quick mockup of a simple first application I'm going to use this board for. It's a Midi Fighter copycat 16-button midi controller.

[codeboy2k]

Based on the new layout I only have  a few more suggestions then I think you can get it made.

1) I still don't like the VCC rail cutting across about 20-21 digital lines on the right.. I think these are not going to be high-speed digital I/O anyways, so maybe it's not really an issue, but perhaps it can still be improved there.  Also in the same place there is a 5V VUSB rail cutting across a few signals that we can fix..

2) the JTAG lines cut across a gap in ground too, This is really not  big deal, but these gaps cause EMI due to the return currents having to find a path around the gap, and the EMI can couple back into your system and give you trouble during programming.  The trouble can be enough to cause your JTAG to only work at 400KHz instead of 4MHz, In this case, JTAG is not a big deal since it's only used in test and development, but once again if there is an improved layout available, why not try to do it right?

So, in my image below, I make some suggestions you can try to see if you can improve these areas.  After this, I think it's good to go !

a) GREEN CIRCLE: C3 and C14 circled in blue, move them to directly under U1 and connect them to their U1 pads and the ground plane
b) GREEN TRACE: the trace in green is VUSB can be removed and go straight up to the 5V header pin, I think there's room on the top side (DARK GREEN TRACE)
c) YELLOW: the same 5V/3.3V/GND header and the JTAG header can swap positions, and then you can eliminate the SBWTDIO and SBWTCK lines crossing the VCC trace, circled in ORANGE. When you re-route these JTAG lines there is plenty of room so use it up, keeping the lines away from the crystal to prevent crosstalk.
d) CYAN: the VCC trace that cuts across 20 traces or so from C16 to R5 can be removed and try to follow the path in dotted CYAN instead. basically it's cutting from the AVCC decoupling cap under that trace and pin, then follows edge of U1 pins along the bottom and right sides, and up and out the top right corner, following under the trace for the pullup resistor control, to get to the voltage regulator.  This actually feeds power to AVCC first, then the digital sections.   The new trace has a stub at U1 pin 28 that connects out to the via for C9.   Leave the via and everything else where it is so that the decoupling loop is on the top layer.

That last step actually does split the ground plane a little, but it's a good split I think.  It ends up splitting the chip across analog and digital sides, but that is unintentional.  I think it's going to be a better split then you had before though.  I'm not usually one to split the analog and digital grounds unless I need to meet a very specific noise spec, then I'll start intentionally putting gaps in the ground to direct ground currents out of my analog section... but this isn't really the intent here.  It just seems like the VCC is better placed there rather than breaking up the IO lines.

Give it a try next and let's see what it looks like.  After this, I think it's good to go.

[codeboy2k]

This thread is amazing You're a fast learner Josh, and codeboy has plenty of good advice! I've learned a lot from this too.

If I were you Josh, I'd align your headers on a 100mil grid so it's easy to use strip-/vero board for prototyping and snap in on top. This may just be something I like because I'm used to it but it's worth considering maybe?

Thanks alexander! Good idea - putting the headers on a grid so they align with a board. I'm planning on soldering directly to the board for the projects I'll be making with this (ie. no headers except for programming). I haven't decided, but may still rework it with 100mil spacing for flexibility.

Here's a quick mockup of a simple first application I'm going to use this board for. It's a Midi Fighter copycat 16-button midi controller.

Yes, thanks too, Alexander!  And you're very welcome, Josh, I'm happy to help! 

That's a good looking 3D mockup, what software did you use to make that?  I had a MIDI keyboard when I was younger but not any more.   This 16-key assignable pad can be useful

[Josh]

That's a good looking 3D mockup, what software did you use to make that?  I had a MIDI keyboard when I was younger but not any more.   This 16-key assignable pad can be useful

The mockup was rendered out from Solidworks using the standard photoview 360 engine and stock materials - pretty decent results for that I'd say! Got my mechanical drawings from it too.

Here's the updated PCB. After switching the headers, I routed VUSB at the top of the board - any issue with routing close to edges? I did this to avoid cutting the ground plane under the JTAG traces.
I also VUSB to U6 very close to the USB data lines as an attempt to minimize the amount of ground plane splitting in that area but am unsure if having power close to data would cause any issues.

[codeboy2k]

I'll have to find a demo copy and give Solidworks a try one day.  I know it's a popular produce, perhaps the top in the field.  About 10 years ago I bought a license for TurboCad 8 which is mostly a 2D drafting tool, and I've been using that so I'm proficient with it.  They had some 3D features too but it was poor. 

Here's the updated PCB. After switching the headers, I routed VUSB at the top of the board - any issue with routing close to edges? I did this to avoid cutting the ground plane under the JTAG traces.
I also VUSB to U6 very close to the USB data lines as an attempt to minimize the amount of ground plane splitting in that area but am unsure if having power close to data would cause any issues.

The VUSB near the top will be OK.  I agree, routing it downward would split the ground plane too much again, so I also like it at the top and I would have done the same.

Traces near the edge, be it power or signal, are mostly frowned upon because it can cause EMI due to energy radiating out from the edges of the board.  This occurs because the EM field is no longer fully contained within the dielectric of the board and can escape to free air more easily, as lines of flux wrap around the board edge and close underneath the board (close, as in opposite to open).  With the EM field in two mediums (air and FR4) propagating down the board you get an antenna.

Even so, this is usually only going to be a problem at speeds above 100 MHz [*] or so, and also with a ground plane beneath the signal trace for the EM field to return to. You don't have this, and your power trace is planar with your ground, so the EM field is different.  You actually have a slot line radiator, but it's a poor radiator at your operating frequencies, a poor radiator at switching PSU frequencies, and the trace is not likely to have any high-speed transients on it anyways.

When thinking about any trace that is near the edge, you should think about what will that trace be used for and will there be periodic current demands that will cause high-frequency switching components to appear on the trace? Even if it's a low speed trace or in this case a power trace, it might have switching with fast edge rates above 100 MHz or so.  Since this particular trace goes off-board via the header pin, you have to ask yourself where does it go from there,  and will there be any high-frequency periodic current demands? If so, these will be possible sources of EM radiation.

The rule of thumb for traces near the edge is to make the edge of the trace at least as far from the edge of the board as the board is thick. So for a 1.6 mm thick board you want to keep the trace about 1.6 mm away from the edge.  Some say 2x as far, but I think for a power trace which might have just 10's of millivolts of transient edges then the changing EM field is going to be weak anyways so keeping the power trace about 1.0 to 1.6 mm away from the edge should be fine.  And as I said above, your EM field on that trace is not leaving via the edge anyways, as the trace is co-planar with the ground plane.

The board looks great!  Get it made ! not yet ... I have a comment coming...

EDIT: change the cyan power trace to the green trace. This opens up the analog ground better to the analog inputs, and splits the plane better into the analog and digital regions. It keeps the analog return currents off the digital ground plane better with this change.  It is still not a split ground plane, just careful routing of the split to keep analog currents on the analog side and digital currents on the digital side.  After this, you can get it made

[*] There are published papers (pdf) with experimental results showing edge-radiated near-field EM radiation at -50 dB for a 100 MHz signal when the signal trace is approx 2x the dielectric thickness away from the edge. It gets better with increased distance from the edge and worse with higher frequencies.

[codeboy2k]

PS: with no copper pour on the top layer the PCB board house might want to add copper thieving, to balance out the copper on top and bottom.

You can add a top layer thieving pattern yourself if you want to give it a try:

http://www.newelectronics.co.uk/electronics-videos/altium-design-secret-17/51478/

Note that in this video the presenter grows the thieving pattern so they all connect and touch, I would not do that because you don't really want a larger copper area, otherwise you'd do a copper pour instead. Also, he rotates the square pads to make a diamond pattern, but I would just leave it in a square pattern.

Copper thieving is used primarily to improve the electroplating process so that some areas don't get more current and thus more copper plated than other areas.  The board house also likes it because it reduces the copper that needs to be etched away, but that's not its primary purpose.

[Josh]

I'll have to find a demo copy and give Solidworks a try one day.  I know it's a popular produce, perhaps the top in the field.  About 10 years ago I bought a license for TurboCad 8 which is mostly a 2D drafting tool, and I've been using that so I'm proficient with it.  They had some 3D features too but it was poor. 

Yeah - it's quite good. Certainly one of the most popular modelling programs for mechanical engineers.

EDIT: change the cyan power trace to the green trace. This opens up the analog ground better to the analog inputs, and splits the plane better into the analog and digital regions. It keeps the analog return currents off the digital ground plane better with this change.  It is still not a split ground plane, just careful routing of the split to keep analog currents on the analog side and digital currents on the digital side.  After this, you can get it made

Made some changes, see below. Also aligned all the headers to a 100mil grid for flexibility if I/someone ever wants to snap a vero board on top (thanks Alexander). Re: the copper thieving - would it make sense to do a copper pour on the top vs. thieving?

Also any tips for the "getting it manufactured part"? That is to say - from what I've read from seeed studio, I just need to export the gerber files (top, top overlay, top solder, bottom, bottom overlay, bottom solder, and a mechanical board outline) and NC drill files from Altium's "Fabrication Outputs" then zip and send them all. I've seen some people import the gerber files and overlay them just to double check everything lines up which I'll do as one thing. Wondering if there are any other general things one should check.

My only other last question for codeboy is.... how the heck did you get all those thieving squares on the photo of the board using paint?!? haha.

[mariush]

Wouldn't it be easier to switch the positions of the two headers at the top?  Seems like a lot of unused pcb space right below that 3 pin header and the 5v trace unnecessarily dragged to the other header when you could just switch them around.
The 3.3v output would then cross those two thin traces but how about you flip the R6 resistor to the right and just come to the top with the 3.3v trace above the two CLK and IO traces , to the right of the newly flipped resistor?

I also wonder if it wouldn't be more efficient to rotate U5 by 90 degrees, maybe even U4 (which seems like it could be moved on the top side if it would make manufacturing easier).  If you move the  SW traces a bit, I think U4 could fit in the space below the A* header. (with the 3.3v rail on the right of those two traces, you could move the A header a bit towards the top and make more room)

PS. If it's possible to spread the two bottom headers a bit (but even without spreading), i think you could split the 8 resistors in two sets of 4 resistors each to one side of that COLS header, and then you would have those 8 resistors on the top layer as well. Even less parts on the bottom of the board.

[codeboy2k]

The board looks great!

I just want you to change the power trace supplying the top of C11..  That is the AVCC, and I want to remove the trace that drops down and to the left on the bottom layer, connecting the two vias.

So in the image below, remove the yellow marked trace, and add the cyan trace instead, following the path under the top trace, to pin 7 , AVCC.
EDIT: or you could just go straight down to the existing trace, just to the right of the analog ground via.  It's the same, electrically.

The goal as I stated in my previous post was to open up the analog ground to the analog header pins.  The analog ground currents will thus stay in the smaller area in purple and not have to cross digital areas.

The top layer is pretty chopped up with signal traces. You can put a ground plane if you want, or a vcc plane, but there's no electrical or EMC  benefit in doing so, and the plane will end up with lots of tiny islands that need to be removed.     With the thieving it looks neat and tidy, so I'd just use that.

EDIT: re getting it made, yes, they just need the gerbers and NC drill file.  The aperture list file is important too, but SeeedStudio wants RS274X format, so the aperture data is embedded in the gerber files and you won't need to worry about creating a separate aperture list file.  Other PCB houses that take standard gerbers will want a separate aperture list file.  You don't need that as long as you generate your gerbers in RS274X format.   For your NC drill file choose EXCELLON output, not gerber.   Don't put any notes on the board outline layer, but instead include a README.TXT file with your manufacturing notes, for example, no changes without contacting you first, or if you want them to look at something specific to see if it's ok, (like the trace too close to the top edge!)

Review your gerber files with at least 2 different gerver viewers to look for any issues.

Wouldn't it be easier to switch the positions of the two headers at the top?  Seems like a lot of unused pcb space right below that 3 pin header and the 5v trace unnecessarily dragged to the other header when you could just switch them around.
The 3.3v output would then cross those two thin traces but how about you flip the R6 resistor to the right and just come to the top with the 3.3v trace by the resistor on the right of it?

OP originally had those two top headers swapped, in the position you suggest, but I suggested he move them the way they are now in order to prevent TCLK and TDIO from crossing a split in the ground plane (as you yourself have noted in your post).

If your additional suggestions re: flipping R6 can work, then I agree with flipping the headers back too, to shorten the 5V line.

I also wonder if it wouldn't be more efficient to rotate U5 by 90 degrees, maybe even U4 (which seems like it could be moved on the top side if it would make manufacturing easier).  If you move the  SW traces a bit, I think U4 could fit in the space below the A* header. (with the 3.3v rail on the right of those two traces, you could move the A header a bit towards the top and make more room)

I agree with this. Josh,  you might be able to try U4 on top...

[Josh]

Thanks for the comments codeboy and mariush!

Below is a version with the headers swapped again, the ground plane is broken under the SBW pins to get the 3v3 back up to the pull-up resistor R6 and the 3V3 header pin. I like this way, minimal breaking of the ground plane and no VBUS on the board edge.

Re: the shift registers U4 and U5. Before, they didn't fit rotated 90 degress and it make more sense to have them orientated the way they are because the whole bottom row of pins connect to IO points. I may be able to move U4 to the top now and re-route the header IO points. I suppose I'm not too worried about parts on the bottom as I'll be hand soldering myself anyway.

I was doing some checks on my components and have a different concern with U4 and U5 though. Right now the chip is supplied with 3.3 volts and that seems fine to power the chip from the data sheet (located here). However, I'm using these shift registers to drive a [future] external LED matrix. Looking on Digikey blue LEDs typically have a Vf of 3.2 volts. With only 3.3 volts of power I imagine there is going to be an issue with controlling the current. So do I route VBUS down to the chip? I'm no pro on reading datasheets, but I think if I do this then the MCU connected pins won't be high enough voltage to drive the shift register's serial and clock inputs high. Not sure what to do...


I'll also have to re-calculate the resistor values after this is sorted out.

edit: FYI, this is the post with the schematics for the shift register and LED matrix:

[mariush]

If you're successful with this project and/or if you want to make a larger batch, then having all ICs and as few passives as possible on the bottom would help a lot.

You could order a stencil made of stainless steel or kapton or whatever and then you would apply a layer of solder paste, put the components and solder everything at once using a frying pan or even something as simple as a hot air gun. The few passives that must be on the bottom (like the two ceramic capacitors under the IC), you'd be able to solder them really fast using your soldering iron or just by applying solder paste manually and heating those passives with hot air gun.

I'm actually thinking if the IC even needs to have those capacitors on the bottom. I know the caps have to be as close as possible to the power inputs but it's not like the controller runs at very high frequencies and at least for one of those capacitors there is some room to put a capacitor right above the lead where the capacitor is now connected to. I admit it's just at a very cursory look over the design and I'm not a pro at this, I could be wrong.

[codeboy2k]

I suppose with the new layout you could now push the crystal over a bit and make room for the two ceramic caps on the top layer.  But it's not worth doing that at all unless you can get EVERYTHING on top (which does benefit you as mariush says, since you gain the option of a quick reflow and using a paste stencil)

I think those ceramics are fine at the bottom of the U1 IC, so no need to move them to the top unless you try very hard to get everything else to the top layer too. That's up to you, Josh.

As for the shift registers, those are HC parts and if you run those at 5V then you can't directly interface to the 3.3V outputs of the microcontroller. As you see in the datasheet, the V_IH threshold is too high for 3.3V GPIO outputs.   You will need to level shift them if you want to run the shift registers at 5V.  So you will need to add 3 level shift circuits for your SER, CLK and SHIFT lines.

Also, note that the shift registers can source or sink max 35 mA.  If you multiplex your LED matrix one row at a time, then each row of 4 LEDS will have a 25% duty cycle.  Since they are sharing source current from the output of the shift-register, the total current is limited to 35 mA. So each LED will see an average current of (35 mA / number_of_leds_on_in_a_row) * 25%.  So when there is 1 LED on in a row, that LED will see an average of 8.75 mA.  But when there is 4 LEDS on in a row, then each LED will see just 2.2 mA, and will appear dimmer.  To improve this, you could use a transistor array for switching voltage onto the row, or choose another IC that can source more current. Have you bread-boarded the LED matrix and seen it in operation yet?  This will tell you how it will perform.

My only other last question for codeboy is.... how the heck did you get all those thieving squares on the photo of the board using paint?!? haha.

I had to use the Gimp editor... paint couldn't do it ... it took just a few seconds:  copy a square and use a fill tool to fill with the paste buffer.

[mariush]

Something I forgot about having the board in a single layer. It would allow you to use just an insulating plastic (or paper/cardboard) sheet on the bottom and then just screw or hot glue the board on the bottom of a project case.
With passives on bottom, you'd have to be careful and use spacers and make sure there's no pressure on those capacitors and so on.

As for driving the leds, codeboy is right. 

It may raise the BOM of your board, but it may be worth looking into actual led driver chips.

See for example http://uk.farnell.com/led-drivers , pick something that works from a low voltage (say 2-3v) and multiple channels (8, 16, 24) and something that can give reasonable current on each channel and then sort by price. You have the benefit of each output being constant current so you don't need resistors anymore and some of these chips behave like shift registers so you can link two together to have more output channels but still controlled through just 2-4 data wires.

For example, something cheap and simple to use and capable of  5-100mA per led (configurable through a resistor) and 8 outputs would be this : http://uk.farnell.com/stmicroelectronics/stp08cp05mtr/led-driver-8bit-30mhz-nsoic-16/dp/2460704
You can link two together like a couple of shift registers, shift 16 bits to the first IC, hit the latch and output enable and all 16 leds change their state instantly.

If your leds won't need that much current, TLC5928 is even better, with 16 outputs and 2-35mA per output : http://uk.farnell.com/texas-instruments/tlc5928dbqr/ic-led-display-driver/dp/1697163

Oh, and i forgot to mention it... both of the above can be powered from 3.3v for their internal circuitry and data input from microcontroller and the leds can be powered from 5v or something higher, which would allow you to use white or blue leds without worrying about the forward voltage (and also it's a good idea to not get the 3.3v used in the micro "dirty" with 16 switched leds, you won't get the 3.3v ldo stressed with the additional load of 16 leds, keep the 3.3v happy and cool with a low amount of output current, leds don't need regulated voltage as the driver chip would control the current for each led).

Yes, the more I look at it, the TLC5928 seems like the perfect choice for your needs.

[Josh]

If you're successful with this project and/or if you want to make a larger batch, then having all ICs and as few passives as possible on the bottom would help a lot.

True, I am just trying to get through my first PCB but I may be able to get more (or everything) on top and will give it a shot. Soldering on a fry pan seems kinda fun anyways

Have you bread-boarded the LED matrix and seen it in operation yet?  This will tell you how it will perform.

I haven't - but I chose this chip because of it's widely documented use by Audino hobbyists driving matrix'd LEDs (you know - let them do the testing for you), but then ran into this 3V3 vs 5V problem.

Yes, the more I look at it, the TLC5928 seems like the perfect choice for your needs.

Thanks for the tips - going to look into this option and see if I can get it on the board. It's going to require double the header pins and double the wires, but it's certainly better than a thing that doesn't work .

[mariush]

It's going to require double the header pins and double the wires, but it's certainly better than a thing that doesn't work

You have space on the pcb to add another row of pins for power... you could bring down 5v from the usb to the LEDs headers.  I would make two sets of  2x8 headers and position them where the COLS header is (extend the cols header to 2x8) aligned to the right, and put the second 2x8 header above the COLS header, and put the led driver IC under the A1 header... the traces from the led driver output pins would just flow naturally to the 2 headers.
Maybe add a small capacitor (like 100-330uF) right by the 2 headers, as a small energy buffer.

Technically it's not really required to have power pin for each led because you don't have to use a single wire for power to each LED, all LEDs' positive leads could be wired together and then connected to 5-17v (the max the tlc5928 allows).  But headers with two wires for each led would make your board more flexible.

With led driver, you gain simplicity, you just shift 16 bits to the led driver and set the latch and enable and all leds change at once and the led driver takes care of constant current and everything. With your previous design, you have to make your microcontroller work 4 times as hard and your code will be more complex because you won't be able to turn all 16 leds all at a time, you'd turn on just a part of the leds at one time, wait for some time, turn them off and turn on another set of leds... you could get flickering on the led matrix or "ghosting". 

[Josh]

It's going to require double the header pins and double the wires, but it's certainly better than a thing that doesn't work

You have space on the pcb to add another row of pins for power... you could bring down 5v from the usb to the LEDs headers.  I would make two sets of  2x8 headers and position them where the COLS header is (extend the cols header to 2x8) aligned to the right, and put the second 2x8 header above the COLS header, and put the led driver IC under the A1 header... the traces from the led driver output pins would just flow naturally to the 2 headers.
Maybe add a small capacitor (like 100-330uF) right by the 2 headers, as a small energy buffer.

Technically it's not really required to have power pin for each led because you don't have to use a single wire for power to each LED, all LEDs' positive leads could be wired together and then connected to 5-17v (the max the tlc5928 allows).  But headers with two wires for each led would make your board more flexible.

With led driver, you gain simplicity, you just shift 16 bits to the led driver and set the latch and enable and all leds change at once and the led driver takes care of constant current and everything. With your previous design, you have to make your microcontroller work 4 times as hard and your code will be more complex because you won't be able to turn all 16 leds all at a time, you'd turn on just a part of the leds at one time, wait for some time, turn them off and turn on another set of leds... you could get flickering on the led matrix or "ghosting".

I certainly wouldn't use a separate wire for each power line - I meant that in the previous design, a set of LED matrices (32 LEDs) could be controlled with 16 wires, each connecting to 4 LEDs. Individually controlling 32 LEDs with the driver chip would require 32 wires + 1 common power line.

Going to give this a shot and post the PCB. I think it's still going to be the best option moving forward.

[Josh]

I suppose with the new layout you could now push the crystal over a bit and make room for the two ceramic caps on the top layer.  But it's not worth doing that at all unless you can get EVERYTHING on top (which does benefit you as mariush says, since you gain the option of a quick reflow and using a paste stencil)

Alright, I gave it a shot getting all the components on the top. With the LED drivers it was actually easier. The crystal traces are a bit longer and go near a gap in the ground plane - I imagine it's still ok, but any thoughts on this updated board?

Edit: I notice one issue - the head of a M3 screw will slightly overlap the corner IO point at the two bottom corners. I might just live with it or use some other method to mount though - they can't get any tighter! I just move the top switch down so there is plenty of space there now too.

[codeboy2k]

I really like it now.. That was a really helpful suggestion by mariush to use the tlc5928, it eliminates 16 current limit resistors and now you can set a constant current with just one resistor, and you won't have any differing brightness issues.   It's 3.3V compatible with 5V on the LEDs

If you had continued with the shift registers you would have had brightness issues and you would have needed an additional transistor driver chip to get the 5V USB to power the LEDs, and then you would also need level shift transistors and resistors for the 3.3V side... but those are all not needed now.

I think this works really well.  The slightly higher cost of the tlc5928 is worth it for the reduced component count, and it might even be a near equal BOM cost for you.   

The crystal should be fine where it is. The extra trace length and crossing the ground split seems to be minor there.

Is D1 necessary?  Usually you only need that for protection against a back-fed device, so that if your device may have power-on still, when the USB host (the PC) is powered off.  Are you planning on feeding 5V into the header ? If not, then you don't really need D1.

The newer LED drivers are going to have higher current demands then the shift registers and so you will be better on the analog side of your micro if you can give the AVCC pin it's own power trace and keep the digital currents off the AVCC trace. The AVCC shares current with all the DVCC pins, and now with those two caps removed from the bottom you can once again cross the ground under U1, and feed the AVCC cap C11 directly from the LDO.  If you see my in traces below, I would like to see a single cyan trace from the 3.3V LDO to C11, and a second trace (green) alongside it, feeding the digital circuits. You'll need to pop-up onto the topside to cross the AVCC trace at 90-degrees, but that angle will reduce any digital switching noise from coupling into the AVCC trace.  You can reduce the size of the AVCC trace slightly if you need to make room, since it's only feeding the analog section now.  You can reduce the digital VCC trace slightly too if you need to.  Try to squeeze them both in there side by side coming off the LDO.

This splits the ground, but it's still a good split, with USB currents in the top right, analog currents on the left hald, and digital currents in the bottom and right halfs.

EDIT: if you can snake that 3.3V trace up to the top header another way, perhaps off the LDO pad once more and going upwards and over, then that's good too and avoids crossing the AVCC trace under U1. 

[Josh]

Is D1 necessary?  Usually you only need that for protection against a back-fed device, so that if your device may have power-on still, when the USB host (the PC) is powered off.  Are you planning on feeding 5V into the header ? If not, then you don't really need D1.

The newer LED drivers are going to have higher current demands then the shift registers

EDIT: if you can snake that 3.3V trace up to the top header another way, perhaps off the LDO pad once more and going upwards and over, then that's good too and avoids crossing the AVCC trace under U1.

Thanks for the tips! You're right - D1 probably isn't needed, I was just being a bit of a nervous noob and thought I'd include to protect my computer as a last resort if I screwed something up. I'm feeling pretty confident I can remove it now.

Will the LED drivers have higher current demands on the 3V3 trace? My understanding was that the 3V3 was to power the chip and it's communication, while the big current draw would be from the 5V header through the LEDs and chip, and then back through the ground plane.

Here's an update:

[codeboy2k]

I like the new layout 

You can still put one of those solder linkable 0603 pads where D1 used to be.  Then you can have the option of putting a ferrite bead there if you need it; some USB powered devices might need it, most hobby level boards can get away without it, since you are not trying to get it EMC tested for certification anyways. For EMC compliance you'll put a pi filter on your VUSB, with a cap+fb+cap, so that means even more components up in the corner.  You won't need that, but if you can make the room for a FB it's nice to have the board ready to accept it if you find that your VUSB is too noisy, and/or your board is too susceptible to external noise.  The FB also reduces conducted EMI out from your board, but again that's mostly an EMC compliance issue.

So on your schematic in the first post, if D1 was a ferrite bead, then it forms an LC filter with C3 and C4.  Putting one more 0.1u cap in front of the ferrite bead makes a pi filter.  Do you need a pi filter? probably not, so you can skip the extra C (unless you have room) but I think you should make D1 into a 0603 FB and get some USB LC filtering (instead of just removing it outright)

Will the LED drivers have higher current demands on the 3V3 trace? My understanding was that the 3V3 was to power the chip and it's communication, while the big current draw would be from the 5V header through the LEDs and chip, and then back through the ground plane.

The LEDs will get their current from the 5V header, yes. The reason I said the new drivers will have a higher current demand is because there are now 32 mosfets that turn on the LEDs, and these will all have their gates charged simultaneously whenever you go from all LEDs off to all LEDs on.  That's the worst case.  That impulse to charge the 32 gates will come from the decoupling caps, and most of it will stay off the power trace, but the power trace will still see droops in voltage during the event. So I thought it would be good to keep the analog side from sharing this current demand and give it it's own trace back to the LDO. With the separate trace, the current needs of the LED drivers can be supplied from the LDO's output cap, and the analog power pin doesn't share the current with the digital switching side.

The analog Vcc pin will still see voltage transients from the digital side, you can't avoid that unless you add another LDO, but you don't need to.  One of the very best things you can do for your analog supply is to make an RC or an LC filter using the C of the decoupling cap. You can make an effective LC or RC filter if you can just squeeze in one more 0603 pad where the analog VCC trace meets the C11 cap.  Then you can short it with solder, or put a 10 ohm R, or a 10uH inductor in 0603 package.  The RC or LC filter will significantly reduce switching transients from the digital side.  millivolt transients become just a few 10's of microvolts.  If the current draw is not too much on the analog side then my preference is the for a 10 ohm resistor to make an RC filter. With an LC filter, the additional inductance can sometimes add additional ringing too.

When you get your board made you can see for yourself with your scope which of the LC or RC filter is most effective on you Avcc pin.

Cheers!

[Josh]

First off, I want to say thanks again for how much help the thread has been - really helped the design and I've learned a lot.

I think you should make D1 into a 0603 FB and get some USB LC filtering (instead of just removing it outright)

One of the very best things you can do for your analog supply is to make an RC or an LC filter using the C of the decoupling cap. You can make an effective LC or RC filter if you can just squeeze in one more 0603 pad where the analog VCC trace meets the C11 cap.
Cheers!

Added a 0603 pad for the option of adding a FB. I'm not sure the extra filtering on AVCC is worth it for me considering I can do software low-pass filtering, the readings need not be precise (they'd control knobs in software DAWs for audio parameters), and the pins would be connected to pots that are controlled by an precise hand. Also want to mention it's still good information to have in the back pocket nonetheless.

An Altium issue I ran into with the thieving that I still have not figured out is when following the tutorial video codeboy2k posted, rule checking gave a bunch of silk to solder mask errors. The mask is set to -100mm and I've confirmed in the Gerber file that there is no solder mask for the theiving so I think that's all fine. Thought I'd post up here because it seems wrong to ignore a bunch of design rule errors, but it seems altium has a few bugs of it's own.

I posted the change below and a "final" board image with gerbers if anyone want's to reference them. I say final in quotations because it's only final if codeboy doesn't have another suggestion (which are really helpful and I'm not trying to say 'don't suggest more' by any means at all!!)

[codeboy2k]

Looks really good now!

No, I have no more routing suggestions, but suggest some soldermask changes.

(1) I looked at the Gerbers, and I see that you should tent all your vias top and bottom, this is standard these days.  You might appreciate it on a small board like this one too, it's less pads to accidentally short out (during soldering , or during a test probe slip). (2) You should try to get a sliver of solder mask between the pads of the microcontroller too. You will really want to have some mask between the pads there since you will be hand soldering it, and with no soldermask between the pads you will get bridges that will be frustrating to clear. It will be more solderable (and more pleasurable!) with some mask there.

It's very tight and at the soldermask feature limits of the prototype services.  That's a 0.5 mm pitch device.  Pads are 0.30 mm and spacing between the pads are 0.20 mm.  There's a few things you can do here.  You can set the soldermask expansion to 0, so that the mask is the same as the pad.  This is commonly done, and the shop may increase that expansion.  If they don't then there's a risk that they have poor mask alignment and you get your pads half covered in mask.  To avoid this potential disaster, you can reduce the pad width to 0.28 mm, and set the soldermask expansion on the pads to 0. 045 mm. This gives you (0.5 - 0.28) = 0.22 mm of spacing between the pads, and 0.22 - (0.045*2) = 0.13 mm sliver of soldermask between the pads. They should be able to manage that.

http://support.seeedstudio.com/knowledgebase/articles/671626-what-are-the-specifications-for-the-solder-mask

That's it.  Good work!

[mariush]

Indeed, it looks great.

One thing that irks me a bit (but it's by no means wrong) is those resistors and capacitors oriented at 45 degrees: C3, R1, R2, C4

It looks to me like there is enough room to leave them vertical and just slide them to the right a bit and angle the traces from the micro directly to 45 degrees and then to the right. Just look at the trace between the mcu and R1, it's unnecessarily curved when you could just go directly 45 degrees and to the resistor that will then be vertical. Same for R1 trace, it goes too much up and then 45 degrees when it could go almost right away towards the right and make room for C3 in a vertical layout.

Maybe you'd also be able to move the trace betwen C3 and C12 a bit further to the right or at the very least straighten it and if you do get it more to the right, you may get C14 and C12 directly above their mcu pins and closer (even though it's not really needed).

U2 could go a bit to the left to have the trace between R1 and U2 straight and then go to connector trace, U6 could stay in same place or a bit higher if you move U2, or maybe you'd have to rotate it 90 degrees.   The thick traces will pretty much have the same length or you could tweak them to remain the same length.

I don't know, those are the only parts at 45 degrees on the board so they kind of jump out and bug me, they make the board ugly.

ps.  One more thing... with this new layout, it seems like there's really no need to have those traces between the mcu and the connector on the right side of the board so "wiggly". You could straighten them up a bit or at least fix that trace going from the bottom right pin of the microcontroller, make it go from the end of that pad instead from the middle as it is now.

ps2. looking at U4 .. why not work with the ground the same way you did with U5 , reorient the traces between mcu and ic to go on the outside, make trace between u4 ground go and join the C15 pad directly instead of going through via.
It would also move the via that's close to U5 (SIN pin) closer to U4, so there's less breaking on the bottom layer.

ps3. c13 could also be layed out horizontally instead of 45 degrees (the one 45 degree part i missed). It's not like you saved much trace length going with it diagonally. Just move the mcu-led drives traces a bit and you have room for the C13 directly from the mcu pad to the via.

[codeboy2k]

I don't think he'll be able to get the R1 R2 C3 C4 set horizontal.  In a post long ago that change was made to keep the USB traces as straight as possible with as few discontinuities as possible, and to keep it thick enough to maintain about 90 ohms on a 2 layer board for most of it's length.  If those get moved to a horizontal position, then the caps C14 and C12 would have to move upwards I think, but these are decoupling caps for the internal LDOs, so you want them to stay as close as possible to the chip. U2 and U6 cannot be moved away from the wide traces because that would introduce a stub and a reflection there.  These two should be directly on the wide trace as they are now, to minimize reflections.   Also, if the resistors were horizontal then the wide traces must bend downward, which is another discontinuity and a reflection at the bend.  So the whole goal with the diagonal traces and the position of the parts was one designed to minimize discontinuities during the controlled impedance run and to launch directly into the 22 (27?) ohm termination resistors R1 and R2.  The small bends at the driver side (chip side) of the resistors is OK, as it's not a controlled impedance there, although perhaps they can be straightened out a little bit.  But any changes on the USB side should be made carefully.

I don't think it's ugly with 45-degree parts

[Josh]

Thanks for the input! I did make some more changes. I've kept the 45 degree components - I like the way it flows myself so I don't think it's an issue. I did change the LED Driver pins and the connection to ground, straightened out the DI pins on the right, adjusted the MCU solder mask, added via tenting, and cleaned up some traces.

Codeboy, the TI USB guide (pg 14) shows 27 ohm resistors - so that's why I've used those.

EDIT: I had to change the LDO because the original one is on backorder at Digikey. Photo attached and updated gerbers. It seems none of the other LDO's have the same pinout with the tab at ground so I had to change the routing. Too bad - I liked the idea of using the ground plane as a heat sink. Although, with the LEDs sourcing from VBUS, this 1A LDO is pretty beefy and isn't going to see much current draw from the MCU and peripherals anyway

EDIT2: Also found this nice gerber viewer I thought I'd share: gerbv

[codeboy2k]

The U1 solder mask looks good.  Just remember to put a note in your readme.txt file to have the manufacturer check the solder mask openings at U1 pads to be sure they can manufacture it.  I measured it in the gerbers and it's 0.13 mm between openings so it should be OK according to their FAQ.

Overall it's much neater with the traces straightened out and I see you cleaned up a little at the USB pads on the MCU too.   Yes, a 1A LDO is definitely overkill, I'd only use it if it's the least cost solution for you.   At a glance, I don't see your board ever going over 100 mA, so you could get away with a smaller 250 mA LDO in SOT-89-3 like the MCP1702T-3302E/MB (0.52 CAD per 100)(0.70 CAD per 10).   

Your drill file has the 4 mounting holes marked as plated, this may cause an error with the manufacturer's automated checks since there is no copper layer intersecting the drill hole there.  Uncheck 'plated' in the pad properties dialog for each hole. Also, there is no solder mask expansion for the holes. They may catch this and add it for you, but instead you should do it for yourself...set your solder mask expansion on the mounting hole pads to 5 mils or  0.125 mm.  This makes the solder mask equal to the finished hole size + 10 mils.

Gerbv is good, I've used it in the past too.  Zofz is really nice for a 3D viewer, it's my new favourite. It's good to use them both, you can see different things sometimes.

Cheers

[Josh]

You could get away with a smaller 250 mA LDO in SOT-89-3 like the MCP1702T-3302E/MB (0.52 CAD per 100)(0.70 CAD per 10).   

Zofz is really nice for a 3D viewer, it's my new favourite.

The 1A LDO I've got is 0.43 CAD per 10 so not too chapped on the price, almost as low as i goes. I changed the plating and solder mask on the mounting holes and will plan so send this to the board house tomorrow!

The ZofZ viewer is pretty cool with it's 3D

[codeboy2k]

Good!

re: the termination resistors... I've seen 22, 27 and 33 used. I think 27 is a good middle ground. Chapter 7 in the USB 1.1 spec details the electrical specs, and it's the voltage levels and rise/fall times in that chapter that set the termination resistor choices and cap choices.  Most designers just use one of those 3 resistors without giving it too much thought, and it just works.  It's good to follow the TI guidelines since they may have created their line drivers and receivers to be optimized for 27 ohms.  I wrote 22 (27?) since I couldn't remember what you had used on your schematic and I didn't look

[Josh]

Good!

Ordered all the parts and PCB  ! Will post an update when they're put together. Now time to figure out how to code the midi descriptors...

[codeboy2k]

nice! keep us posted, then.

I'm in Vancouver, I would love to see the finished product if we're in the same city

Cheers!

[MarkF]

Another Gerber Viewer mentioned in another thread.  The demo video looks nice.  Haven't had time to try it out yet.

[Josh]

I'm in Vancouver, I would love to see the finished product if we're in the same city

I went to school at UBC but live in Calgary now - Vancouver is a great city!

Another Gerber Viewer mentioned in another thread.  The demo video looks nice.  Haven't had time to try it out yet.

Nice! Codeboy mentioned this one too - my opinion is that the 3D and features around it are awesome but it's not as smooth to control the camera so it's more difficult/frustrating to fly around and check things fast.

[codeboy2k]

I live on the UBC Campus   I love it here.

Yes, gerbv is fast and easy to use. The navigation in zofz has some kind of physics applied to it, inertia and momentum so it's weird flying around in there.. I just want to navigate, zoom, pan, tilt, etc.... and not have it zoom away with all that physics applied.  Maybe it can be turned off? Zofz is nice with multi-layer boards and you can peel away layers and expand the rest to zoom in and see, plus I found the x-ray feature to be helpful too. But I think it doesn't render correctly, as I've noticed zofz gets some layers offset a bit, but gerbv and kicad's gerberview does not.

However, even more interesting is this, which I just discovered:

Kicad wants to draw all your thieving pads in a different color than the layer color.. why?  What's different about them, and will that cause a problem at the manufacturer?

Below is a screenshot of your board, with just the board outline and the top copper. Everything else is turned off.  First one is gerbv, second one is kicad's viewer.  Furthermore, zofz did not show the thieving copper in a different color, nor does an online viewer. Just kicad...

[codeboy2k]

It could be a bug in kicad's viewer.  When I turn on "show D codes" Kicad gerber viewer says the objects that make up the thieving pads have no aperture data (no D-codes)

However, gerbv says it does have D codes:

---------------------------------------
Object type: Flashed aperture
    Aperture used: D10
    Aperture type: RECTANGLE
    Location: (0.15, 1.744)
    Layer name: <unnamed layer>
    Net label: <unlabeled net>
    In file: 2 Layer PCB template.GTL
---------------------------------------

kicad viewer showing d-codes below:

[Josh]

The issues with thieving pads you found seem odd - I sure hope it doesn't cause any issues with the manufacturer! Not exactly sure what I'd do anyway since it's submitted and Seeed doesn't have much in place for methods of communication.

Although, looking at my Seeed Studio order, it says that the board passed "file examination".

UBC campus was great! Wondering why did you decide to live there?

[codeboy2k]

I've never used Seeed before so I don't know what file examination actually means. It might be as simple as "all the needed files are there" or it might mean automatic checks, or that too and also someone actually opened it up and looked with a gerber viewer. It's too vague

UBC Campus is a great place to live, actually.  It's a bus loop so 15 or so bus routes come here, it's in the middle of a forest and has very clean air, it's relatively safe here as the streets are generally filled with students even late at night, there's a fire dept, ambulance, hospital and police on campus too. There is also sports centers, performing arts centers, the student union building to just relax in, it has free campus wide wifi, the supermarket is within walking distance,  and anything else is just a bus ride away.

[Josh]

Hi all, I wanted to post an update on this project.

I apologize for not doing it sooner, my first MIDI controller with this board has been working for a while now!

Coding the MSP didn't end up being too hard. The only tricky bit was dissecting TI's USB API (which does not support midi) to figure out what needed to be changed -- as it turns out Midi USB communications are quiet similar to CDC ones.

Here is a picture of the board and a short video of some music played with Ableton and a soundpack from Mad Zach.

Note that I've only used the digital inputs for this one - no analogs or LED drivers, which I didn't bother to solder on.

Cheers!