The load will not discharge the capacitors.
I don't understand WHY you think the load won't discharge the caps. They can't discharge any other way. Are you telling me that you'd happily stick your finger on that last cap and expect not to get zapped by it?
I got it wrong earlier, when I said the capacitors won't discharge. I should have said they will not charge, unless the clock node is connected to 0V, every half a cycle.
With a clock which can only source current, the maximum output voltage will be +Vcc - all the diode drops. If +Vcc is under 50V or so, I'd have no problem with touching the output. To find out why it won't work, do more reading up on how the circuit actually works, paying extra attention to the current flow, in the clock part of the circuit.
The clock source needs to be able to both source and sink current, in other words switched alternately between +Vcc and 0V, for this circuit to work.
Dave's tutorial still clearly shows otherwise
I bet you that Dave's tutorial shows a CMOS output such as a microncontroller or logic gate driving the circuit, not an open collector PNP transistor.
and the charge-pump in my version is a direct copy with only 2 exceptions: That I am using the PWM to drive the BJTs and a higher voltage/current rather than directly, and I have replaced diodes with NChan Mosfets (with gate pinned to an appropriate voltage)
Here is the original (Dave's, as per video) version, where Vcc is +3v and the clock is +3 or 0v (note, not -3v)
Good, drawing the circuit like that makes it easier to understand why this won't work.
Imagine the PWM node is driven from a PNP open collector, as you've drawn below. When the PWM node is left disconnected and the power is applied, C18 and C20 charge to +Vcc - n diode drops. C19 and C21 do not charge up, because a complete circuit is required for current to flow and there's no return path for the current. When the PWM input is connected to +Vcc, current will briefly flow through C19 and C21, leaving one plate at +Vcc and the other at +Vcc - n diode drops, a total potential difference of a few hundred mV. When the PWM input is disconnected again, no current flows and nothing happens.
Now imagine the PWM node is driven from a push-pull output. When the power is applied and the PWM node is connected to 0V, all of the capacitors charge to near +Vcc - n diode drops. When the PWM node is connected to +Vcc, the negative plates of C19 and C21 are connected to +Vcc, taking their positive plates to +Vcc + the voltage on the capacitors. The diodes prevent them from discharging back into +Vcc, so they discharge into C20, C18 and the load. After many cycles, the voltage across the load increases and I'll leave it up to you to work out what the steady state voltage will be.
In short, the clock needs to be a push-pull output. Please look up push-pull and open collector outputs and note the important difference.
Here is my updated version intended for a higher voltage than the clock itself can provide:
Now try simulating/building it, then figure out for yourself, why it's not working.
Oh and BJTs, in that configuration will not switch at 5MHz, try 20kHz to start with.
You should use a MOSFET driver IC to convert the clock input to +Vcc. It's certainly the easiest way. Try the IX4428N, which has both an inverting and non-inverting output.
http://www.ixysic.com/home/pdfs.nsf/www/IX4426-27-28.pdf/$file/IX4426-27-28.pdf