Need help with some RF basics (and sources)

[G0HZU]

I think the 116, j41 impedance will be based on a compromise between Rx and Tx performance.

I can copy the reference design for sure, but I want to understand how this works and how it was calculated.

As I mentioned earlier, I would design it using an EM simulator and I'd obtain the manufacturer's 1 or 2 port s parameter models for the lumped components. I'd also measure/model the antenna as a 1 port model. I would prefer to use 0.5mm or 0.8mm FR4 material (not 1.6mm).

I would expect that the person who designed the app circuit did something similar.

However, I don't think you 'need' to use an EM simulator for this as long as you use tiny (tight tolerance and well modelled) SMD parts and a tight layout on a thin PCB material.

Besides, I think you will only need to get in the ballpark of 116, j41 to get acceptable Tx and Rx performance anyway. Even if you centred the design 'dead on' you would see a fair bit of spread across batches of boards if you factored in the tolerance of the lumped parts.

[poorchava]

I've simulated both 116+j41 (red) and 116-j41 as chip imedance (green)
In general the first impedance gives the minimum VSWR of nearly one at about 380MHz, getting to 1.28 at 433MHz, and in the other case VWSR has a local minimum of nearly one at ~130MHz, and another at about 470MHz with VSWR=1.4.

[G0HZU]

Dunno if this helps but I had a rummage through their app notes on the TI website and found a link to a pair of s3p files for the 868MHz version of the circuit. This is a datafile they generated but it isn't clear if this is from a
simulator or from measuring the real hardware with a 3 port VNA.

I loaded this s3p file into a linear simulator and (I think I) was able to reverse engineer how they achieved their plots. It looks like they set up a port with the conjugate of the ideal impedance and then use that at the diff feedpoint of the chip.

I used a simple balun model here as per the schematic below.

This plot is just the Balun (no LPF fitted) and you can see that I achieved similar results for S21 if you look at the red trace (no LPF) on their results (theirs is the last graph in AWR format).

So I suspect they are doing the same thing with the 433MHz version. They probably optimise the circuit with the real hardware to get best performance and then work out the impedance to put in the datasheet. Presumably
this will be the complex conjugate of port 2?

The first graph below shows their s3p file being analysed in the red trace.

The blue trace is my quick and dirty simulation of the circuit using fairly simple models for the lumped components and the PCB layout. You can see it agrees quite well with their results in the red trace.

The last graph is taken from TI's own literature and it looks like they used AWR Microwave Office for their simulator.

[G0HZU]

Here's the plots for the match in Rx mode.

The first plot is from the TI literature and shows the match at the Rx port using the AWR simulator.

The second plot shows my simulation of their s3p file in the red trace and it agrees quite well. The blue trace is my simple lumped model with PCB strays added and this also agrees quite well. So it does look like they set it up as per my simulation in my previous post.