Negative voltage generator circuit

[HwAoRrDk]

I am trying to understand the following negative voltage generator circuit, but having a hard time following the exact way that it works.

Its purpose is to give a -5V reference supply for the device it's part of. V+ is nominal 9V battery voltage. VGEN is a 3.3V square wave signal (supposedly 17KHz) output by an MCU. V-MON is an input to the MCU, presumably to monitor the negative voltage level.



I sort of understand that the square wave into C23 will result in negative pulse output, which might be used in a more basic circuit with a couple of diodes (and a smoothing cap) alone to generate the negative voltage. But, how this ties in with the transistors and inductors I don't quite get. Well, sort of - I'm guessing that the rest of the stuff is there to amplify the negative voltage to at least -7V in order to feed the 7905 regulator.

With my limited knowledge, I'm thinking that the central part of the circuit may actually be Q1, L2, D1 and C24 - utilising the inductive flyback spike from Q1 turning on and off? And if that's true, and if the purpose of Q2 is simply to toggle Q1, why is a negative voltage pulse necessary on its base? Why not just control it directly from the VGEN signal?

I tried simulating this circuit with the tool at falstad.com (link), but perhaps I didn't define the circuit correctly, because all I got out (at TP25 on the diagram above) was a seemingly ever-increasing negative voltage! After a few tens of milliseconds of simulation time, it would reach -20V, and keep climbing. I'm wondering whether there is a feedback mechanism being performed by the MCU between VGEN and VMON to maintain a proper output voltage. How would that occur? I suppose it would have to be by altering either the frequency or duty cycle.

[Frankje]

Hi,
Well, you are correct about the way it works.
Q2 is needed to separate the uC from the power supply.
The AC pulse from the uP needs to be amplified by Q2, so that Q1 gets enough base current.
When Q1 conducts, a voltage appears on L2. D1 blocks this voltage.
When Q1 blocks, L2 will generate a negative pulse caused by inductance.
D1 conducts and a negative voltage starts to load C24.
L1 blocks the harmonics of the AC from the uP pulse.
U4 stabilises the negative voltage.

If there's no load at TP25 or TP26, the voltage at TP 25 will increase.
This will not be the case in real life due to components attached to the output and due to losses in the circuit.
So, depending on the circuit design, the uP can control the AC pulse to Q2.
 This could be done by using R41 and R42.
V-MON checks the negative voltage, so the uP can take actions.
Greetings

[bktemp]

Q2 acts as a level shifter, converting the 3.3V signal to a voltage for driving the base of Q1 which is near the input voltage (9V).
C23 isn't really necessary, instead the 3.3V square wave could be used directly. The main pupose of C23 is probably avoiding Q1 and Q2 being on for a prolonged time in case the microcontroller crashes and the square wave stops with a high level.

[MagicSmoker]

This is a buck-boost converter. At 50% duty cycle, the output voltage will be the same as the input voltage, except inverted in sign.

To keep the output voltage from climbing to infinity and beyond (ahem) you need to load the output because the energy storage inductor, L2, acts as a current source.

This circuit is a real travesty, however, with many of the component values appearing to be random guesses. With the same or perhaps even fewer components a proper, regulated buck-boost supply could be made that doesn't need a clock output from an MCU to work. See, for example, the datasheet for the venerable (if often maligned here as outdated) MC34063.

Oh, and C23 is to prevent destruction of Q1 should the MCU pin driving it get stuck on high.

[HwAoRrDk]

Great, thanks all. I've got a clearer picture in my mind of how it works now.

So L1 and C25 are simply filtering and smoothing, to take out the transients?

C23 isn't really necessary, instead the 3.3V square wave could be used directly. The main pupose of C23 is probably avoiding Q1 and Q2 being on for a prolonged time in case the microcontroller crashes and the square wave stops with a high level.

Cool, I was right. I guess I just looked at the VGEN square wave signal being AC-coupled and my brain went "hey, that's how you generate a negative voltage" and tried to use that as the base of the whole circuit, but it's just incidental.

If there's no load at TP25 or TP26, the voltage at TP 25 will increase.
This will not be the case in real life due to components attached to the output and due to losses in the circuit.

Ah, okay. I added 700 Ohms resistance as a load on the output of my simulation circuit and with that I can get a stable operation. And as MagicSmoker said, varying the duty cycle caused the output voltage to increase or decrease.

This circuit is a real travesty, however, with many of the component values appearing to be random guesses. With the same or perhaps even fewer components a proper, regulated buck-boost supply could be made that doesn't need a clock output from an MCU to work. See, for example, the datasheet for the venerable (if often maligned here as outdated) MC34063.

It did make me think that there's probably a better off-the-shelf solution, but at least it's educational in the sense that it made me look at the schematic and go "how does that work?".

[Zero999]

Q2 acts as a level shifter, converting the 3.3V signal to a voltage for driving the base of Q1 which is near the input voltage (9V).
C23 isn't really necessary, instead the 3.3V square wave could be used directly. The main pupose of C23 is probably avoiding Q1 and Q2 being on for a prolonged time in case the microcontroller crashes and the square wave stops with a high level.

Another good thing about C23 is it speeds up the off time of Q2 by creating negative voltages at its base, which discharge the base-emitter capacitance more quickly. The value of R37 could also be reduced to 1k, which will improve the off time.

You could also try is AC coupling the signal directly to Q1 and eliminating Q2.