I am designing a test setup which is being used to test another PCB. The MCU performing the tests is a SAM4S, which is running at 3.3V, which can tolerate up to 3.6V I/O. The board being tested may have voltages up to 6V. There are a number of test pins. Each test pin is connected to a single MCU pin, and I can control the circuitry between the MCU and test pin. I need to add overvoltage protection in some form to protect the MCU pins. There are also a number of additional constraints that complicate the problem. I've included an attempted solution below, and would welcome any feedback.
The constraints are as follows:
- Voltages of up to 6V may be seen on the test pins.
- The MCU can handle up to 3.6V (3.7V as an absolute maximum) on its I/O pins. 150mA absolute max total across all I/O. 2-4mA sink/source per pin. More info:
www.atmel.com/images/Atmel-11100-32-bit%20Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf- I need to use the internal pullups/pulldowns (aprx 100k, low precision) on the MCU and have their pulls respected when I read them. For example, if I enable the pullup and the test pin is floating, the pin must read logic high. Similarly for the pulldown and logic low.
- The MCU pins need to be able to output something to the test pins that the other test pins will see if shorted to the pin outputting. This signal will generally be low (ie. ~0V), but I'd like to support high (3.3V) in case I need it. The output will not be on very long- generally well under 1ms.
- I need to measure voltages seen through ADC on the pins, and the ADC reference is 3.3V. Measurement does not have to be precise (eg. +-0.1V isn't unreasonable), but it does have to be able to measure voltages all the way up to 6V.
- The tests are run very fast repeatedly (too fast for a human to observe) and a connection may be made between the test pins and the PCB at any part of the process. For example, a MCU pin may be set to output ground, and whilst it is checking other pins, a test pin connected to this pin may end up connected to a 6V output.
The solution I've come up is attached. I've included just two pins but it is easy enough to extrapolate this to an arbitrary number of pins. Some notes:
- I've included a single signal coming out of the MCU that enables an N-channel MOSFET per test pin with a resistor to ground. When enabled, this forms a voltage divider, which roughly halves the voltage seen by the MCU, increasing the range I can measure. I would enable this output before doing ADC that might include voltages above 3.3V. I can then disable it when performing a test that relies on the MCU pullup/downs, as the pulldown would otherwise cause the internal pullup to not be respected.
- The path from each MCU pin to test pin goes through about 11k of resistance. This is enough to change the logic level when connected to another pin, but also plenty to limit current if both the MCU and test pins are outputting together.
- I'm using both a Schottky and Zener to keep the voltage at the MCU at a sane level. Every path to a potential source goes through 1k of resistance minimum. The 1k at R1 and R2 is not strictly necessary, but I found it useful when testing the setup.
I have a partly-working setup, but presently lack 3.6V Zeners so can't test it fully. I have tested it without the Zener (the Schottky should protect on its own) and it appears to be working.
Feedback most welcome.