Author Topic: PFC boost transistor power loss calculation  (Read 1107 times)

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Offline Miyuki

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PFC boost transistor power loss calculation
« on: March 29, 2016, 11:03:26 pm »
Hi,
I want to ask about calculating power loss at PFC transistor
switching loss I can take from rms current, output voltage ad frequency (it is simple)

but is here any simple formula to calculate conductive loss (average duty)?
 

Offline Miyuki

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Re: PFC boost transistor power loss calculation
« Reply #1 on: March 30, 2016, 12:31:35 am »
I found this equation, results looks reasonable, but can please someone explain me where it come form ?
 

Offline danadak

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Re: PFC boost transistor power loss calculation
« Reply #2 on: March 30, 2016, 01:14:11 am »
I am thinking you cannot just use DC and load current to get at that,
as that does not account for switching losses in power switch. Usually
the vendor, like TI, have a simulator that will allow you to determine that
for various loads. Even includes thermal considerations.

Regards, Dana.
Love Cypress PSOC, ATTiny, Bit Slice, OpAmps, Oscilloscopes, and Analog Gurus like Pease, Miller, Widlar, Dobkin, obsessed with being an engineer
 

Offline Miyuki

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Re: PFC boost transistor power loss calculation
« Reply #3 on: March 30, 2016, 01:31:59 am »
Infineon converter design guide says that this simple equations are accurate enough

𝑃𝑆.𝑜𝑛 = 0.5 ? 𝐼𝐿.𝑎𝑣𝑔 * 𝑉𝑜 * 𝑡𝑜𝑛 * 𝑓
𝑃𝑆.𝑜𝑓𝑓 = 0.5 ? 𝐼𝐿.𝑎𝑣𝑔 * 𝑉𝑜 * 𝑡𝑜𝑓𝑓 * 𝑓
and
𝑃𝑆.𝑐𝑜𝑛𝑑 = 𝐼𝑆.𝑟𝑚𝑠2 * 𝑅𝑜𝑛
 

Offline danadak

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Re: PFC boost transistor power loss calculation
« Reply #4 on: March 30, 2016, 06:24:33 am »
The equations seem to avoid the issue of gate drive Pdiss, but that would be OK if
Id x Id x Rdson x DC dominates the overall dissipation.

This might help -

https://www.power.com/sites/default/files/product_document/application_note/AN-1001_IGBT_and_MOSFET_Drivers_Correctly_Calculated.pdf

Regards, Dana.
Love Cypress PSOC, ATTiny, Bit Slice, OpAmps, Oscilloscopes, and Analog Gurus like Pease, Miller, Widlar, Dobkin, obsessed with being an engineer
 

Offline orolo

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Re: PFC boost transistor power loss calculation
« Reply #5 on: March 31, 2016, 01:03:09 am »
I found this equation, results looks reasonable, but can please someone explain me where it come form ?
I'm no expert in this, in fact I'm a mathematician, not an EE, but the coefficients in your formula rang a bell, so perhaps I can help a bit.

If you have a sinusoidal input current, $$V_{peak}\cos\omega t$$ and pass it trough an ideal rectifier, you get $$V_{peak}  \vert \cos\omega t \vert$$. Taking the Fourier series of the rectified voltage, you get, to the second harmonic:

$$ \frac{2V_{peak}}{\pi} + \frac{4V_{peak}}{3\pi}\cos 2\omega t + \ldots $$

If your $V_{ac.min}$ is RMS, then, the input voltage is:

$$\frac{2\sqrt{2}V_{ac.min}}{\pi} + \frac{4\sqrt{2}V_{ac.min}}{3\pi}\cos 2\omega t + \ldots $$

The amplitude of the second harmonic is clearly recognizable in your formula, and in looks to be like a duty cycle format (disregarding efficiency, and taking the peak-to-peak voltage):

$$ D = 1 - \frac{V_{in, min}}{V_o} = 1 - \frac{8\sqrt{2}V_{ac.min}}{3\pi V_o} $$


So, somehow, your formula looks like:

$$I_S = \frac{P_o}{V_{ac.min}}\sqrt{D}$$

This is the part I don't really understand. I tried the computation for a normal booster, and found something along the lines of $$I_S = \frac{P_o}{V_{ac.min}}\cdot D^2$$ (continuous mode), so I don't know where the square root comes from. I also don't know why the zero-order harmonic doesn't come to play into the duty cycle, unless your output voltage equals the zero-order rectified voltage for some reason.

Edits: LaTeX cleanup.
« Last Edit: March 31, 2016, 01:22:52 am by orolo »
 


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