Author Topic: Please critique my digital power supply design  (Read 7702 times)

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Offline bitshiftTopic starter

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Please critique my digital power supply design
« on: March 23, 2015, 05:23:39 pm »
Hey Guys,

So I'm busy building a digitally controlled power supply using an LM317 (seriously open to alternatives). My setup is as follows:

  • 4.096V reference to 12 bit DAC
  • 12 bit DAC to 5x amplifier
  • The 5x amplifier output is then averaged with a -1.25V reference (an inverted +1.25V reference)
  • Above multiplied by 2 by another op amp with feedback from the output of the LM317

So this should allow me to go from 0V to just over 18V. I've attached a hand drawn schematic of my design. I've omitted the obviously required capacitors and protection diodes etc. I'm waiting for voltage references to arrive but I've breadboarded the basic design and it seems to work.

What is bad about this design? Are there any obvious gotchas that I've missed?

Note: These are quite open ended questions but I'm fairly new to electronics so any criticism is welcome.
"It’s all fun and games until an innocent opamp gets hurt!" - Dave Jones
 

Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #1 on: March 23, 2015, 06:08:59 pm »
After a 30 sec look:

R1/R2 are wrong connected.

Why use a LM317 as a series element? You've come this far, why not use transistor/darlington/mosfet?

U4/U5/1.25Vref not really needed, as you already have a 4.096V reference. Use U3 for feedback.

How about some form of current limiting?

Ok, looked a bit longer ..  :P
« Last Edit: March 23, 2015, 06:12:51 pm by JohnnyBerg »
 

Offline bitshiftTopic starter

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Re: Please critique my digital power supply design
« Reply #2 on: March 23, 2015, 06:18:10 pm »
R1/R2 are wrong connected.
Thanks for spotting that  :-+

Why use a LM317 as a series element? You've come this far, why not use transistor/darlington/mosfet?

I would love to but I have been battling to find any decent literature on the subject. Whenever I google "diy lab power supply" I get LM317 supplies. The little bit I have read about using a transistor seemed to go into "compensation" and was rather complicated. I would be more than grateful if you could share some good resources.

U4/U5/1.25Vref not really needed, as you already have a 4.096V reference. Use U3 for feedback.

So if I understand you correctly, provided I supply U3 with a negative voltage of >= -1.25V, I can connect the set pin of LM317 directly to the output of U3 and connect R2 to the output of the LM317?  :palm: It's so obvious now. Thanks Johnny!

Current limiting is the next step once I've got the voltage control working nicely.
« Last Edit: March 23, 2015, 06:28:29 pm by bitshift »
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Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #3 on: March 23, 2015, 06:30:36 pm »
Most simple would be to use a TIP120 (or somthing like that) Darlington as a "emitter follower" as series element.
It depends a bit on the needed output current.

You do not need any negative voltage at all if you use a "emitter follower"

note: have a look here:

http://www.radio-electronics.com/info/power-management/linear-power-supply-psu/series-voltage-regulator-theory-circuit.php
« Last Edit: March 23, 2015, 06:32:52 pm by JohnnyBerg »
 

Offline bitshiftTopic starter

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Re: Please critique my digital power supply design
« Reply #4 on: March 23, 2015, 07:06:28 pm »
Thanks for that! I at least know what to google now  :)

So I've attached a basic schematic based on some quick reading. Would something like that work?

My transistor knowledge is very limited. I will definitely make an effort to learn more about them over the coming days.

Note: I changed the gain on U3 to 4 instead of 5 since there is no 1.25V offset with the transistor. I only really wanted a 15V output.
« Last Edit: March 23, 2015, 07:09:23 pm by bitshift »
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Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #5 on: March 23, 2015, 07:18:02 pm »
Looks much better now!

You forgot the emitter in the transistor. It is on the "out" side.

With a gain of 4 you get 4 x 4.096V on the output.

Most simple current limitting is by adding R2 and Q2 in your schematic.
Max current = 0.6/R2 (for 1A you need 0.56 ohm)

http://www.seekic.com/circuit_diagram/Power_Supply_Circuit/POWER_SUPPLY_PASS_TRANSISTOR_PROTECTION_CIRCUIT.html

Note: keep in mind that the series transistor can get quite hot. 20V input, 1V output @ 1A = 19 Watts. You need a big heatsink!
« Last Edit: March 23, 2015, 07:21:18 pm by JohnnyBerg »
 

Offline bitshiftTopic starter

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Re: Please critique my digital power supply design
« Reply #6 on: March 24, 2015, 06:38:57 am »
You forgot the emitter in the transistor. It is on the "out" side.
Well spotted Johnny! Thanks  :)

Note: keep in mind that the series transistor can get quite hot. 20V input, 1V output @ 1A = 19 Watts. You need a big heatsink!
I will keep this in mind.

In light of this new knowledge, I have some questions about the LM317:



Why is the zener included in the IC? Also why is there a resistor from the input voltage to the non inverting input of the op amp? Wouldn't that cause any noise on the input to be passed onto the op amp resulting in it being amplified and put on the output?

I have also attached a basic schematic of the op amp driving the transistor. In the example, the op amp is sourcing roughly 80mA. Jelly bean parts like the LM358 can't source this much current. In order to protect the LM358, would it be a good idea to put a resistor between the output of the op amp and the base of the transistor to limit the maximum current? As far as I understand the resistor would cause a voltage drop but this would be compensated by the negative feedback of the op amp? What is the standard way of protecting the op amp?
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Offline cellularmitosis

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Re: Please critique my digital power supply design
« Reply #7 on: March 24, 2015, 06:57:35 am »
A resistor on top of a zener is just about the simplest way to make a voltage reference.  Any time you see that "circuit pattern, you can think of it like your 4.096v reference hooked up to the same op amp pin.

The mental model I use when I see that pattern is that the zener is the stiff element, and the resistor is "squishy".  Thus, as the suppy voltage bobbles up and down, the voltage drop across the squishy part changes, not the stiff part.

This makes it obvious how to turn a zener into a negative voltage reference.  The stiff part hangs down from the ground rail, and the squishy part hangs beneath that, absorbing all of the bobbling of the negative rail.

Now that I've actually typed these thoughts out, I can't believe how ridiculous they sound.
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Offline bitshiftTopic starter

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Re: Please critique my digital power supply design
« Reply #8 on: March 24, 2015, 07:02:37 am »
Thanks, that "ridiculous" explanation actually helps a lot :-+

Why include it in the first place though? Why not just let the voltage on the adjust pin go straight to the op amp?
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Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #9 on: March 24, 2015, 07:19:38 am »
Why include it in the first place though? Why not just let the voltage on the adjust pin go straight to the op amp?

The zener is configured as a "shunt regulator". It needs some kind of supply, hence the resistor.

http://www.radio-electronics.com/info/power-management/linear-power-supply-psu/shunt-voltage-regulator-theory-circuit.php
 

Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #10 on: March 24, 2015, 08:31:50 am »
the op amp driving the BJT

in some PDF i read, it always describes unlimited shortcircuit allowed, but in another (i cant remember the model maybe its a TL JFET), the output sink shorting to +ve rail for prolonged periods might kill the op amp. so should 1 put sinking protection? (maybe a diode + 100R?)

There is a little bit of math needed for this one :)

Assume series transistor is a TIP120. It is configured like a emitter follower. Assume power supply output current is 4A.
Base current of the series transistor (= output current of the opamp) is emitter current / gain. Datasheet says that gain (hfe) of a TIP120 is 3000. (figure 1).
So base current is 4A/3000 = 1.33 mA. No problem for most opams!
So from a current point of view we do not need a series resistor or diode.

How about voltage view, you may ask  8)

Base emitter voltage is about 1.4 to 2.5V, depending on how much current is drawn. When output is 0V, the opamp needs to be capable of going below that voltage. When the opamp is dual supply, any opamp can do that. When the opamp is single supply, more care needs to be taken. I think most opamps can do that, even a LM358 :P

When the output voltage is at its max (16V) opamp output needs to be 17.4~18.5V (16+Vbe). Single or dual supply does not matter here, when supplied with 20V, the opamps must be capable of outputting 1.5V below the positive rail. I think most opamps can do that to ;)

So from a voltage point of view we do not need a series resistor or diode. It is unwanted, as its makes the job harder for the opamp when outputting high voltage ;)

Datasheet: https://www.fairchildsemi.com/datasheets/TI/TIP120.pdf

note1: for simplicity i made several shortcuts :P

note2: when there is a current limiting circuit, there is a remote possibility that a series resistor is needed, depending on the implementation of that circuit.

note3: in a emitter followerer, the opamp does not sink current.
« Last Edit: March 24, 2015, 08:36:22 am by JohnnyBerg »
 

Offline codeboy2k

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Re: Please critique my digital power supply design
« Reply #11 on: March 24, 2015, 09:19:19 am »
[Some of what I say below was already covered by JohnnyBerg, since he responded as I was writing this up]

With the first drawing, it looked like you were trying to get to 0V output with the -1.25 volt reference summing into the DAC output.

Was that a goal?  because the second drawing, without the LM317 and just using the pass transistor is much better, but it won't go down to 0V.

You'll need the opamp to drive the transistor's base below 0V to get 0V out, since the emitter is always 1 Vbe higher than the base. I'm assuming it's an NPN pass transistor.

2) you might need to use a darlington pair to get the drive strength you need, depending on the current requirements and the beta of the pass transistor.

3) with or without the darlington pair, you will need to remember that OPAMP U3 must drive it's output higher than the desired output voltage. Some jellybean , low cost opamps are not rail-to-rail outputs, so the opamp output can only reach a volt or 2 below the supply rail.  i.e. if the supply is 18V, then the opamp output can get to only 16V, and then the max output can be 1  Vbe below that, or 2 Vbe's if you use a darlington pair.  This limits the output to Vsupply - 2 - (2 Vbe's ). To be safe, say the Vbe = 1V at high current, so the output will be < Vsupply - 4 = 20-4 = 16. So your output goal of 0-15V is achievable.

4) You can reduce the drive requirements of the opamp U3 by using an NPN driver and a composite  NPN-PNP for pass transistor (I think this was first described by Bob Pease but I might be wrong):


(image edited with corrections)

In this configuration, the opamp does not need to go to high voltage a few Vbe's above the output as JohhnyBerg and I said. This configuration drives the first NPN Q101 in a small range of about 0-1V  that allows the opamp to be run off +5V.  In this way, the high-voltage rail can now go much higher than 20V (as long as the pass transistors can handle the voltage), and you don't need to worry about the op-amp running at the same high voltage as the output rail.  You can run the opamp at a more reasonable voltage.  Note that the 2 diodes on the emitter of Q101 actually move the range up by 2 diode drops, or about 1.4V. So the transistor operates at about 1.4V to 2.4 V at the base, and this means the OpAmp does not need to go to 0V to get 0V at the pass transistor's emitter (the output of the PSU) . This solves the 0 volt problem without needing a negative supply.


« Last Edit: June 05, 2015, 07:52:24 am by codeboy2k »
 

Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #12 on: March 24, 2015, 09:36:16 am »
Solution 4 is really nice, you are entering high school of PSU design there :)

@codeboy2k: may I suggest putting a small capacitor between output of the opamp and the inverting input?
You know what they say: oscillators do not start, and amplifiers oscillate  ;D
 

Offline codeboy2k

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Re: Please critique my digital power supply design
« Reply #13 on: March 24, 2015, 11:21:23 am »
Solution 4 is really nice, you are entering high school of PSU design there :)

@codeboy2k: may I suggest putting a small capacitor between output of the opamp and the inverting input?
You know what they say: oscillators do not start, and amplifiers oscillate  ;D

I agree.  It could possibly need a small cap there to limit the bandwidth, but what value ?  Many people just throw a 10n there for good luck. I think that's wrong.  The feedback cap, the feedback resistors, the 1k output resistor (which might be too high, maybe 100 ohm is better as the output resistor) and the load capacitance form a pole-zero system that needs to properly designed.

Now I'm going to disobey what I just said, and use a rule of thumb :)  You can try the feedback cap at about 1 or 2 orders of magnitude less than the load capacitance. Which for the BJT as a load the opamp might only see 10pf to 20pf of capacitance, so the feedback cap should be 1-2 pf as my first guess.
 

Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #14 on: March 24, 2015, 12:11:55 pm »
It could possibly need a small cap there to limit the bandwidth, but what value ?

That's a good one. I must admit that I am lazy, so when designing I always draw 22p / 0805 footprint. That is, off course, never the right value ;) When bread boarding I often use 10n, just to keep things in hand.
When the pcb is ready, and all parasitic capacitance is know, and I figured out what opamp I will use, I determine the value of the capacitor. With some margin.

When I am feeling lucky, I might even fire up LTSpice :)

Rev. B of the pcb always has the right value, I suppose.
 

Offline bitshiftTopic starter

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Re: Please critique my digital power supply design
« Reply #15 on: March 24, 2015, 05:17:11 pm »
Thanks for the awesome ideas JohhnyBerg and codeboy2k  :-+

So in an attempt to understand solution 4, I fired up LTspice and created a simulation for it. So since the feedback of the op amp comes from the emitter of Q3, wouldn't the op amp still need to be powered from a voltage greater than the 20V on the PNP? I've attached the simulation as well as an image of the output.

The simulation steps the non inverting input of the op amp from 0V to 1V in 0.2V increments. The "oscilloscope" view is the voltage on the emitter of Q3. R8 is the load.

Note: I changed the gain resistor of the op amp from 50k to 40k to give a 5x gain.
« Last Edit: March 24, 2015, 05:22:49 pm by bitshift »
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Offline JohnnyBerg

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Re: Please critique my digital power supply design
« Reply #16 on: March 24, 2015, 05:48:50 pm »
So since the feedback of the op amp comes from the emitter of Q3, wouldn't the op amp still need to be powered from a voltage greater than the 20V on the PNP?

Nope, powering it from 5V will be enough.

That's easy to see. Assume output of the opamp is 3V. 0.7 V is lost in BE of Q1. Then 2 x 0.7V is lost over the diodes D1 and D2.
The rest, 0.9V is then over R1, giving a base current of 0.9mA
That puts Q1 in complete conductance, and also Q2 and Q3. Output voltage will be maximum then.
« Last Edit: March 24, 2015, 05:50:54 pm by JohnnyBerg »
 

Offline bitshiftTopic starter

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Re: Please critique my digital power supply design
« Reply #17 on: March 24, 2015, 06:05:49 pm »
Thanks for the explanation Johhny, I appreciate the patience :)

On to learning more about transistors  :-/O
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Offline codeboy2k

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Re: Please critique my digital power supply design
« Reply #18 on: March 25, 2015, 07:51:05 am »
Oops, yes, 40k not 50k.   It's non-inverting... see even us old folks make mistakes :) I'll fix the main diagram just to make it right there too.

Hmm, simulation looks good.  I didn't simulate it  (or I would have found that 50k error  |O )

But you see you get a nice 5V out for 1V in.

You'll now need to do some power dissipation calculations. I think the 100 ohm between Q1 and Q2 is too low, actually. The path from 20V though 1 Vbe drop of Q2 , then the 100 ohm, across the C-E of Q1, and then 2 diodes D1, D2 has to drop all of that 20V.  the 100 ohm is too low and won't limit the current enough, so it's mostly going to be going through Q1's C-E which will have to burn it up (P=VxA). We don't want Q1 burning, so better to increase the 100 ohm to something bigger, which limits the current through Q1 to just high enough to enable Q2 to saturate at the highest load current needed from Q3.  There's some math needed to figure out how much base current you really need on Q2 to saturate it and drive Q3 hard enough to supply the max current (depends on Q3's beta).  So pick a resistor that allows Q2 enough base current to saturate, and drive Q3 with enough base current to give the output you needs based on Q3's beta.  And all that depends on what you actually use in your final design for Q2 and Q3.  The 100 ohm I picked just guarantees it works, but it's not efficient.  You might be able to use 10k, 22k, 33k, etc.

So, for example, say the beta of Q3 is 100, and you want 2A drive from it. So you need 20mA base current. This comes from Q2.  If Q2 is also a beta of 100, you need 200 uA at the base of Q2.  So your resistor choice at the base of Q2 should allow 200uA at least. This comes from Q1, which also has a beta of 100, so Q1's base is driving at 2uA.  This is in the active region, not saturation, so it's burning power.

« Last Edit: March 25, 2015, 08:52:50 am by codeboy2k »
 


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