PLL with a constant phase shift over frequency range?

[David_]

Hello.

I have been trying to make sense out of PLL's (Phase Locked Loop) but I am still unable to answer the question about how to make a PLL to be able to lock in the range of 10Hz - 1MHz while always providing a output which is phase shifted by 90 degrees related to the input no matter which frequency the input is at (within that previously stated range).
Do you know how such a circuit could be realized?

This will be incorporated within a dual channel Lock-In Amplifier used to measure complex impedance.

Regards

[BigBoss]

Because VCO is an integrator and Transfer Function of an integrator is 1/s in s-domain.
So, there is a 90 degree phase shift in time domain.

[Kleinstein]

Most phase comparators produce an output proportional to the phase difference. If the loop filter behaves like an integrator for the low frequency part, if will lock at 0 output signal from the phase comparator. It depends on the type of phase comparator at which phase difference this will happen. For the XOR type phase comparator this would be at a 90 degree phase. By adding an offset / additional signal one can adjust the phase by a frequency independent offset if needed.

However there might be some small additional phase shifts from the input stage and amplifiers. So one usually needs the adjustment for these errors.

For an Lockin one will usually run the VCO at a higher frequency so that the coarse phase steps (like 90 degree and maybe 45 deg.) can be done digitally with high accuracy.

For an impedance measurement, there usually is a single oscillator to generate for the driving signal and the reference signals. So no PLL is needed, just a divider. Small errors (e.g. due to the amplifiers) is usually better corrected numerical afterwards. In modern implementations the Lockin part can very well be in the numerical domain, so behind an ADC that samples the signal. Except for very high frequencies it is usually better to use the ADC on AC and avoid an DC signal.

[Yansi]

Hello.

I have been trying to make sense out of PLL's (Phase Locked Loop) but I am still unable to answer the question about how to make a PLL to be able to lock in the range of 10Hz - 1MHz while always providing a output which is phase shifted by 90 degrees related to the input no matter which frequency the input is at (within that previously stated range).
Do you know how such a circuit could be realized?

This will be incorporated within a dual channel Lock-In Amplifier used to measure complex impedance.

Regards

You better use a dual channel DDS for that purpose.  At 1MHz top, that won't be much of a problem. Either find a suitable IC for that, or make one yourself. (dual channel DAC of your choice + SRAM + small CPLD otherwise). Making a PLL+VCO for that that will work over that range will be one pain in the butt, am telling you right!