PNP Current Mirror

[Legion]

I was reading about current mirrors and while a current mirror built with NPN transistors was easy to understand, the direction of current flow confuses me when you switch to PNPs.

In the attachment you can see a PNP current mirror circuit from AoE. It makes sense that the bases would share a common voltage with Q1's collector, but the text states "You 'program' the mirror by sinking a current from Q1's collector."

I'm not sure if my understanding of PNPs is flawed, but it seems like the current would have to flow backwards to satisfy that statement, at least according to the arrows in the circuit indicating current flow. What am I missing here?

[jlmoon]

Legion,

The way you currently have your illustrations on your drawing for the I's.. this would be Hole Flow mode, not electron flow in a device.  With electron flow, the current would be flowing against any diode junctions (arrows on emitter of transistors)  or neg potential to Pos +15 potential.  The mirror you have drawn would also be a current-sourcing unit.  Just as in a NPN mirror the rules of keeping the junction temperatures the same (bonded or co-joined device)  Another way to think of this device is a "impedance transformer" consisting of near unity gain with your Q1 acting as a diode (B-C short) and featuring a low impedance while your active device Q2 acts as a high impedance (on output) which is ideal for a current mode function.  Does this help?


JLM

[Legion]

I think I get it now. The fact that the base of a PNP sinks current still throws me a little. I think of the base as an "input", so having current flow out of the base is harder for me to conceptualize.

[Legion]

Legion,

The way you currently have your illustrations on your drawing for the I's.. this would be Hole Flow mode, not electron flow in a device.  With electron flow, the current would be flowing against any diode junctions (arrows on emitter of transistors)  or neg potential to Pos +15 potential.  Does this help?

I'm comfortable with conventional vs hole flow, but I guess I still have to get used to PNPs.

[jlmoon]

Yes, I know what you mean.. just remember a transistor is a 'current controlled device' .. meaning the Base / Emitter junction is just a diode.. and because it is a P.N.P.  (p'n N the Pot!)   it still plays by the rules of the base/emitter junction (to bias on - junction must be forward biased to > .6 volts) and when this condition is met current flows(electron flow) into the base through to the emitter to the supply.. (in your case to +15v rail)  This confused me for along time as well until I started servicing high end audio systems where they used a lot of Class A biasing.  Another tip in case you don't know.. to consider the correction biasing of a PNP.. just think of the base as being more (-) than the emitter .. .hence P-N-P junction, while on a NPN.. the base has to be more (+) than the emitter for correct biasing. 

JLM

[ejeffrey]

Don't think about electrons and holes.  Conventional current flows in the direction of the arrow, which the manufacturers have kindly placed on the data sheet so you don't have to keep track of semiconductor physics

[jlmoon]

@jeff...
Now you're going to make me switch after all these years.  Ugh.. lol.. I'm so used to going against the arrows it has become second nature to me.. simply because of the naming conventions used in NPN & PNP junctions..

[Legion]

@jeff...
Now you're going to make me switch after all these years.  Ugh.. lol.. I'm so used to going against the arrows it has become second nature to me.. simply because of the naming conventions used in NPN & PNP junctions..

When I started learning electronics, I initially went with electron flow but was beaten into submission by all the manufacturer markings and texts that use conventional flow. If you can't beat 'em, join 'em.

[Legion]

Follow up question: Do the relative impedances of the programming resistor and the load matter? For instance, in the original circuit, if the load was 8 ohms, you'd think more current would flow through the right path vs the left path, assuming the transistors aren't at saturation.

[jlmoon]

Follow up question: Do the relative impedances of the programming resistor and the load matter? For instance, in the original circuit, if the load was 8 ohms, you'd think more current would flow through the right path vs the left path, assuming the transistors aren't at saturation.

Don't quote me on this, but I think a 8 ohm load imp on this type of circuit would be out of the question..   A current mirror is usually used only to establish a bias current of moderately low levels (milli-amps in range)  for the following (follower) circuits down stream, typical driver stages for a Class A amplifier.  The programming resistor should set the idle / quiescent current and if you change the load current in Q2 ie: load current.. it should not affect the 'programmed' current established in Q1.   Providing the elements are a matched pair (such as a true dual transistor device designed for match temp-coef and betas) . 

Since voltage across the two transistors' base-emitter junctions is the same -- the two junction pairs being connected in parallel with each other -- so should the current be through their base terminals, assuming identical junction characteristics and identical junction temperatures. Matched transistors should have the same ? ratios, as well, so equal base currents means equal collector currents. The practical result of all this is Q2's collector current mimicking whatever current magnitude has been established through the collector of Q1 by the potentiometer. In other words, current through Q2 mirrors the current through Q1.  Changes in load resistance (resistance connecting the collector of Q2 to the positive side of the battery) have no effect on Q1's current, and consequently have no effect upon the base-emitter voltage or base current of Q2.

rereading my text, realized I have referenced a npn mirror.  Same effect

Hope this is somewhat clear

JLM

[jlmoon]

Legion,

Now I want to bread board some of those just to go back to mirrors 101.. just to reestablish my theories.. would be a great refresher!

[Legion]

So I breadboarded that current mirror to see what happens when I vary the programming resistance with a fixed load. I don't have any transistor array ICs so I used two discrete 3906s. I used a 9V battery as a voltage source instead of the 15V shown in the circuit diagram.

The first time I used a 1k load resistor. I varied the programming resistance using a 1 meg pot. The program and load currents tracked quite well until the program resistance dropped below 1k. Around 500 ohms the load current peaks at 7.4mA but the program current is 11.4mA. As the program resistance drops close to zero and Q1 saturates, the load current falls off to 5mA.

The second time I used a 10k load resistor. Again, things tracked well until the programming resistance fell below the load resistance. Below 10k, increases in the programming current had almost no effect on the load current which stayed around 0.75mA. The load current fell off to ~0.5mA when Q1 saturated.

The fall off in load current seems to occur due to Q1 saturating and stealing current from the common base line.

Because I only have two multimeters I couldn't simulataneously measure both of the currents and the various voltages around the circuit. So I only measured current on each side and resistance.

At any rate, it looks like this particular type of current mirror falls apart when the program resistance drops below the load resistance.

I've attached an excel spreadsheet with my data and graphs.

[jlmoon]

Hello Legion,

The fall off in load current seems to occur due to Q1 saturating and stealing current from the common base line

In actuality when Q1 saturated, the voltage on the collector of Q1 approached Vcc .. or Vcc - Q1Vsat so this in turn turned off Q2 or allowed the base junction of Q2 to approach the rail (9v) which Q2 Emitter is tied to.  I have seen this style of current mirror with a totem pole style mirror arrangement where there is an additional mirror configuration above or between the +V rail and the Q1/Q2 Emitters.   When you drop the value of your programming resistor down near 0 ohms keep in mind you have a very forward biased diode just waiting for enough current to pop!   

The second time I used a 10k load resistor. Again, things tracked well until the programming resistance fell below the load resistance. Below 10k, increases in the programming current had almost no effect on the load current which stayed around 0.75mA. The load current fell off to ~0.5mA when Q1 saturated.

 

When you had the 10k load resistor (probably a good load design area) and you observed no effect on the load current change while increasing the programming current.. I would think this is considered the active (good region) of bias for this mirror.  There is a window of current this device will only track .. too low into cutoff .. too high, into saturation.

By the way, very nice graphs!

[Legion]

I've read in a couple places now that adding emitter resistors to the current mirror improves stability. The resistor values are chosen to provide a few tenths of a volt drop. But that's where the explanations always end and I don't understand how this fixes anything.

How does going from
V_E = V_CC
to
V_E = V_CC - 0.3V
accomplish anything?

Assuming a variable voltage source like a lab supply, would setting the power supply voltage lower by a few tenths of a volt accomplish the same thing?

[T3sl4co1l]

To a sufficient degree of simplification, the transistor obeys the Ebers-Moll equation:

Ic = Is * exp(Vbe/Vth)

Where Is is the saturation current (roughly proportional to the off-state or reverse leakage current: for 2N3904 and the like, usually in the pA range; proportional to device size, temperature dependent), Vbe is the applied base-emitter voltage (or emitter-base for a PNP -- PNP works exactly identical to NPN, just flip all the arrows), and Vth is the thermal voltage (KbT/q_e ~= 26mV, give or take a factor (emission coefficient N)).

But discrete transistors have wildly varying parameters: even if you match Vbe (by wiring the bases and emitters together), the thermal voltages may vary (the "output" side of the mirror may have much higher voltage drop, dissipating much more power than the "input" side, which is dropping only Vbe -- as a result, the output side heats up), and the chips themselves may not be matched (in geometry, doping and so on), resulting in different Is values.

By using emitter resistors, you potentially simplify the circuit much more.  Instead of requiring Ebers-Moll, you can describe the circuit fairly well (meaning, within a certain accuracy over a certain range of operation) with the even more basic linear-offset model (Ic = Ib * hFE, Vbe = either 0.7V, or v_be + Ib * r_b, using the incremental resistance).  By not having to invoke Ebers-Moll for basic operation, you can immediately guess that the process and temperature variation will be significantly better, and this is exactly the effect.

By the way, suppose you only added the emitter resistor to one side.  Now you get a hybrid.  One side looks more-or-less linear, but the other side is still very nonlinear.  What's the result?  A logarithm (or exponent, depending on which side gets it).  This is the Widlar Current Mirror, which has some applications as a crude bias reference (the output is still dependent on the input, but it varies logarithmically as Vbe vs. Ib, which is better than a resistor which varies proportionally) and computation element (the exponent of the sum of two logs is the product of those numbers, i.e., you can build an analog multiplier of sorts, making Q = X*Y by taking Q = exp(log(x) + log(y)), and of course, currents are easy to add by summing them in a single node).

Tim

[Legion]

By using emitter resistors, you potentially simplify the circuit much more.  Instead of requiring Ebers-Moll, you can describe the circuit fairly well (meaning, within a certain accuracy over a certain range of operation) with the even more basic linear-offset model (Ic = Ib * hFE, Vbe = either 0.7V, or v_be + Ib * r_b, using the incremental resistance).  By not having to invoke Ebers-Moll for basic operation, you can immediately guess that the process and temperature variation will be significantly better, and this is exactly the effect.

But why is this true? How does the addition of resistors cause the circuit to behave according to the linear offset model?

[T3sl4co1l]

Do the math

[Legion]

Do the math

Your kung-fu is too strong. I do not understand.

[T3sl4co1l]

What is the V-I characteristic of a current mirror (input voltage to output current) without emitter resistor?  With?

Ic = Is * exp(Vbe / Vth) in both cases, but in the latter case, Vbe = Vin - Ic * R_E.

Diode-resistor circuits, unfortunately, do not permit closed form solutions (the best you can get is in terms of the Lambert W function, or approximating it by computing the recursion), but in terms of percentage change in various parameters, it should be easy to see which term dominates under what conditions.

In particular, looking at the rate of change, dVbe / dIc = Vth / Ic (which is the incremental emitter resistance r_e), and comparing that to R_E (the external resistor) is the key here.

Tim

[Legion]

What is the V-I characteristic of a current mirror (input voltage to output current) without emitter resistor?  With?

Ic = Is * exp(Vbe / Vth) in both cases, but in the latter case, Vbe = Vin - Ic * R_E.

Diode-resistor circuits, unfortunately, do not permit closed form solutions (the best you can get is in terms of the Lambert W function, or approximating it by computing the recursion), but in terms of percentage change in various parameters, it should be easy to see which term dominates under what conditions.

In particular, looking at the rate of change, dVbe / dIc = Vth / Ic (which is the incremental emitter resistance r_e), and comparing that to R_E (the external resistor) is the key here.

Tim

Thanks, that clears things up a bit.