Positive & Negative pulse extender

[tanlccc]

Need help...

I have an electrical signal that can give either a positive +10V square pulse or a negative -10V square pulse. The duration for each square pulse is 100ms.

I would like to prolong the pulse width to 300ms while maintaining its polarity.

What can I do?

[Ian.M]

What's the signal level between pulses?

[tanlccc]

What's the signal level between pulses?

When there is no pulse, the voltage level is 0V.

When signal comes, it will be either one of the following:

0V -> +10V  ~~~ 100ms ~~~  +10V -> 0V

0V -> -10V ~~~ 100ms ~~~ -10V -> 0V

[keethrax]

Some questions that occur to me:


Is the input always 100ms? If it varies are you always looking for 300ms, or for 3x the original?

How accurate does the 300ms timing need to be?

Does the 300ms pulse start as soon as the input goes to 10V or -10V or does it wait until after the 100ms pulse is complete?

How much delay is acceptable between receiving (or ending depending on the answer to the above question) the 100ms pulse and starting the 300ms pulse?

Can a second pulse be received 300 ms?

If a second pulse during the 300ms pulse is possible, what is the desired behavior? I can think of at least three possibilities.

[tszaboo]

Do you have positive and negative power supply, or just this signal coming from a pair of wires?

[tanlccc]

Hi keethrax,

Below are my replies:

Some questions that occur to me:

Is the input always 100ms? If it varies are you always looking for 300ms, or for 3x the original?

The input signal varies between 90ms to 110ms. The output signal will need to be at least 300ms, preferably fixed at 300ms. A 3x the original solution will also be fine.

How accurate does the 300ms timing need to be?

Replied above.

Does the 300ms pulse start as soon as the input goes to 10V or -10V or does it wait until after the 100ms pulse is complete?

No need for the 100ms pulse to complete. As soon as it is triggered, the 300ms pulse can start.

How much delay is acceptable between receiving (or ending depending on the answer to the above question) the 100ms pulse and starting the 300ms pulse?

Any delay less than 100ms is acceptable.

Can a second pulse be received 300 ms?

If the second pulse received at 300ms, the output can be 300ms.

If a second pulse during the 300ms pulse is possible, what is the desired behavior? I can think of at least three possibilities.

The output can be the same.

[tanlccc]

Do you have positive and negative power supply, or just this signal coming from a pair of wires?

Actually the output comes from a particular device (single wire) that gives positive and negative output. I need to alter this output to have longer pulse width (100ms to 300ms) that's all.

[BrianHG]

Do you have positive and negative power supply, or just this signal coming from a pair of wires?

Actually the output comes from a particular device (single wire) that gives positive and negative output. I need to alter this output to have longer pulse width (100ms to 300ms) that's all.

Yes, but if you don't have a +10v and -10v supply to drive your output 300ms signal, where would the power come from?
Is there a relative GND reference.  Example, is the 1 source wire going +10v with the other wire to GND, and when you have -10v, is the +10v wire going to GND and the other wire going to +10v making the signal at the wire look like it's going from -10 to +10, then both wires at GND for 0v?
Or, is 1 wire a true fixed GND and the other having a 20v PP swing?
When you have 0v, is this an open signal, or, is it shorted at GND?

Also, how much current will you need to drive?
Could an RS232 driver with a +/-10v supply give your enough current?  And for 0v, just disabling the output drive leaving the output at 0v sufficient?

[eblc1388]

Based on your requirement, I have come up with the following circuit. It uses only two ICs, namely CD14538B Dual Monostable and Dual Opamp like LM358.  The circuit requires +/- 12V supply to work. You can use a supply of +/-10V if you use Rail-to-Rail output Opamp.

The input(IN) signal will be fed to both monostables trigger, with one triggering on the positive going +10V edge and the other -10V edge. The monostable output pulse width is fixed by R1/C1 and R2/C2 to 300mS. Addition circuitry is added to take care of the condition where another pulse arrives before the 300mS timing period has completed. The two separate output of the monostable are recombined into one using the dual opamp to obtain a single output(OUT).

A simulation was done to confirm the operation of the circuit when normal and abnormal pulses are presented and the output is correct. Notice that the simulation is done in microsecond time scale rather than millisecond as it would take ages to simulate otherwise. The only difference is the value of the monostable timing component R1/C1 and R2/C2.

Obviously this is just one way to tackle your problem and I'm sure there will be other ideas from different members soon.

Correction: typo, CD4538B should be CD14538B

[Ian.M]

I threw a LTspice sim together based on rectifying the input pulse, thresholding it with a comparator and delaying and stretching it to gate a sample and hold circuit - however it was quite ugly with a mess of six MOSFETS to do the sampling, due to the lack of a 'real world' analog switch with enough voltage range and a LTspice model.  The voltage range required is too high for 4000 seroes CMOS analog switches.  Ideally, I'd use something like a Toshiba photo-MOSFET in the sample & hold section, but I couldn't find any SPICE models for them. 

[tszaboo]

Do you have positive and negative power supply, or just this signal coming from a pair of wires?

Actually the output comes from a particular device (single wire) that gives positive and negative output. I need to alter this output to have longer pulse width (100ms to 300ms) that's all.

You need power to do that.

[tatus1969]

After some tinkering I came up with this circuit that should do the job and does not need an additional power supply. The signal slope of the output is not very fast, and it cannot drive a low impedance very well. (C2 is providing the output level). Timing is adjusted by C1 / R3, and it depends on the voltages of D7+Q5 and D8+Q6 as well, so there is some part and temperature dependency. EDIT: the input also presents a large capacitive load, 22uF.

[tanlccc]

Based on your requirement, I have come up with the following circuit. It uses only two ICs, namely CD14538B Dual Monostable and Dual Opamp like LM358.  The circuit requires +/- 12V supply to work. You can use a supply of +/-10V if you use Rail-to-Rail output Opamp.

The input(IN) signal will be fed to both monostables trigger, with one triggering on the positive going +10V edge and the other -10V edge. The monostable output pulse width is fixed by R1/C1 and R2/C2 to 300mS. Addition circuitry is added to take care of the condition where another pulse arrives before the 300mS timing period has completed. The two separate output of the monostable are recombined into one using the dual opamp to obtain a single output(OUT).

A simulation was done to confirm the operation of the circuit when normal and abnormal pulses are presented and the output is correct. Notice that the simulation is done in microsecond time scale rather than millisecond as it would take ages to simulate otherwise. The only difference is the value of the monostable timing component R1/C1 and R2/C2.

Obviously this is just one way to tackle your problem and I'm sure there will be other ideas from different members soon.

Correction: typo, CD4538B should be CD14538B

Wow!! Thanks alot!! 

Appreciate taking your time to come out with the circuit. Will try it out.

[tanlccc]

Based on your requirement, I have come up with the following circuit. It uses only two ICs, namely CD14538B Dual Monostable and Dual Opamp like LM358.  The circuit requires +/- 12V supply to work. You can use a supply of +/-10V if you use Rail-to-Rail output Opamp.

The input(IN) signal will be fed to both monostables trigger, with one triggering on the positive going +10V edge and the other -10V edge. The monostable output pulse width is fixed by R1/C1 and R2/C2 to 300mS. Addition circuitry is added to take care of the condition where another pulse arrives before the 300mS timing period has completed. The two separate output of the monostable are recombined into one using the dual opamp to obtain a single output(OUT).

A simulation was done to confirm the operation of the circuit when normal and abnormal pulses are presented and the output is correct. Notice that the simulation is done in microsecond time scale rather than millisecond as it would take ages to simulate otherwise. The only difference is the value of the monostable timing component R1/C1 and R2/C2.

Obviously this is just one way to tackle your problem and I'm sure there will be other ideas from different members soon.

Correction: typo, CD4538B should be CD14538B

Thank you for providing the circuit solution. Will try it out.
 

[tatus1969]

any idea if my proposal could be useful?