Power supply design (2)

[paul18fr]

In parallel to a current topic (https://www.eevblog.com/forum/beginners/power-supply-design-35761/), I've found this (old) project:
http://www.electronics-lab.com/forum/index.php?topic=39481.msg1017450
http://diyfan.blogspot.fr/2012/02/adjustable-lab-power-supply.html

Just for my information, it's it interesting ?

Paul

[David Hess]

Is it interesting in what way?  It will certainly work although apparently there is an issue with startup surges.

I might include fold-back current limiting and thermally protect the output transistors.

The offset and gain adjustments on U2 seem out of place when it is not a precision design.

I like that it uses singled ended current sensing instead of an instrumentation amplifier.

[paul18fr]

Is it interesting in what way?

I'm currently looking for a Power supply (2nd hand one), when I found it on internet ; I've been thinking that, with a help of a skill people (that I'm not), it might be interesting to build it, economically but also in order to learn things.

The transformer is the most expensive part (http://www.digikey.com/product-detail/en/VPS28-4600/237-1281-ND/666167) ; the other ones seem to be more "classical" ...

... another delirium among many others

Paul

[liquibyte]

I've built two of these.  I have a third that was redesigned to use surface mount components that redwire over at their forums did.  The startup and shutdown spikes are an issue and I'm still working on figuring out a way to mitigate them based on suggestions I've gotten but haven't had much time for it lately so I'm not quite there yet.  I've tried asking about this here but the only real response I got was that the design was shit and I should just buy off the shelf.  Works fairly well for my needs, and other than the spikes, does what it was designed to do.

I have a few extra boards that I had made that are available and do work if you're interested in trying out the design I did based on that schematic, just PM me.

[David Hess]

The startup and shutdown spikes are an issue and I'm still working on figuring out a way to mitigate them based on suggestions I've gotten but haven't had much time for it lately so I'm not quite there yet.  I've tried asking about this here but the only real response I got was that the design was shit and I should just buy off the shelf.  Works fairly well for my needs, and other than the spikes, does what it was designed to do.

Oddly enough we recently had a discussion over on Tektronix list about a circuit that may have been included in their TM500 series PS-503 power supplies by a thoughtful designer to prevent output glitches during start up and shut down.  Take a look at Q15 and Q115 on the PS-503 schematic.

From the theory section in the PS-503 manual:

Q15 and associated components make up a shut-down equalizer circuit.  When the TM-500 series power module power switch is turned off, or power fails, the shut-down equalizer circuit will cause the supply (+ or -) that has the lightest load to reduce its output voltage to prevent spiking of the lightly loaded supply as the filter capacitor is discharged.

[mikerj]

That looks like the design that Quasar electronics sell as a kit.  I built one many years ago (probably 15 years) and it seemed to work ok though I don't think I ever looked at the output transients at the time!

[liquibyte]

Oddly enough we recently had a discussion over on Tektronix list about a circuit that may have been included in their TM500 series PS-503 power supplies by a thoughtful designer to prevent output glitches during start up and shut down.  Take a look at Q15 and Q115 on the PS-503 schematic.

From the theory section in the PS-503 manual:

Q15 and associated components make up a shut-down equalizer circuit.  When the TM-500 series power module power switch is turned off, or power fails, the shut-down equalizer circuit will cause the supply (+ or -) that has the lightest load to reduce its output voltage to prevent spiking of the lightly loaded supply as the filter capacitor is discharged.

I'm assuming this is the manual you're referring to, or at least similar enough in the schematic to use as a basis for study?  I immediately spotted Q15-Q115 in the schematic but the quote is from the "Power Line Regulation" section 5-2 starting on page 27 at the bottom.  The way it's worded makes it sounds like it's a feature for when the supply is in dual tracking mode.  Either way, it's a solution that bears looking into, much appreciated.

[liquibyte]

That looks like the design that Quasar electronics sell as a kit.  I built one many years ago (probably 15 years) and it seemed to work ok though I don't think I ever looked at the output transients at the time!

Yep, I just looked it up and the schematic in this manual is identical to the original project that was reworked to solve a lot of the issues the first builders had with underrated components.

[David Hess]

I'm assuming this is the manual you're referring to, or at least similar enough in the schematic to use as a basis for study?  I immediately spotted Q15-Q115 in the schematic but the quote is from the "Power Line Regulation" section 5-2 starting on page 27 at the bottom.  The way it's worded makes it sounds like it's a feature for when the supply is in dual tracking mode.  Either way, it's a solution that bears looking into, much appreciated.

That is the one.  Their PS-501 power supply is similar but only has one side and lacks the Q15/Q115 circuit or I would have suggested it instead.

The designs for the PS-503 and the one you asked about use similar voltage and current control loops or-ed together with diodes.  The PS-503 clamp circuit works on that same point to pull the output down preventing glitches which is why I mentioned it.

There is no relationship to dual tracking mode.  The positive and negative supplies share a common ground and may be operated independently or with tracking.  The Q15/Q115 clamp circuit operates on both no matter how they are configured.

[liquibyte]

I'm assuming this is the manual you're referring to, or at least similar enough in the schematic to use as a basis for study?  I immediately spotted Q15-Q115 in the schematic but the quote is from the "Power Line Regulation" section 5-2 starting on page 27 at the bottom.  The way it's worded makes it sounds like it's a feature for when the supply is in dual tracking mode.  Either way, it's a solution that bears looking into, much appreciated.

That is the one.  Their PS-501 power supply is similar but only has one side and lacks the Q15/Q115 circuit or I would have suggested it instead.

The designs for the PS-503 and the one you asked about use similar voltage and current control loops or-ed together with diodes.  The PS-503 clamp circuit works on that same point to pull the output down preventing glitches which is why I mentioned it.

There is no relationship to dual tracking mode.  The positive and negative supplies share a common ground and may be operated independently or with tracking.  The Q15/Q115 clamp circuit operates on both no matter how they are configured.

I thought it might have something to do with being in dual tracking mode because Q15 is a 2N2222A and Q115 is a 2N2907A and their tied together in an odd way (at least to me) between the positive and negative supplies.  I'm having a hard time seeing where this could tie into the above posted circuit.  U45 is in the voltage loop and U55 is in the current loop but their configuration seems to differ a bit from the above schematic.  Given that U45 outputs to Q85 irrespective of U55 which seems to correspond to Q2 I'd assume a test could be done by tying a variation of this into pin 6 of U2 out to ground.

[liquibyte]

I just realized that Q1 in the original schematic serves this very function.  Now I'm wondering why it was ever removed.

[David Hess]

I thought it might have something to do with being in dual tracking mode because Q15 is a 2N2222A and Q115 is a 2N2907A and their tied together in an odd way (at least to me) between the positive and negative supplies.  I'm having a hard time seeing where this could tie into the above posted circuit.  U45 is in the voltage loop and U55 is in the current loop but their configuration seems to differ a bit from the above schematic.  Given that U45 outputs to Q85 irrespective of U55 which seems to correspond to Q2 I'd assume a test could be done by tying a variation of this into pin 6 of U2 out to ground.

The PS-503 has both because the positive and negative regulators are separate despite the common ground and tracking feature so they each need to be protected against output glitches.  What that share in common is that one biases the other so if power drops on one, the error amplifier on the other loses its + or - 5 volt bias supply.

I think what is needed to fix the glitch issue is an under voltage lockout which disables the output stage by pulling the base of Q2 to ground when the input voltage is low and that would apply especially to the negative supply voltage for the operational amplifiers.

[David Hess]

I just realized that Q1 in the original schematic serves this very function.  Now I'm wondering why it was ever removed.

Haha, Q1 not only does what I suggested but in the same way that it is done in the PS-503 schematic.  Maybe whoever removed it did not know what it did.  It is kind of hard on the operational amplifier.

[liquibyte]

The original op amps used were TL081's, the new version uses TLE2141's.  I have a third supply sitting here that I was testing out for another member from the other forum and I think I'll hack Q1 back in and see how it performs.  I really appreciate you pointing me to the PS-503, that made the light bulb go off when I started looking at it.  If it works, I'll probably re-design the circuit once more and put things to rights.

[paul18fr]

With the schematic & the B.O.M, there is an additional pdf file with comments ....

[Kevin.D]

Hi there liquibyte.
Heres a few  helpfull things I hope  .

 You have no  reverse Vbe protection in the first schematic for  your pass transistors .D10 served that purpose on the later (original) schematic you posted,theres also other way's to protect against this .
 When you attach a battery , or any Vsource on the output and it's Voltage is higher than your supply  Vout setting  then feedback error amp  tries to pull the output voltage down by reducing base voltage .This leaves the pass transistor's with it's Veb reversed and recieving full  Battery voltage you  applied.
BJT's Veb reverse Breakdown at  ~7v and permanently damaged (it reduces HFE).
In a darlington pair like your using it's usually  the smaller drive transistor (Q2) that will be the one that's damaged since the large one is protected by the speed up resistor (typically a few 100R from base to emitter) which is usually present .(R16 in your schema).

 When using pots or anything else that are common fail points ,It's best to try to connect them in such a way that they  'fail to safe', that is the V Supply output Drops when these devices fail  .You could do that here  but sometimes you cant always do this directly but then you can usually put 'pull to safe' resistors at various strategic points .
eg . Like a large value resistor across your C4 which then if the V control pot wiper lost connection (common failure with cheap pots)  this then pulls the non inv input down and so supply V output falls.
 .Without it the output would rise since  your opamp sources current (input bias current can flow out of opamp inputs ,it depends on opamp input stage type) out of it's non inv input and charges C4 so supply output rises to max .

I wonder why ther'es no minum load on the output ?,R12 is to big and doesnt count. usually emitter follower type Vregs benefit alot or even require a minumum current to maintain a decent regulation performace when sourcing low output currents <10mA . Thinking about it this is what a bench supply probably spends most of it's life doing with todays low power electronics devices. Would be interesting to see how it's performing at low output load currents .Do you have a sim available .? 

Good luck  .

[David Hess]

I wonder why ther'es no minum load on the output ?,R12 is to big and doesnt count. usually emitter follower type Vregs benefit alot or even require a minumum current to maintain a decent regulation performace when sourcing low output currents <10mA . Thinking about it this is what a bench supply probably spends most of it's life doing with todays low power electronics devices. Would be interesting to see how it's performing at low output load currents .Do you have a sim available .?

Integrated converters whether they use an emitter follower or not usually rely on their feedback or output pin to sink their quiescent current for biasing which leads to their minimum output load current requirement.  For instance a 7805 uses its common pin for this so generally does not care about minimum output loading while a 317 uses its output pin so must operate with a minimum load.

Like most bench supplies, the minimum load requirement for this design only matters if collector leakage of the pass transistors is high which is possible but usually not a problem.

[David Hess]

The original op amps used were TL081's, the new version uses TLE2141's.  I have a third supply sitting here that I was testing out for another member from the other forum and I think I'll hack Q1 back in and see how it performs.  I really appreciate you pointing me to the PS-503, that made the light bulb go off when I started looking at it.  If it works, I'll probably re-design the circuit once more and put things to rights.

I would not have made the link to and mentioned the PS-503 except that we were discussing its design over at TekScopes@yahoogroups.com last week.

The glitch problem may be related to a common (Haha!  Pun!) issue with operational amplifiers.  Many will undergo phase reversal of their output when their input common mode range is violated.  Various early JFET operational amplifiers including the TL081 series were known for this but many bipolar and CMOS amplifiers suffer from it as well.

[Kevin.D]

Like most bench supplies, the minimum load requirement for this design only matters if collector leakage of the pass transistors is high which is possible but usually not a problem.

Hi there David .
For me it's more of a problem of output impedance increasing at such low output currents and causing the load pole to move down in frequency .You can see it clearly in loop gain /phase  plots of followers under light load ,but then when you do a transient response performance test you still get really good performance ,  even though  now the loop phase margin has reduce to only a couple of degrees. Its good proof that source/emitter followers make such good inherant V regulators that even with a crappy loop at a 3 deg phase margin you still get great transient load/line performance . (if I get time over the weekend I will post  a few plots showing exactly what I mean).Here In this slow  static type supply it doesnt seem to be a big prob .  but i bet would cause you  trouble though if you ever wanted a dynamic V supply ,or in some other senario I havent yet  thought about  .

[Kevin.D]

Just had another quick look at this schematic shows another more serious prob with the way the current sense amp U3 is controlling the pass transitor  via U2 .This is not going to be stable since these two amps alone without any other poles will cause a close to a 180 phase shift (each contributing nearly 90 each in the way they are configured).
 I tried simulating a similar setup and it was totally  unstable in cc mode most of the time spice wouldnt even sim it  .if your CC stays stable  under most load then i'm a monkeys uncle. 
The way to do it would be  to let U3 control Q2 directly .(so the anode of D9 goes to the base of Q2 .And you put a 3K ish resistor on the output of U2 ,enabling U3 to directly pull Q2 base drive down.
Alternative would be to make U3 very low fixed gain( flat response so no phase shift)
but I prefer the former way.
If I feel like it this week ,I will post the quick spice analysis sometime .

Regards
p.s Correction ,when I  said both opamps contribute 90 deg ,I was mistaken, the  second  opamp U2 only behaves like a follower to U3's  input so contributes no gain or phase shift  .I was to sloppy with my quick  generic sim ,,but that still looks iffy loop . It's got no phase margin and it's  teetering right on the brink and starts oscillating under slight changes .
Perhaps I or someone will do a more thourough sim this weekend.

[David Hess]

Like most bench supplies, the minimum load requirement for this design only matters if collector leakage of the pass transistors is high which is possible but usually not a problem.

Hi there David .
For me it's more of a problem of output impedance increasing at such low output currents and causing the load pole to move down in frequency .You can see it clearly in loop gain /phase  plots of followers under light load ,but then when you do a transient response performance test you still get really good performance ,  even though  now the loop phase margin has reduce to only a couple of degrees. Its good proof that source/emitter followers make such good inherant V regulators that even with a crappy loop at a 3 deg phase margin you still get great transient load/line performance . (if I get time over the weekend I will post  a few plots showing exactly what I mean).Here In this slow  static type supply it doesnt seem to be a big prob .  but i bet would cause you  trouble though if you ever wanted a dynamic V supply ,or in some other senario I havent yet  thought about  .

I understand what you mean but have never found it to be a problem unless the frequency compensation was marginal to begin with.  Like you point out, emitter/source followers are really good in this respect but I have seen common emitter/source outputs also work well with no output load.

Some bench supplies include a constant current preload which allows the output to sink current if necessary so they operate effectively in class AB.

[David Hess]

Just had another quick look at this schematic shows another more serious prob with the way the current sense amp U3 is controlling the pass transitor  via U2 .This is not going to be stable since these two amps alone without any other poles will cause a close to a 180 phase shift (each contributing nearly 90 each in the way they are configured).
 I tried simulating a similar setup and it was totally  unstable in cc mode most of the time spice wouldnt even sim it  .if your CC stays stable  under most load then i'm a monkeys uncle. 
The way to do it would be  to let U3 control Q2 directly .(so the anode of D9 goes to the base of Q2 .And you put a 3K ish resistor on the output of U2 ,enabling U3 to directly pull Q2 base drive down.
Alternative would be to make U3 very low fixed gain( flat response so no phase shift)
but I prefer the former way.
If I feel like it this week ,I will post the quick spice analysis sometime .

Regards
p.s Correction ,when I  said both opamps contribute 90 deg ,I was mistaken, the  second  opamp U2 only behaves like a follower to U3's  input so contributes no gain or phase shift  .I was to sloppy with my quick  generic sim ,,but that still looks iffy loop . It's got no phase margin and it's  teetering right on the brink and starts oscillating under slight changes .
Perhaps I or someone will do a more thourough sim this weekend.

The PS-503 example we discussed has both control loops connected directly to the output element and most designs I have seen work the same way.

When the current control loop acts through the voltage control loop, it is slower but extra frequency compensation may not be necessary.  Often the output transistor and output capacitor limit the frequency response producing dominant pole compensation.  Put too fast of a transistor in there or let the output capacitor wear out and there can be problems however.

Designs that use a separate instrumentation amplifier inside the current control loop suffer from a similar problem with extra delay possibly causing frequency response problems which is why I prefer fast singled ended current sensing.

[liquibyte]

You guys are starting to lose me in a big way.

I've tried a test with a version that seems to be suffering an inversion problem that the original apparently had as well but that I thought might go away with the spiking problem if Q1 were added back in.

To wedge this back in, I combined both versions into one pic so I could compare and I also added the component values to see the differences there as well.  One thing that stood out to me almost instantly is that U2 on the revised version is no longer tied to U3 below ground so I don't know if this would be an issue or not.  I never made the original project so I can't comment on its performance other than having read the issues others have had with it.  The only issue that I can report, having tested the current version under full load at 3A at all voltage levels, is that on startup and shutdown there is a transient surge that would basically destroy any components not rated for it were they to be hooked up while that occurred.

I hacked together a 2N2222A (I don't have a BC548) with a 10K and 1.5K divider across its base like in the original.  I didn't put R15 or D10 back in and didn't move U2's ground and I don't know if that's important or not.  I did hook up the other side of R14 to the point between R3 and D7b.  What did happen was that I could only get around 200-250mV on the output regardless of where the current and voltage pots were set so I'm assuming that the transistor turned on and stayed that way and shunted everything back to ground while on instead of just during startup and shutdown.

One thing to note on this is that I am using a slightly modified version of this PS to do tests with but it does suffer from the same issues as the ones I built based on the revised schematic.  I'm attaching that schematic as well but please don't give me grief over it because all I did was do an image export of the .sch I got and didn't do the work myself, I'm way more anal about my schematics.  If I can solve this issue with transients, I'm going to redesign both my boards and the surface mount version that redwire did.

[Kevin.D]

The only thing I can see  to cause that glitch is if U3 is pulling non inv input of U2 below U2's gnd at startup and leaving C4 with neg charge on it compounding the problem  ( U2 output will invert if any of it's it's input go .3V below it's own -Vsupply ). disconnect a leg of D9 ,does your startup glitch go away ?.If so then you need to reconnect U2 -Vsupply  to the neg supply to solve this issue . If that was the cause here then the original wouldn't have suffered the problem  this problem .
 
Regards

 Later Addition :- I think I see what might have happened  on the orginal when U2's -V was  tied to the neg rail . The derived -neg rail  has such a  high source impedance  so  that during the initial turn on current surge the neg rail ends up being higher than  the normal gnd rail .Since U2 has it's + input tied to normal gnd via C4 then it is now below u2's -neg  rail and hence the polarity reversal of U2 output .
  This is probably slightly different  to what is happening to you now on your revised schematic (earlier reply) when U2 supply is not on the -neg rail . So by reconnecting U2 back to neg rail like I said earlier  after the D10 test wouldn't actually help unless you where also re-adding Q1 (which shut's the output off when the -neg rail rises) .
  If you wanted to keep your revised schema and leave out Q1 and keep U2 where it is now on the normal gnd (which is probably best), then a solution you can try is putting a schottky diode from U2 non inv input to -out gnd node (anode to -out).
 
This is the kinda thing that happens when you start having multiple gnd's one of them's high impedance and  they all move relatively to one another .You have each of your 3 opamps powered from different gnd points and it can make unforseen problems.
Good luck .

[David Hess]

Newer operational amplifiers may be immune to phase reversal by design.  For a while that was a selling point for replacing older amplifiers.