problem on 74LVC flipflop trigger at postive and negative edge

[diyinhk]

Recently I have strange experience with 74LVC flip flop, normally it should only trigger on postive edge, but it also trigger on negative edge. When the flip flop is changed to 74HC74, it do not have this kind of "problem".
Yellow: clock
blue: data
purple: output

[deephaven]

Probably due to the slow edges.

[diyinhk]

Probably due to the slow edges.

I think so...
all 74LVC datasheet should include caution on the max value of slow falling edge.
if this feature is stable, it can be used to simplify the circuit if we need both postive and negative edge trigger at the same time

[Precipice]

I think so...
all 74LVC datasheet should include caution on the max value of slow falling edge.
if this feature is stable, it can be used to simplify the circuit if we need both postive and negative edge trigger at the same time

No! That's a terrible idea. It's not stable, reliable or anything!
You'll find yourself getting a random number of edges per edge. If it's odd, the flipflop will end up changed, if it's even, it'll be back where it started. Any amount of noise (which is inevitable, either on the signal or the power, will change things.)

If you want to respond to slow edges, clean them up with a Schmitt trigger stage.

[diyinhk]

I think so...
all 74LVC datasheet should include caution on the max value of slow falling edge.
if this feature is stable, it can be used to simplify the circuit if we need both postive and negative edge trigger at the same time

No! That's a terrible idea. It's not stable, reliable or anything!
You'll find yourself getting a random number of edges per edge. If it's odd, the flipflop will end up changed, if it's even, it'll be back where it started. Any amount of noise (which is inevitable, either on the signal or the power, will change things.)

If you want to respond to slow edges, clean them up with a Schmitt trigger stage.

Thanks! I remember the tested 74LVC flip flop is already told to be Schmitt trigger on the datasheet, I should double check tomorrow.

[amyk]

Worth trying with a faster signal but don't rule out a broken flipflop... the datasheet for the SN74LVC74A for example says "Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse."?

[David Hess]

Probably due to the slow edges.

I think so...
all 74LVC datasheet should include caution on the max value of slow falling edge.
if this feature is stable, it can be used to simplify the circuit if we need both postive and negative edge trigger at the same time

That is interesting.  Often clock inputs, especially on flip-flops, have Schmitt trigger inputs to reduce false triggering.

I was going to suggest that your oscilloscope was concealing a glitch or input bounce but if the 74LVC does not have Schmitt trigger clock inputs, a slow edge could do it.

I would still check for ground bounce since the 74LVC is fast enough for this to be a problem if decoupling or the layout is inadequate.   Your oscilloscope may not be fast enough to reliably show it so indirect testing by altering the layout or adding additional decoupling may be necessary.

[David Hess]

Worth trying with a faster signal but don't rule out a broken flipflop... the datasheet for the SN74LVC74A for example says "Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse."?

I noticed the same thing but the maximum input transition rate is 10 ns/V which is more than on order of magnitude faster than the requirement for a 74HC74.  I noticed that neither TI datasheet shows a schmitt trigger input for the clock but other manufacturers do and they have similar specifications so that is probably an oversight by TI.

[Precipice]

I would still check for ground bounce since the 74LVC is fast enough for this to be a problem if decoupling or the layout is inadequate.   Your oscilloscope may not be fast enough to reliably show it so indirect testing by altering the layout or adding additional decoupling may be necessary.

You should be able to trigger on the flipflop's output, and run the scope as fast as possible, to look back in time at the input. On slow changing signals, it's pretty common to see a little hiccup on the input as the internals switch - and a risetime this slow is likely to have a high source impedance, so that hiccup will have a decent chance of doing harm. (Of course, extreme care is needed in probing stuff like this - short grounds on the scope probes (or active probes, if you've got them), or you're going to be seeing things that aren't real, and they're hell to fix!
Even _with_ a Schmitt stage, I'd be very wary about using a signal this slow and seemingly high impedance as a clock - it's going to be terribly susceptible to EMI.

Ah, looking at your trace - is this a rotary encoder? If so, do you get a choice of pullup resistor? Is it as small as it can be, for maximum edge speed and minimum noise?

[David Hess]

I would still check for ground bounce since the 74LVC is fast enough for this to be a problem if decoupling or the layout is inadequate.   Your oscilloscope may not be fast enough to reliably show it so indirect testing by altering the layout or adding additional decoupling may be necessary.

You should be able to trigger on the flipflop's output, and run the scope as fast as possible, to look back in time at the input. On slow changing signals, it's pretty common to see a little hiccup on the input as the internals switch - and a risetime this slow is likely to have a high source impedance, so that hiccup will have a decent chance of doing harm. (Of course, extreme care is needed in probing stuff like this - short grounds on the scope probes (or active probes, if you've got them), or you're going to be seeing things that aren't real, and they're hell to fix!
Even _with_ a Schmitt stage, I'd be very wary about using a signal this slow and seemingly high impedance as a clock - it's going to be terribly susceptible to EMI.

Triggering would not be a problem if only for the reason you identify but the oscilloscope will not reveal the true level of the bounce if its bandwidth is not high enough.  The 74LVC74 may respond to a clock pulse width of 1.3 nanoseconds or even shorter so a 100 MHz oscilloscope with 3.5 nanosecond rise time will be too slow.

As you identify, probing will not be trivial either.  This would be a good place of one of those home-made active probes or even better, a differential high speed probe.

For the reasons above, I would not even look for the ground bounce without a faster oscilloscope and instead would test various remedies.  The input slew rate could be measured though and that is probably the real problem.

Ah, looking at your trace - is this a rotary encoder? If so, do you get a choice of pullup resistor? Is it as small as it can be, for maximum edge speed and minimum noise?

If a pullup is being used then inverting the logic could solve the problem.  Then the slow edge could be the untriggered edge.

[diyinhk]

I would still check for ground bounce since the 74LVC is fast enough for this to be a problem if decoupling or the layout is inadequate.   Your oscilloscope may not be fast enough to reliably show it so indirect testing by altering the layout or adding additional decoupling may be necessary.

You should be able to trigger on the flipflop's output, and run the scope as fast as possible, to look back in time at the input. On slow changing signals, it's pretty common to see a little hiccup on the input as the internals switch - and a risetime this slow is likely to have a high source impedance, so that hiccup will have a decent chance of doing harm. (Of course, extreme care is needed in probing stuff like this - short grounds on the scope probes (or active probes, if you've got them), or you're going to be seeing things that aren't real, and they're hell to fix!
Even _with_ a Schmitt stage, I'd be very wary about using a signal this slow and seemingly high impedance as a clock - it's going to be terribly susceptible to EMI.

Ah, looking at your trace - is this a rotary encoder? If so, do you get a choice of pullup resistor? Is it as small as it can be, for maximum edge speed and minimum noise?

yes! the input is rotary encoder with rc filter to debounce, 10k+10k+0.1uF
It would be great if someone have top level equipment and spare time can help to test the cause of this LVC problem

I remember I tested three type of LVC flip flop on a PCB which have solid ground plane, including SOIC 14(LVC74), TSSOP8(1G79), SOT-5(2G74),
but I just found the TI 2G74/LVC74 datasheet is not shown as Schmitt-trigger but NXP do shown...
TI and NXP 1G79 datasheet is also not shown as Schmitt-trigger
The NXP LVC74 should already be tested, but the chip is not directly from nxp official reseller
I will try to get some NXP 2G74/LVC74 from RS directly to test again or back to use HC74. It is very expensive to get a 4 channel 300Mhz+ scope with differential/active probe to test 1ns ground bounce if it's exist.

[Precipice]

yes! the input is rotary encoder with rc filter to debounce, 10k+10k+0.1uF

0.1uF is huge!  (for this application)
See how you get on with 1nF.
Is the encoder a long way from the logic?

Unless you have a suitable oscilloscope lying around, I wouldn't worry about it, you'll only end up chasing things that aren't real.

David - "If a pullup is being used then inverting the logic could solve the problem.  Then the slow edge could be the untriggered edge."
I'm either confused or not convinced. That slow edge will come along at some point, and is still going to look like multiple edges (possibly).

[David Hess]

David - "If a pullup is being used then inverting the logic could solve the problem.  Then the slow edge could be the untriggered edge."
I'm either confused or not convinced. That slow edge will come along at some point, and is still going to look like multiple edges (possibly).

If the slow edge is not the trigger edge, then ground bounce will not occur or will be a lot less serious because the output state of the flip-flop will not change.  Noise on a slow transition may still be a problem.

[Precipice]

Ah, yes. If ground bounce on a state change is the culprit, that makes sense, thanks.

(Also, thinking about it, if OP's doing an encoder 'properly', he should be immune to all this, since it's just a (slightly annoying) case of rocking back and forth across a single encoder edge - the decoder, whatever it is, shouldn't count that as a succession of pulses, without seeing a transition on the other channel...)

[T3sl4co1l]

What bizarre motivation would ever bring you to choose a 100MHz+ part for ~10s Hz clocking?  Use a freaking CD4013, geez.  And sharpen those clock edges anyway.

[CarlG]

What bizarre motivation would ever bring you to choose a 100MHz+ part for ~10s Hz clocking?  Use a freaking CD4013, geez.  And sharpen those clock edges anyway.

WHY use a device that's not AC specified for the supply voltage you're using (=3.3V)?

[T3sl4co1l]

Oh... then it'll still work, though the drive level will be pretty weak.  Who knows, maybe he has a 5V supply anyway.  Otherwise, 74HC, and mind the transition time and bypass.

[diyinhk]

Ah, yes. If ground bounce on a state change is the culprit, that makes sense, thanks.

(Also, thinking about it, if OP's doing an encoder 'properly', he should be immune to all this, since it's just a (slightly annoying) case of rocking back and forth across a single encoder edge - the decoder, whatever it is, shouldn't count that as a succession of pulses, without seeing a transition on the other channel...)

I am waiting for varies 74XXX74 from mouser to test, and I am also looking to get a signal generator can output 2 triangle wave 90degree out of phase with 1 to 10MHz to test the negative edge trigger threshold frequency, in the mean time, until the cause of problem is clear, I would avoid LVC logic in all other circuit as well

[rob77]

just a stupid question... are you using both flip-flops in the package ? if not , is the second unused one pulled down ?