When you reduce the output voltage, that 2200 ufd capacitor holds the voltage up and there is no circuitry that will discharge it.
Issues I can see:
The output will remain at the last max voltage because there is no discharge path for C5/C6. Simple solution is to use a smaller value and a bleed resistor. 2200u is probably larger than needed anyway.
Ah i see, i removed the cap and it work, that's really small problem.
And i think it will not really affecting the overall performance of the power supply if i removed em.
Your reference voltage to POT2 seems to be fed from an unregulated rail. That will not only mean varying output but it will also inject all kinds of hum and noise. The way to avoid this is to give IC1C a gain of (say) 2, and use a zener or voltage reference IC giving half Vcc on the pot.
Yep, after some measuring, my transformator voltage are dropped from 18V to 17V at 1A, so it will mess up the reference voltage of POT2, probably i will use some reference voltage IC to make it more stable rather than zener or use the +5V rail instead?.
emm, did my transformator voltage drop are normal?, i mean, it dropped 1V on 1A load, even the VCC dropped from 25V to 20V!
this is my first time dealing with linear transformator by the way, so i don't really know what's happening, because i bought it 6$ from random store that i never visited before.
Your current limiting is likely to be too slow (4.7ms time constant from R10/C1) to prevent destruction of the series pass transistor if the output is shorted. Since this is also in the voltage f/b loop it could also cause damaging voltage overshoots on load reduction.
cause voltage overshoot?
But this is what Tron9000 (guy from hackaday who created this project) suggest, according to his investigation, adding cap in there will reduce the overshoot voltage and some damping in the voltage amp feedback.
But i actually did'nt really understand what's the overall effect to the performance.
And he added 10mA regulation current on the output, which i don't add it to my circuit.
I would be inclined to use a simpler arrangement, measuring current in the -ve rail so no level translation needed, and a single opamp driving T1 directly.
Measuring the current in the emittor section?, did'nt that will do the same thing as measuring on high-side or as i did?,
I don't understand about "no level translation needed",
Did'nt i already use only single op-amp to drive T1?, or what you mean is to use another IC?