The R-2R ladder would likely be the MS bits and the PWM fed through the LSb. You obviously understand how the R-2R works. If we have the LSb high, then it contributes 1/64 Vref to the output. If the LSb is low, then it doesn't. If we have the LSb high for 50% of the time and low the remainder, then it contributes 1/64*0.50, which is the same as having an additional bit below the LSb high. If the LSb is high for 25% of the time, then it contributes 1/64*0.25, which is the same another extra bit - i.e. two additional bits below the LSb, with the lowest one high.
Following this for 75% high time, the two additional bits would be '11', or 62.5% high time gives '101' (all below the LSb), etc.