Author Topic: R5F212L4SNFP clock settings register  (Read 1001 times)

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Offline Vindhyachal.taknikiTopic starter

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R5F212L4SNFP clock settings register
« on: August 17, 2016, 07:40:48 am »
1. I have written code for using on chip high speed oscillator for R5F212L4SNFP MCU for maximum 20Mhz speed.
Is below settings & sequence ok?

2. How many nop to be added to get clock stable. currently I have added 4.

Code: [Select]
void set_system_clock(void)
{     
/* Interrupt disable */   
asm("FCLR I");                           

/* Protect off */   
    prc0 = 1;     
   
/* cpu settings */                                 
    cm02 = 0; /* Peripheral function clock does not stop in wait mode */
    cm05 = 1; /* XIN clock stops */
    cm06 = 0; /* CM16, CM17 enabled */
   
    cm10 = 0; /* Clock operates */
    cm11 = 1; /* On-chip feedback resistor disabled */
    cm13 = 0; /* Input ports P4_6, P4_7 */
    cm14 = 0; /* Low -speed on-chip oscillator on */
    cm15 = 1; /* XIN-XOUT drive capacity high */
    cm16 = 0; /* System clock division select bits; no division */
    cm17 = 0; /* System clock division select bits; no division */
   
    ocd0 = 0; /* Oscillation stop detection function disabled */
    ocd1 = 0; /* Oscillation stop detection interrupt disable */
    ocd2 = 1; /* Selects on-chip oscillator clock */
    ocd3 = 1; /* XIN clock stops */
   
    fra00 = 1; /* High-speed on-chip oscillator on */
    fra01 = 1; /* Selects high-speed on-chip oscillator */
   
    fra20 = 0; /* High-speed on-chip oscillator frequency sw itching bits, Divide-by-2 mode */
    fra21 = 0; /* High-speed on-chip oscillator frequency sw itching bits, Divide-by-2 mode */
    fra22 = 0; /* High-speed on-chip oscillator frequency sw itching bits, Divide-by-2 mode */   

/* let clock get stable */
    asm ( "nop" ); 
    asm ( "nop" );
    asm ( "nop" );
    asm ( "nop" );

/* Protect on */
prc0 = 0;                               

/* Interrupt enabled */       
asm("FSET I");                
 
} /* functin ends here */ 

 


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