Author Topic: Ram & flash check operation - cortex m3  (Read 1231 times)

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Offline Vindhyachal.taknikiTopic starter

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Ram & flash check operation - cortex m3
« on: December 21, 2014, 03:59:08 pm »
Is there any need to do memory check in MCU before beginning operation?
I had read on new MCU its not needed?
is there any example code specific to cortex-m3?
 

Offline Jeroen3

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Re: Ram & flash check operation - cortex m3
« Reply #1 on: December 21, 2014, 08:29:39 pm »
There is no specific need to compare the flash contents to a checksum in normal applications.
However, if you don't check it, you cannot assume the contents are correct after years of operations.

Sram checksums are almost only used in automotive or high security/reliability applications. And this is usually done by the hardware itself.
You can run a check to scan the sram for problems, but I've never heard of bad sram in micro's.
SRAM and Flash are vulnerable to high energy emi pulses and ionizing radiation. Which are relatively rare apart from ESD, lightning and nuclear detonations.

Anyway, flash checking is easy because ARM uses a single address space, you can just use a for loop.  :-+
If you have a CRC perihperal, use it. Otherwise you might want to simplify the checksum by reducing it to an exclusive-or operation to save time.
The only obstacle is getting the valid checksum into the binary image. You can either use the toolchain or your own tool to insert this.
Or you reserve a flash page, have the linker fill this with a predefined pattern to state "empty", and write the checksum on the first time it is calculated and the flash page is empty.
This will be soon after the programmer flashed and verified the binary, leaving little chance for data corruption.
Assuming your chip support support self-programming.

Only after you've compared it against the checksum you are allowed to say something about the correctness of the flash image. The percentage depends on the algorithm used.
« Last Edit: December 21, 2014, 08:32:29 pm by Jeroen3 »
 


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