Replace 64Kx16bits ROM by 2 64kx8bits Flash; good idea?

[terriea]

Hi Folks,

I have a project in mind, but as I know nothing about Flash i'd like to have some input on this. Just warn me if i'm about to do something completely stupid

I have an Old video game console with the BIOS burned in a 64Kx16bits ROM chip (TCS31024P-15). An I'd like be able to replace it with somthing I can re-write very often for development purpose. First step is to replace the chip by a socket, but then I have to find a replacement for the ROM I can fit in it. It seems pretty hard to get hands on EEPROM that fits this particular footprint and specifications nowadays. You can find some OTP EEPROMs that fits, but I need to be able to re-write the chip.
I though of replacing the ROM with a Flash chip. But again seems pretty difficult to find a perfect fit. This old packaging is no more used for recent flash memories. So I was planning on creating a small PCB with pin holes that fits the ROM footprint, and put two 64Kx8bit flash chips on it. These kind of flash chips seems pretty easy to get, and package would fit inside the PCB/ROM footprint.

My main concern is the layout of the board itself. I have to connect the address/data pins of the Flash chips to the corresponding ROM pinout. The ROM pinout is flat, all address bits are following each other in order; but the Flash pinouts is more funky. If I try to link each address/data pin of the Flash to the exact corresponding one in the ROM it won't be possible. But I think it's possible if I just focus on linking data to data, and addess to addess without regard of the numbering. I think the imporant thing for the memory it that when you put some data D at address A, you just want to get the same data at the same address. No bit deal if the address/data bits are scrambled in the process as long as from the outside you get the same thing. The main consequence is that addressing a linear portion of the memory from the ROM's point of view won't access an actual linear memory in the Flashes. As this is a parallel address/random access memory, and that the Flash is already faster than the old chip (70 or 90ns access time VS 120ns) it should be OK. Well at last that's what I think.

Does that seem a good idea, or is that completely stupid?

Thanks for the input.

[mikeselectricstuff]

Yes you can scramble address/data lines foreasier PCB layout but remember that parallel flash uses certain sequences (can't remember if on address or data pr both) during the programming process, so these would need to be adjusted accordingly.
 

[terriea]

Thanks for the quick reply!

I'll check in more detail the datasheet of the flash I want to use for these writing sequence requierment.

I guess i'll have to scramble the pin connections with the programmer to give it a flat address access to the on board flash, and scramble the data before feeding it to the programmer to get the data appearing flat to the console.

Quite a mess, but I think I can handle that

Thanks again.