Simple cheap 1Hz Oscillator - low accuracy fine

[mathsquid]

What about using a flashing LED as the signal source?

I can't tell if you're making a joke or if I'm missing the point. If the latter, could you elaborate?

Sorry about that. I wasn't very clear with my explanation.  Get a blinking LED, like the one in the picture I attached.  Put a resistor on the low side and put your probe between the resistor and LED.  You're stuck with the frequency and duty cycle of the LED, but it's a pulse generator with two components.

[Benta]

Sorry about that. I wasn't very clear with my explanation.  Get a blinking LED, like the one in the picture I attached.  Put a resistor on the low side and put your probe between the resistor and LED.  You're stuck with the frequency and duty cycle of the LED, but it's a pulse generator with two components.

Right... so with the LED and the resistor and a supply of 3.3 V, there's a signal of perhaps 0.5 V_PP (best/optimistic case)? Not really useful, in my opinion.

[mathsquid]

Sorry about that. I wasn't very clear with my explanation.  Get a blinking LED, like the one in the picture I attached.  Put a resistor on the low side and put your probe between the resistor and LED.  You're stuck with the frequency and duty cycle of the LED, but it's a pulse generator with two components.

Right... so with the LED and the resistor and a supply of 3.3 V, there's a signal of perhaps 0.5 V_PP (best/optimistic case)? Not really useful, in my opinion.

I used a 5V power supply and a 1K resistor and get a V_{pp} around 3V.

[GarthyD]

Assume C=5pF (one gate load, quite probably an underestimate), V=3V (might be 5), t = dt = 1ns (reasonable for a tp=7.5ns), L=50nH (2" of wire) in the ground lead.

Then the current spike from switching one output is around 3*5e-12/1e-9 = 15mA.
Then the voltage induced in the ground lead is 50e-9*15e-3/1e-9 = 0.75V.
So, can your circuit tolerate 0.75V spikes on the inputs, or will they cause internal logic to change state?

Don't forget that if you have more than one output changing in the same direction simultaneously, the spikes will be proportionately larger.

Thankyou for the additional detail. Some of these concepts are still a little hard for me to follow, but stepping through it as you have makes it easier to understand.

W.r.t. decoupling, ensure you have the right kinds of capacitor and that the leads are short and wide. Failure here will reduce the CPLD's PSU voltage, possibly causing internal state corruption.

Thanks. I do the best I can on a breadboard (as described). On a PCB I keep them nice and close to the IC in question, practically adjacent where possible.

Ok, cool.

Cheers for being fine with my rapid and minimal response yesterday. I had run out of time but I did still want to provide an answer to your questions. The slightly longer answer is: All of the buttons are connected to one pin CPLD each and can be read directly by the CPLD. I've got spare LEs, a handful of bits of storage, and some pins. Each resource I use takes away from something else I can do, but they are available. An all-buttons AND-gate is very, very cheap compared to what I was expecting.

So, the MAX V (in 3.3V LVTTL) needs at least 1.7V to register an IO pin as high. If you can get a pin on the CPLD to go high when all buttons are pressed, all we need is some external analog circuitry that takes (about) a second to rise from 0 to 1.7V.

This sounds a lot like an RC filter to me, and would be _a lot_ cheaper than using 555s or other chips.

Thanks for this.

There is a lot of appeal in your solution. Downsides I can see are:

- It'll take time to discharge enough to release the reset. But maybe this won't be too long, and besides, this is an emergency reset, it shouldn't happen too often.

- The desire for a 1Hz clock was to let it count a few ticks to make it take a few seconds to activate. I'd need a resistor/capacitor combo that would cover a few seconds. I'm worried I might run into similar signal integrity problems similarly to the other solutions I've used, and until I have an oscilloscope, I'm blind.

- It would dedicate one or two pins to just this solution (one pin if the output was to an NMOS that grounded the reset line). As there would now be no clock, I can't use it to solve other problems. But then again, maybe I'm better off just sticking with a specific solution. Once the MCU is up it is going to be a better candidate for clock-related tasks. Something to consider.

Many thanks for your thoughts on this.

Now, there is a slight downside to this approach. There's no "reset" of the charge in the capacitor, so if the user presses the keys for 0.5s, lets go of them for a very short time, and then press them again for 0.5s, it would count as a "1"/reset.
( It does discharge/reset though, but it takes a second or two before all the energy in the capacitor has drained )

This did initially help turn me away from this approach, but thinking about it it's *probably* not a big deal.

Maybe I can tweak the parameters a little by including a parallel resistor across the cap? If I'm guessing correctly, this would slow the charge, reduce the maximum voltage, but speed the cap discharge when not in use. I did something similar with a 1-pin hardware version solution, but I did also run into timing issues that changed day-by-day, so I'm not sure if it is a good idea.

74HC4060 oscillator/divider. The RC oscillator is two resistors and a cap. Set the oscillator frequency to 16 kHz and you'll have manageable (and cheap) component values. Runs fine at 3.3 V, consumes almost no current and costs a few cents.

Thanks. evb149 made a similar suggestion. I'm guessing the basic idea is that it is driven by a less troublesome oscillator, and I'd just take the appropriate line (probably the highest counter bit) as the signal.

Sorry about that. I wasn't very clear with my explanation.  Get a blinking LED, like the one in the picture I attached.  Put a resistor on the low side and put your probe between the resistor and LED.  You're stuck with the frequency and duty cycle of the LED, but it's a pulse generator with two components.

Thankyou. I'm not sure this is something I will be able to use in my solution for a number of reasons, but I appreciate the creative suggestion.

....

Thankyou everyone for all of your suggestions and detail and the wealth of knowledge shared. I now have plenty of options, and my main limitations at this stage are: (i) lack of oscilloscope to properly evaluate and diagnose; (ii) concerns on the value of the feature when considered in isolation; (iii) lack of some of the mentioned components; and (iv) external factors that are not yet resolved that might make certain solutions more appealing than others due to the additional benefits of the specific solution.

At this point I am going to move on to other parts of the design that feed into this, and see what I can do about an oscilloscope and the missing parts. There should be no shortage of options when I am better placed to make this decision, thanks to all of the input in this thread.

[Old Don]

How about a cheap as chips Chinese watch module - one pulse per second/1Hz for the second hand?

An interesting idea. If there was a part from a reputable manufacturer that I could purchase, yes. Otherwise, definitely not. Low accuracy is fine, low reliability is not.

Movements are quartz tuned and work fine for a long time plus are dirt cheap. But here's a link to someone else's take on this:

http://sound.whsites.net/clocks/timebase.html

plus

https://www.google.com/search?q=using+a+quartz+watch+movement+circuit+board+for+electrical+output&tbm=isch&tbo=u&source=univ&sa=X&ved=0ahUKEwi4lIvIx5PWAhUj2oMKHREsCBMQ7AkIPA&biw=1536&bih=740

[grifftech]

CRAZY IDEA use a motor that spins at 60 rpm and put a cam on the shaft to activate a switch   

[KMoffett]

I use the guts of 1.5v wall/desk clocks. The two outputs for the coil can be diode-ANDed for 1Hz, 30mS pulses.

Ken

[GarthyD]

CRAZY IDEA use a motor that spins at 60 rpm and put a cam on the shaft to activate a switch   

Perhaps I could use a sturdy cable attached to an airplane wound around a suitably large wheel(*), with a small protruding board that flicks a switch on each cycle, with a rubber-band that snaps the switch back in place each time. But selecting the right components would be important, and I just don't know enough about rubber-bands.

(*) - Approximately 80m diameter.

I use the guts of 1.5v wall/desk clocks. The two outputs for the coil can be diode-ANDed for 1Hz, 30mS pulses.

Movements are quartz tuned and work fine for a long time plus are dirt cheap. But here's a link to someone else's take on this:

The teardown and use of the unidentified clock ICs is interesting and clever. It will not be a suitable solution to my specific problem though. Perhaps if the parts used were identifiable and readily available from a reputable supplier it could present an excellent solution.

[Ian.M]

While ridiculous and impractical 'solutions' are on the table what about a bimetallic flasher bulb driving the base of a power transistor?   

[GarthyD]

While ridiculous and impractical 'solutions' are on the table what about a bimetallic flasher bulb driving the base of a power transistor?   

I have no-one to blame but myself for derailing my own thread.

[tpowell1830]

Many good suggestions for you to sort through.

I bought this scope on Bangood and I am well impressed. Will work well enough for you to see your signal for $69 US.

https://www.banggood.com/search/dso112a-upgrade-version-2mhz-touch-screen-tft-digital-mini-handheld.html

[jh15]

Peaceful zen or other psycho mantra thing. Bi.

[GarthyD]

I bought this scope on Bangood and I am well impressed. Will work well enough for you to see your signal for $69 US.

https://www.banggood.com/search/dso112a-upgrade-version-2mhz-touch-screen-tft-digital-mini-handheld.html

Thanks for the starting point. I've some learning to do about oscilloscopes and then hopefully I can at least make a basic purchase.

Peaceful zen or other psycho mantra thing. Bi.

That contest has some very interesting entries.

...

Okay, I've implemented a temporary solution- *perhaps* permanent, depending on the rest of the design.

For the time being I've gone with a highly problem-specific solution. Based on logic on the CPLD (eg. all buttons being pressed), a single pin (SLRST) is used to output a slow reset signal. That signal charges a cap connected to the gate of an NMOS. The drain is connected to an active-low reset line which goes to the rest of the circuit (via ENRST), including the CPLD. A pulldown speeds discharging, slows charging, and lowers the voltage it charges to. It presently looks like this:



Note that the reset line (which ENRST leads to) has a pullup on it already.

The advantages are that it is dirt-cheap, requires only one CPLD pin, a tiny amount of CPLD logic, and I can change the trigger condition later if I choose.

The disadvantages are numerous, including: a variable reset time, a poor understanding of operation involving very large resistances, some uncertainty over the NMOS behaviour during the slow voltage rise, a reset signal that transitions between high and low a bit more slowly than I'd like, and that no actual clock is generated by the solution.

Whilst I don't get a clock with this solution, it is enough to make sure that the attached MCU can be reset, and then the MCU can provide a clock with whatever characteristics I need to to the CPLD directly.

Depending on the needs of the rest of the design I might move to another solution, or perhaps tweak this one a bit. Thanks to all of the input in this thread I have no shortage of options.

[tggzzz]

.. it is enough to make sure that the attached MCU can be reset

But is it?

Personally I'd replace the FET with a schmitt-trigger input logic gate, e.g. a 74*14, where * can be almost anything including 74*1g14. That will circumvent some of the problems you mention.

[GarthyD]

.. it is enough to make sure that the attached MCU can be reset

But is it?

There is definitely some uncertainty in the solution. I'm not thrilled about the idea of a slowly changing voltage on a reset line- even if the MOSFET speeds it up considerably from what is happening on the gate. Everything else on the reset line tends to change its state fairly quickly.

Personally I'd replace the FET with a schmitt-trigger input logic gate, e.g. a 74*14, where * can be almost anything including 74*1g14. That will circumvent some of the problems you mention.

Thanks for the suggestion. I was thinking it might become necessary to do something like this. Unfortunately it starts to push the cost into the territory of the clock-based solutions.

I'll have to give this some further thought.

[tggzzz]

Personally I'd replace the FET with a schmitt-trigger input logic gate, e.g. a 74*14, where * can be almost anything including 74*1g14. That will circumvent some of the problems you mention.

Thanks for the suggestion. I was thinking it might become necessary to do something like this. Unfortunately it starts to push the cost into the territory of the clock-based solutions.

I'll have to give this some further thought.

£0.20 for 5 down to £0.03 in larger quantities, e.g. http://uk.farnell.com/fairchild-semiconductor/nc7s14p5x/ic-nc7s-smd/dp/1467334

Don't forget the cost of subtle malfunctions discovered after shipping.

[IanMacdonald]

The 74HC14 circuit also has that issue too. The solution is to use two capacitors, to both supply rails.


LTSpice simulation

The two caps idea is neat, however aren't the two resistors going to form a potential divider such that the trig/thrs voltage can only be pulled down to about 1/3 Vcc? Since the internal schmitt resets at about that voltage it's going to be marginal as to whether it does, or not. If you take your feedback from OUT you don't have that issue.

If you're worried about output loading affecting the frequency that way,  use DIS as an open collector output instead of OUT. Call it a role reversal if you like.

[cdev]

many GPS modules now are under $10 or - my most recent one was ~$6 and came in a form factor that would require almost no additional parts.

Typically they offer two outputs, a 1 pulse per second output that could in some cases (ublox) be adjusted to supply 50% duty cycle.. so thats a precise 1 hz square wave with the rising edge lockable to the beginning of the UTC second if desired. Many GPSs also offer a 0.5 PPS signal when various conditions apply, basically the point where the signal crosses zero is usually officially free running but usually coincides with either GPS time or the UTC second. (both are extremely close, certainly close enough for your application)

You can in many cases tell them to deliver one of these signals all of the time and try to discipline it to the GPS signal as closely as possible. It sounds as if a simple wire antenna would likely be fine for this. They will do that and do it exceedingly well. I bet it would be possible to figure out a way to make this pulse independent of actual GPSs input except very occasionally if thats what you desire and you find and pick the appropriate combination of settings.

You may see it as overkill but the fact is, silicon chip's savings has produced the ideal 1 Hz oscillator solution - its cheap because of mass production. Take advantage of it if its not likely to cause some problem (it may it depends on a lot of things) But if it doesnt you then get accuracy "for free" that you couldn't even begin to dream about before.

[mikeselectricstuff]

CD4060 oscillator/counter

[Zero999]

The 74HC14 circuit also has that issue too. The solution is to use two capacitors, to both supply rails.


LTSpice simulation

The two caps idea is neat, however aren't the two resistors going to form a potential divider such that the trig/thrs voltage can only be pulled down to about 1/3 Vcc? Since the internal schmitt resets at about that voltage it's going to be marginal as to whether it does, or not. If you take your feedback from OUT you don't have that issue.

If you're worried about output loading affecting the frequency that way,  use DIS as an open collector output instead of OUT. Call it a role reversal if you like.

It pulls it down to 0.297Vcc, which is below the ¹/₃Vcc specified. It may be marginal. I haven't checked the data sheet. The resistor in series with the discharge pin wasn't my idea. I found it on another site, but can't remember. I'm normally good with siting references. Sorry, I let myself down on this occasion.

Taking the feedback from the output will only work with the CMOS 555 variants. It's no good with the bipolar parts.

[GarthyD]

Thanks for the suggestion. I was thinking it might become necessary to do something like this. Unfortunately it starts to push the cost into the territory of the clock-based solutions.

I'll have to give this some further thought.

£0.20 for 5 down to £0.03 in larger quantities, e.g. http://uk.farnell.com/fairchild-semiconductor/nc7s14p5x/ic-nc7s-smd/dp/1467334

A number of Schmitt trigger inverters do seem to drop in price a fair bit more than you'd normally expect in larger quantities. I hadn't noticed that.

Some things I will have to consider:

- Component cost is directly comparable to a Schmitt trigger oscillator, no matter the price of the IC.

- Cost is getting close to the other solutions.

- I'll need an open-drain output for the reset line. It is shared and multiple devices can trigger. Although I did  notice a few Schmitt trigger inverters do have open-drain outputs.

- There is the possibility of pinching a pin from the CPLD to provide the Schmitt trigger, but I may well run into similar problems to those that occurred when I tried to use it as part of a Schmitt trigger oscillator.

Don't forget the cost of subtle malfunctions discovered after shipping.

Yeah.

CD4060 oscillator/counter

A popular suggestion in this thread.

[tggzzz]

- I'll need an open-drain output for the reset line. It is shared and multiple devices can trigger. Although I did  notice a few Schmitt trigger inverters do have open-drain outputs.

A series diode can emulate open drain behaviour.

Ensure circuit behaves well with a slow rising edge on the /reset signal, determined by RC time constants.

[Zero999]

- I'll need an open-drain output for the reset line. It is shared and multiple devices can trigger. Although I did  notice a few Schmitt trigger inverters do have open-drain outputs.

A series diode can emulate open drain behaviour.

Ensure circuit behaves well with a slow rising edge on the /reset signal, determined by RC time constants.

You beat me to it. I'd recommend a Schottky diode, such as the BAT54, as the voltage drop will be much lower, than a silicon diode (around 300mV, rather than 600mV at 1mA), which will make the low logic level more reliable.

[GarthyD]

- I'll need an open-drain output for the reset line. It is shared and multiple devices can trigger. Although I did  notice a few Schmitt trigger inverters do have open-drain outputs.

A series diode can emulate open drain behaviour.

Cheers, yes, that's quite true. I should have mentioned this. I even have one already on the exact same reset line to cover for software that thinks "open-drain" means "feel free to output high when you're done".

Ensure circuit behaves well with a slow rising edge on the /reset signal, determined by RC time constants.

With respect to the temporary solution I am using at the moment, or that the reset line itself is open drain and pulled up and will take time to rise? For the former, I think I'm about to admit defeat on that solution being anything but temporary.

You beat me to it. I'd recommend a Schottky diode, such as the BAT54, as the voltage drop will be much lower, than a silicon diode (around 300mV, rather than 600mV at 1mA), which will make the low logic level more reliable.

Cheers. I'm using a Schottky for my current workaround for that reason.

[daddylonglegs]

  Could you not use an external divider to divide the CPLD's clock down most of the way? A pair of SN74HC4020s for example? With a 1Hz clock you then need to trigger a reset pulse of the appropriate length.