Author Topic: [SOLVED] simulating multiple times the same circuit yelds different results  (Read 1278 times)

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Offline not1xor1Topic starter

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Hi, I installed a couple of weeks ago LTspice on linux (kubuntu 14.04 + wine 1.6)

in order to compare the efficiency of a linear power supply vs. linear power supply + mosfet pre-regolator I drew the circuit below

today I noticed that each time I run a simulation (now I just realized it happens with any kind of circuit) I get a slightly different result about the power generated by the "independent voltage generator" (50Hz sine wave) and, of course, of the dependent variables

is this my fault or a because of a stocastic factor added by design in the simulation?

thanks

p.s. I forgot to mention that .meas statements are already embedded in the asc file so you just need to read the simulation log for the results (Ctrl+L)

---------------------------------------------
The problem has been solved
it was probably due to a bug in a library shared with wine 1.6

in the unlikely case might be of help to somebody else:

after realizing that the executable installed in a virtual machine (xubuntu 16.04 in virtualbox) worked as expected, I wiped completely the current wine installation and hidden .wine dir
reinstalling wine 1.6 did not solve the problem, but I had more luck with wine 1.8 and now can go on with virtually destroying electronic components in the simulator  ;D
« Last Edit: December 19, 2016, 01:50:58 pm by not1xor1 »
 

Offline danadak

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Re: simulating multiple times the same circuit yelds different results
« Reply #1 on: December 19, 2016, 11:10:48 am »
I see output oscillating, couple that with finite machine arithmetic, algorithims,
it will sim differently each time.

How are you planning on load sharing to make sure one or more parts do not
go into thermal shutdown carrying too much load ?


Regards, Dana.
Love Cypress PSOC, ATTiny, Bit Slice, OpAmps, Oscilloscopes, and Analog Gurus like Pease, Miller, Widlar, Dobkin, obsessed with being an engineer
 

Offline not1xor1Topic starter

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Re: simulating multiple times the same circuit yelds different results
« Reply #2 on: December 19, 2016, 01:44:47 pm »
I see output oscillating, couple that with finite machine arithmetic, algorithims,
it will sim differently each time.

How are you planning on load sharing to make sure one or more parts do not
go into thermal shutdown carrying too much load ?


Regards, Dana.

I solved the problem (I'll add more details in my original post)
now I get consistent results

Anyway, I do not see any oscillations but just output ripple

in the attachment below please compare the rectifier bridge output (a couple of volt peak-peak) with the linear regulator output (just few millivolts of ripple - Radj set to 5.06k e .step commented)
Are you referring to that ripple?

In any case please notice that this circuit is to be used just in simulations to check the power saved by inserting a wave-clipping pre-regulator, I never planned to build it
for that reason I did not mind about balance resistors at the IC outputs

thanks
 


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