Nothing. It's often done in low noise applications. Some people boggle how spectrum analyzers can possibly even be built with digital circuitry and switching supplies in the same enclosure; these people don't know about filtering and shielding.
What you want to avoid is having a lot of poles (and therefore a lot of delay) in the control bandwidth. What's usually done is taking AC feedback from early in the filter, so that the loop is compensated for a stable output to that node. The subsequent filter is designed to have minimal impact on the transient response (i.e., for a maximum overshoot of dV at a load step of dI, the filter is designed for a low Q and an impedance of dV/dI).
The DC feedback can be taken at the end of the filter, to provide more accurate DC regulation, or as long as the inductors have low enough DCR (so that Imax * DCR and overshoot dV doesn't blow the Vout(min) limit for the supply design).
Or, if the fundamental ripple is tolerable (as may be the case for analog circuits, where PSRR is good at lower frequencies), then an EMI filter can be added, with a much higher cutoff frequency. Being above the loop cutoff frequency, it has little impact on stability, while filtering the crunchy MHz stuff.
Common mode filtering, or careful design of current loop paths (perhaps including cutting ground planes, but only very carefully), may also be necessary.
Tim