Looking at the datasheet the watchdog can be set between 64ms and 75us.
75us is ~12khz, coincidence? i doubt it
Either your code, or the option bytes, are enabling one of the chips watchdogs and it's not being cleared. It will keep tripping every 75us (or whatever its set to) and pull RESET to ground, then repeat.
Quickest way to confirm is put some watchdog clear commands into main().