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Offline 3n2323

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transistor saturation?
« on: April 02, 2012, 12:02:14 PM »
hi all,

i have some questions on transistor saturation. to make things easier, let's say the context of usage is: small analog signal amplification, common emitter configuration, no emitter resistor, single power supply, where saturation is to be avoided. please see picture attached.

i don't have a good understanding of the essence of transistor saturation, the only thing i know about it is when the collector-base junction is  forward biased, saturation happens, and collector current will stay steadily  low even when base-emitter voltage, which is essentially the input signal, varies. also low collector current will mean the beta will be much smaller than that in active mode.

all that sound to me like mere symptoms instead of the essence of "transistor mechanism", maybe i'm wrong? doesn't saturation mean too much of something? is it that too much collector current will cause too large a voltage drop across RL, and the collector voltage will drop below the base voltage, and when that happens the transistor will go into saturation mode, where the collector current will instantly drop from too large to very small and stay there? when collector voltage drops, beta will make base voltage drop as well, but there is no guarantee R1 will keep base voltage  lower than collector voltage at all times, correct?

a question that goes with such a possibly wrong understanding is that,  how could the base voltage be lower at all times than that of the collector, even with a double rail power supply, if the transistor is biased right, and the output signal swing could potentially go to the lowest value of the power supply, i.e. the collector voltage will go to the lowest value of the power supply?

sorry about such dumb questions, i know i must be missing something. all helps appreciated!
« Last Edit: April 02, 2012, 12:08:41 PM by 3n2323 »
 

Offline vk6zgo

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Re: transistor saturation?
« Reply #1 on: April 02, 2012, 12:54:47 PM »
All "saturation" means in a transistor,is that the device is turned "hard on".
In other words,any further increase in base current,will not cause any further increase in collector current.

No,there is no "flip over" to the opposite state at that point.
We could bias a transistor into saturation & come back in 10 years & it would still be in saturation ( provided that the bias is maintained at the saturation level over that time).

 

Offline Rufus

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Re: transistor saturation?
« Reply #2 on: April 02, 2012, 12:55:24 PM »
Base to emitter current in a transistor allows a larger current to flow from collector to emitter provided there is also sufficient voltage between collector and emitter.

A transistor is saturated when the actual collector to emitter current is less (because of insufficient collector to emitter voltage) than the base to emitter current would otherwise allow.
 

Offline MikeK

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Re: transistor saturation?
« Reply #3 on: April 02, 2012, 01:12:38 PM »
We're studying this in 6.002x.  From the text it looks like the BC junction is biased in the other direction, from base to collector.  That is, it happens when the voltage at the collector is very close the the voltage at the base.  Specifically, when Vce = Vbe - 0.4 (same as Vce = 0.2).

It allows unrestricted current to flow, i.e. the current is not determined by beta (hFE), but by external components such as resistors and such.
 

Offline Rufus

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Re: transistor saturation?
« Reply #4 on: April 02, 2012, 01:34:45 PM »
That is, it happens when the voltage at the collector is very close the the voltage at the base.  Specifically, when Vce = Vbe - 0.4 (same as Vce = 0.2).

You are confusing cause and effect. A transistor with no base current is not saturated regardless of what the collector to emitter voltage is. The collector to emitter voltage of a saturated transistor depends on the base current, collector current and the transistor. Datasheets usually specify it as Vce(sat) at specified base and collector currents.

 

Offline slateraptor

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Re: transistor saturation?
« Reply #5 on: April 02, 2012, 03:10:47 PM »
All "saturation" means in a transistor,is that the device is turned "hard on".

Terminology becomes critical here. When talking about BJT regions of operation, the saturation region is asymptotic to a MOSFET's triode region. A BJT that's "hard on" is operating in the foward-active region aka saturation region for a MOSFET, which is the typical region of operation for most small-signal applications.
 

Offline vk6zgo

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Re: transistor saturation?
« Reply #6 on: April 02, 2012, 08:30:37 PM »
All "saturation" means in a transistor,is that the device is turned "hard on".

Terminology becomes critical here. When talking about BJT regions of operation, the saturation region is asymptotic to a MOSFET's triode region. A BJT that's "hard on" is operating in the foward-active region aka saturation region for a MOSFET, which is the typical region of operation for most small-signal applications.

Sorry,you've lost me on that one!
"Hard on" is a colloquial expression for where any device is biased "on"to the point that the device current cannot be increased by any further change in the bias.(This sounds like a pretty good definition of saturation to me!)
Typical cases are in multivibrator circuits,where the devices go from saturation to cutoff.

 

Offline ejeffrey

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Re: transistor saturation?
« Reply #7 on: April 02, 2012, 09:20:49 PM »
Sorry,you've lost me on that one!

Unfortunately in FET theory, the terminology is confusing and likely backwards from what you are used to.  At low drain-source voltages, a MOSFET acts as a voltage variable resistor controlled by the gate.  For a fixed gate voltage, the current is proportional to the drain voltage.  This is the ohmic region.  If you increase the source voltage, beyond a certain point the current does not increase, and this is called the saturation region.  However, saturation here means that the current cannot be increased by further increasing the *source*, not the gate voltage.

Therefore, when a mosfet is used as a "fully on" switch, it is used in the ohmic region -- and data sheets specify their switching behavior in terms of an on resistance (Rds on).  Confusingly, linear amplifiers are operated with their FETs in the saturation region.

Which only goes to show that you have to be careful and clear when using the word saturation, since there is potential for confusion. 
 

Offline slateraptor

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Re: transistor saturation?
« Reply #8 on: April 02, 2012, 09:26:33 PM »
Sorry,you've lost me on that one!
"Hard on" is a colloquial expression for where any device is biased "on"to the point that the device current cannot be increased by any further change in the bias.(This sounds like a pretty good definition of saturation to me!)
Typical cases are in multivibrator circuits,where the devices go from saturation to cutoff.

Ditto. :P

Am I correct in understanding that what you refer to informally as "hard on" is a biasing condition which results in max DC beta, viz. mathematically, max(IC/IB)?

To be sure, "saturation" used within the context of the OP's description is not "saturation" in the normal sense of its definition.
 

Offline MikeK

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Re: transistor saturation?
« Reply #9 on: April 02, 2012, 11:00:15 PM »
That is, it happens when the voltage at the collector is very close the the voltage at the base.  Specifically, when VCE = VBE - 0.4 (same as Vce = 0.2).

You are confusing cause and effect. A transistor with no base current is not saturated regardless of what the collector to emitter voltage is. The collector to emitter voltage of a saturated transistor depends on the base current, collector current and the transistor. Datasheets usually specify it as Vce(sat) at specified base and collector currents.

Nope, this is straight out of the book.  But IB>0 is also a condition.
 

Offline vk6zgo

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Re: transistor saturation?
« Reply #10 on: April 02, 2012, 11:47:46 PM »
Sorry,you've lost me on that one!
"Hard on" is a colloquial expression for where any device is biased "on"to the point that the device current cannot be increased by any further change in the bias.(This sounds like a pretty good definition of saturation to me!)
Typical cases are in multivibrator circuits,where the devices go from saturation to cutoff.

Ditto. :P

Am I correct in understanding that what you refer to informally as "hard on" is a biasing condition which results in max DC beta, viz. mathematically, max(IC/IB)?

To be sure, "saturation" used within the context of the OP's description is not "saturation" in the normal sense of its definition.
No,almost the opposite:

When a device is turned "hard on",for instance with a vacuum tube,
If the grid voltage is progressively made less negative from cutoff,a point is reached (usually with the grid actually driven positive w.r.t the cathode) where any further increase in the positive direction will not increase the anode current further,due to fundamental limitations of the operation of the device.

For a given supply voltage,it is possible to draw a graph of anode current versus grid voltage,
(a graphical representation of a "transfer function"),which is not a straight line to infinity,but  reaches a point where the curve flattens out,due to this effect.

I used a vacuum tube as an example because to the external circuit,the internal physics of the device do not matter.
The "device" is simply a "black box" having the characteristic described.

In a BJT,the bias is current,but the concept still applies.

The OP has got things a bit confused,but the above is the definition of  saturation of an active device which has been current as long as I have been around.
It doesn't quite match the idea of saturation in an inductor,but that is a very different concept,as an inductor is a 2 terminal device.
 

Offline Rufus

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Re: transistor saturation?
« Reply #11 on: April 03, 2012, 12:02:28 AM »
That is, it happens when the voltage at the collector is very close the the voltage at the base.  Specifically, when VCE = VBE - 0.4 (same as Vce = 0.2).

You are confusing cause and effect. A transistor with no base current is not saturated regardless of what the collector to emitter voltage is. The collector to emitter voltage of a saturated transistor depends on the base current, collector current and the transistor. Datasheets usually specify it as Vce(sat) at specified base and collector currents.

Nope, this is straight out of the book.  But IB>0 is also a condition.

Appeal to authority of a book? Look at a 2N3055 datasheet and see a Vce(sat) of 3v, you are (almost) claiming it isn't saturated because Vce isn't 0.2v.

There may be some confusion between theoretical transistors and real world ones.
 

Offline 3n2323

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Re: transistor saturation?
« Reply #12 on: April 03, 2012, 01:07:06 AM »
could i ask this way every one?

GIVEN:
BJT small analog signal amplification application, setup as per picture.

DEFINITION:
let's just say the definition of saturation is when Ic no longer changes with Vb.

SYMPTOMS:
hard on, small steady collector current, not enough Vce, collector voltage close to base voltage, changed beta, and what not...

QUESTIONS:
1) what mechanism triggers saturation, Vcb, Vce, Ib, Ic, and how?
2) what happens to Ic when a BJT goes into saturation mode from forward active mode? for example, if a BJT is biased correctly with its Q point at 1/2 the supply voltage, it is likely to have a relatively large Ic, because that's what happens when it is amplifyitng. now, say, if the input signal is getting too large, sending the BJT into saturation, (don't know how yet at this point, the actual mechanism is still unclear to me, hope answers to question 1) will clear this one up), will Ic suddenly drop to a rather small constant value, because that's what a BJT does when saturated?

thank you for all the replies guys!
 

Offline MikeK

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Re: transistor saturation?
« Reply #13 on: April 03, 2012, 01:32:46 AM »
There may be some confusion between theoretical transistors and real world ones.

Granted.  My theoretical BJT has a VCE threshold of 0.2V.  You're right, real world devices are varied.

« Last Edit: April 03, 2012, 01:39:39 AM by MikeK »
 

Offline vk6zgo

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Re: transistor saturation?
« Reply #14 on: April 03, 2012, 10:05:35 AM »
could i ask this way every one?

GIVEN:
BJT small analog signal amplification application, setup as per picture.

DEFINITION:
let's just say the definition of saturation is when Ic no longer changes with Vb.

SYMPTOMS:
hard on, small steady collector current, not enough Vce, collector voltage close to base voltage, changed beta, and what not...

QUESTIONS:
1) what mechanism triggers saturation, Vcb, Vce, Ib, Ic, and how?
2) what happens to Ic when a BJT goes into saturation mode from forward active mode? for example, if a BJT is biased correctly with its Q point at 1/2 the supply voltage, it is likely to have a relatively large Ic, because that's what happens when it is amplifyitng. now, say, if the input signal is getting too large, sending the BJT into saturation, (don't know how yet at this point, the actual mechanism is still unclear to me, hope answers to question 1) will clear this one up), will Ic suddenly drop to a rather small constant value, because that's what a BJT does when saturated?

thank you for all the replies guys!

(1)Saturation is not "triggered".
If you increase the value of Ib progressively,the curve of Ib versus Ic will slowly begin to level off,until the same percentage change in Ib which earlier caused a large change in Ic produces a very much smaller change in Ic.
Eventually a point is reached where the increase is so small,you may regard the device as saturated.

Your "symptoms" are in error-the value of Ic is at its maximum at saturation.

Look at your circuit,& imagine the transistor as a variable resistor,which I will call Rq1

Initially,the variable makes up a largish proportion of the series resistance RL+Rq1, & Ie = V/(RL+Rq1).

As you reduce the resistance of Rq1,this proportion becomes progressively less,until,its contribution is so minimal, that we can
say,RL+VRq1 is approximately = RLso Ie approx =V/RL.

Further reduction of Rq1 won't make much difference to Ie.

Saturation in this sense,is affected by the circuit constants,as well as device characteristics.

(2)  If the transistor is biased as per your example& is driven by an AC signal,
If the drive signal's amplitude is great enough,it will drive the transistor into saturation on the positive 1/2 cycle,and to cut off on the negative 1/2 cycle,(assuming an NPN transistor),so the result is a distorted ("clipped") signal at the output .

The classic method of design of amplifiers is to draw a "loadline" on the characteristic curves,with one extremity being the current which would flow through the load with a short circuit in place of the device,& the other extremity being zero current (which would flow with an open circuit in place of the device).

If you have modelling software,you should be able to model the various conditions,or get some real transistors & play around with them! ;D
 

Offline 3n2323

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Re: transistor saturation?
« Reply #15 on: April 04, 2012, 01:41:48 AM »

(1)Saturation is not "triggered".
If you increase the value of Ib progressively,the curve of Ib versus Ic will slowly begin to level off,until the same percentage change in Ib which earlier caused a large change in Ic produces a very much smaller change in Ic.
Eventually a point is reached where the increase is so small,you may regard the device as saturated.

Your "symptoms" are in error-the value of Ic is at its maximum at saturation.

Look at your circuit,& imagine the transistor as a variable resistor,which I will call Rq1

Initially,the variable makes up a largish proportion of the series resistance RL+Rq1, & Ie = V/(RL+Rq1).

As you reduce the resistance of Rq1,this proportion becomes progressively less,until,its contribution is so minimal, that we can
say,RL+VRq1 is approximately = RLso Ie approx =V/RL.

Further reduction of Rq1 won't make much difference to Ie.

Saturation in this sense,is affected by the circuit constants,as well as device characteristics.

(2)  If the transistor is biased as per your example& is driven by an AC signal,
If the drive signal's amplitude is great enough,it will drive the transistor into saturation on the positive 1/2 cycle,and to cut off on the negative 1/2 cycle,(assuming an NPN transistor),so the result is a distorted ("clipped") signal at the output .

The classic method of design of amplifiers is to draw a "loadline" on the characteristic curves,with one extremity being the current which would flow through the load with a short circuit in place of the device,& the other extremity being zero current (which would flow with an open circuit in place of the device).

If you have modelling software,you should be able to model the various conditions,or get some real transistors & play around with them! ;D

i did, i'm trying to understand it now.

to the left of the red line, in the picture, is the saturation region, correct? so saturation is sliding down the shoulder of those curves, and so Vce adn Ic will both get smaller, no matter what Ib is, yeah?
 

Offline vk6zgo

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Re: transistor saturation?
« Reply #16 on: April 04, 2012, 12:51:34 PM »

(1)Saturation is not "triggered".
If you increase the value of Ib progressively,the curve of Ib versus Ic will slowly begin to level off,until the same percentage change in Ib which earlier caused a large change in Ic produces a very much smaller change in Ic.
Eventually a point is reached where the increase is so small,you may regard the device as saturated.

Your "symptoms" are in error-the value of Ic is at its maximum at saturation.

Look at your circuit,& imagine the transistor as a variable resistor,which I will call Rq1

Initially,the variable makes up a largish proportion of the series resistance RL+Rq1, & Ie = V/(RL+Rq1).

As you reduce the resistance of Rq1,this proportion becomes progressively less,until,its contribution is so minimal, that we can
say,RL+VRq1 is approximately = RLso Ie approx =V/RL.

Further reduction of Rq1 won't make much difference to Ie.

Saturation in this sense,is affected by the circuit constants,as well as device characteristics.

(2)  If the transistor is biased as per your example& is driven by an AC signal,
If the drive signal's amplitude is great enough,it will drive the transistor into saturation on the positive 1/2 cycle,and to cut off on the negative 1/2 cycle,(assuming an NPN transistor),so the result is a distorted ("clipped") signal at the output .

The classic method of design of amplifiers is to draw a "loadline" on the characteristic curves,with one extremity being the current which would flow through the load with a short circuit in place of the device,& the other extremity being zero current (which would flow with an open circuit in place of the device).

If you have modelling software,you should be able to model the various conditions,or get some real transistors & play around with them! ;D

i did, i'm trying to understand it now.

to the left of the red line, in the picture, is the saturation region, correct? so saturation is sliding down the shoulder of those curves, and so Vce and Ic will both get smaller, no matter what Ib is, yeah?

No!  Vce in this curve is an independent variable.
What the curve tells you in this region,is that for lower values of Vce you get smaller values of Ic  for a given value of Ib.
If you could zoom to that part of the curve you would see that the value of Ic will still increase with increase in Ib.
Think back to my variable resistor analogy

In a real circuit with a real RL,as you increase Ic,Vce will drop,but it will never drop with a fall in Ic.
The other way to reduce the value of Vce is to decrease the supply voltage.
This is what is done in the test circuit used to derive these curves,so the value of Vce can be set & measured for each instance).

Look instead,at the values at the right hand side of the curve,which correspond to a Vce of 2.0 volts.
You will notice that an increase of  Ib from 0.15 mA to 0.2 mA causes Ic to increase from 40 to 50 mA.(10mA increase in Ic)
Going up from there,you see about the same increase, with each 0.05mA step,until Ib reaches around 0.3mA.
After this point,the increase of Ic for the same step of Ib increase becomes less,until,at the top of the curve,an increase of Ib from  0.45mA to 0.5mA causes  an increase of  about 5mA.
This is  approaching the "saturation region".
The curve does not go far enough to give the point where the Ic change becomes too small to plot,but it exists.

The whole concept of "saturation" in this context is that the change in Ic becomes smaller & smaller with each progressive increase in Ib.
The absolute value of Ic can be,& normally is, large in this condition.
« Last Edit: April 04, 2012, 01:14:44 PM by vk6zgo »
 

Offline vk6zgo

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Re: transistor saturation?
« Reply #17 on: April 04, 2012, 07:06:24 PM »
Sorry,you've lost me on that one!

Unfortunately in FET theory, the terminology is confusing and likely backwards from what you are used to.  At low drain-source voltages, a MOSFET acts as a voltage variable resistor controlled by the gate.  For a fixed gate voltage, the current is proportional to the drain voltage.  This is the ohmic region.  If you increase the source voltage, beyond a certain point the current does not increase, and this is called the saturation region.  However, saturation here means that the current cannot be increased by further increasing the *source*, not the gate voltage.

Therefore, when a mosfet is used as a "fully on" switch, it is used in the ohmic region -- and data sheets specify their switching behavior in terms of an on resistance (Rds on).  Confusingly, linear amplifiers are operated with their FETs in the saturation region.

Which only goes to show that you have to be careful and clear when using the word saturation, since there is potential for confusion.

But wait-There's more! ;D

I was confused  by ejeffery's comments above,so I did a bit of "Googling",& now I understand his as well as slateraptor's points.

In order to be incredibly confusing,FET people decided to use the term "saturation region" for the virtually horizontal part of the Id/ Vd curve,
where an increase in Vd for a given value of Vgs does not cause an appreciable increase in Id.

This is the point where a FET would be biased as a linear amplifier,instead of that point which would normally regarded as "saturation" in BJTs & Tubes,which is where an increase (in the direction biasing the device "on"),of Ib or Vg respectively, does not increase Ic or Ia any further.

Actually.it makes sense in the FET context,but it's a shame they couldn't have found an alternative term.

I vaguely remember seeing this,way back in the "Dreamtime" when I was learning about FETs,& thinking it was a bit confusing,but then I obviously wasn't confused enough to remember it clearly! ;D
The strange thing is,if a FET switch is turned hard on,it is often described as "saturated",just like a BJT,so they aren't even consistent in their inconsistency!
The point to remember is that the FET use of the term is the "odd one out"& the meaning previously described is correct for all other common devices.

 


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