Transistors and FETs, wrapping my head around them

[staze]

First off, let me say that I've read a couple books at this point, and I'm pretty sure I understand most of the basics, but I'm having an issue with something: FET polarity. So, we'll come back to that. First, let me make sure I understand here.

In my mind, using the stereotypical water analogy, a transistor (bipolar) is kind of like a syphon. A signal comes into the base, and continues on through the emitter pulling extra current from the collector. So, if you marked an electron that was coming into the base, you could see it come out of the emitter (I think). I still don't quite fully understand bias, or NPN vs. PNP other than it flips the way the transistor works. I also understand a transistor is current driven. But obviously there needs to be a voltage to drive that current...

A FET, on the other hand, is like a valve. The voltage on the gate controls that valve (and if it's NPN, it's normally off with 0V on the gate, or if PNP, it's on with 0V). And my understanding is when it's on, a current flows from drain to source. Anyway, if you marked an electron on the gate, you'd never see that electron come out of the source, or drain. I also understand FETs are voltage driven.

But I also understand that FETs really aren't polarized, so current can flow both ways, yes? Transistors are polarized, yes? Is this only due to the fact there's a higher voltage on the collector? I know you get avalanche breakdown (which depending on the transistor, this can be destructive or not) when you push the wrong way through a transistor, but I'm not sure that's entirely relevant to the conversation. Which leads to my confusion...

What's the point of having a source and a drain if they're non-polarized? Is it just for signifying what the gate bias is relative to (source or drain)? Anyone have a good reference for any of this? Mnemonic? Anything? If I could get my head around this, I think I'd have an easier time... at this point, I'm just having to look at a schematic, and figure out which way makes the most sense for things to be (like a stereo receiver I'm working on, where the mute function is two transistors that pull the signal down to ground).

Again, please correct me if any of this is wrong... or elaborate if possible.

Thanks!

[c4757p]

It comes from the way they're built. Many JFETs are actually symmetric; the 'source' is just whichever terminal has the lower voltage. In MOSFETs, you have to use one as the source because that one is tied to the substrate node internally, and if you bias the substrate node higher than either end of the channel, it will turn on and conduct current like a diode. Inside integrated circuits, you actually can get symmetric MOSFETs as well - look at how CMOS analog switches are built internally.

BJTs could also in theory be symmetric, but they're doped in an asymmetric way that makes that not work so well. You'll still get a small shred of transistor behavior if you flip it around, though.

[staze]

It comes from the way they're built. Many JFETs are actually symmetric; the 'source' is just whichever terminal has the lower voltage. In MOSFETs, you have to use one as the source because that one is tied to the substrate node internally, and if you bias the substrate node higher than either end of the channel, it will turn on and conduct current like a diode. Inside integrated circuits, you actually can get symmetric MOSFETs as well - look at how CMOS analog switches are built internally.

BJTs could also in theory be symmetric, but they're doped in an asymmetric way that makes that not work so well. You'll still get a small shred of transistor behavior if you flip it around, though.

Okay, the JFET thing makes sense.

The MOSFET thing doesn't. You're saying that the source is tied to the gate (basically) and if you push on the source hard enough, it'll conduct? But once it's conducting (from gate voltage, say), it'll conduct in both directions? So if I had an unmarked FET, is it possible to distinguish which pin is which or just trace things out and figure that a rail voltage is likely the gate, and the lower voltage relative to ground is the source?

Am I right on the whole gate bias/conduction thing WRT NPN vs PNP? Or maybe it's just JFET vs MOSFET (on at 0V vs off at 0V)?  And that voltage at which is conducts is going to be relative to the drain or the source?

So then, can you explain bias on BJTs easily?

Thanks!

[c4757p]

The source is tied to the substrate, not the gate. MOSFETs are four-terminal devices, they just don't give you four pins. And yes, if you put a voltage on the source that is higher than the voltage on the drain by about 0.7V, it will conduct regardless of what the gate is doing. It acts like there are two diodes, one from the substrate to source, and one from substrate to drain. Since the substrate and source are tied together, you have a diode from source to drain.

No, I can't explain bias, it's 2:30 AM where I am! I'm just a short step above attempting to tell you how to bias a banana.

If you have an unmarked MOSFET in TO-220, it's gate, drain, source. 99.999% of TO-220 MOSFETs conform to this. If you have an unmarked TO-92 MOSFET, it costs 5 cents, throw it away and get a marked one. If it's surface-mount, the gate is on the left, source on the right, drain on the top. And in general for "weird" packages (you see them occasionally in surface-mount), the drain is the largest terminal, and then use a multimeter on diode test mode to find the source (diode to drain, as usual).

[amyk]

In my mind, using the stereotypical water analogy, a transistor (bipolar) is kind of like a syphon. A signal comes into the base, and continues on through the emitter pulling extra current from the collector. So, if you marked an electron that was coming into the base, you could see it come out of the emitter (I think). I still don't quite fully understand bias, or NPN vs. PNP other than it flips the way the transistor works. I also understand a transistor is current driven. But obviously there needs to be a voltage to drive that current...

You should sort out conventional vs electron current flow first, or the NPN/PNP distinction will really confuse you. NPN transistor when turned on has electrons entering via the emitter and exiting via the base and collector. (The emitter emits electrons inside the device, the collector collects them.) For PNP, the emitter and collector emit and collect holes.

[jpb]

I have a few random points to make which I hope will help (my background is with Schottky barrier GaAs FETs but I've worked with all sorts of devices).

First, all devices are voltage driven. With a bipolar transistor the collector-emitter current is approximately proportional to the base-emitter current so it behaves as if it were current driven. But the actual mechanism is that the current from the emitter is driven by the base-emitter voltage and the geometry and doping of the device is such that most of the current over-shoots the base and goes out the collector rather than the base. From the point of view of behaviour it is helpful to think of the base current driving the emitter-collector current so most books describe transistors that way. But personally I found that it made me rather confused when I tried to understand the device at a physics level.

FETs are nice simple unipolar devices. Electrons flow from the source to the drain and somewhere in-between there is a region where the flow is restricted by depletion driven by a voltage on the gate. The depletion might arise from a Schottky barrier (reverse-biased diode), from a capacitor like insulated barrier (mosfets) or from another type of junction (j-fets).

From the biasing point of view there are two types of FET, depletion mode FETs and enhancement mode FETs. In depletion mode the channel between source and drain is open (or partially open) even when nothing is applied to the gate. You then apply a negative voltage to the gate to restrict the channel eventually turning the device off. In enhancement mode devices the depletion region blocks the channel even with no voltage applied. You then need to apply a positive voltage to open the channel up. (I say positive voltage because I'm used to Schottky barrier devices where negative voltages deplete the channel - I'm a bit ignorant on jFETs in general but assume there are some where the gate diode is the other way around.)

On the devices I used to work on the source and drain where geometrically at different distances from the gate to improve things like breakdown voltage but apart from that you could swap source and drain electrically.

[staze]

You should sort out conventional vs electron current flow first, or the NPN/PNP distinction will really confuse you. NPN transistor when turned on has electrons entering via the emitter and exiting via the base and collector. (The emitter emits electrons inside the device, the collector collects them.) For PNP, the emitter and collector emit and collect holes.

Okay, you've touched on one of the most annoying things about electronics. I was a Chem major in college (University)... and the whole conventional vs electron current flow is just annoying as well. Anyway...

This might help, but I'm not sure. The holes thing just, ugh. They aren't emitting nuclei. I swear I read that chapter 3 times in a book, and it still didn't make any sense. "Holes" to me implies something that is positively charged, and wants an electron. So great... it's positively charged (or negatively in conventional?). Are those electrons then "leaving" through the...?

[c4757p]

There's an easy way to sort out the current direction:

Are you working in electronics? Then current flows from positive to negative and screw the chemists. Are you working in chemistry? Then current flows from negative to positive and screw the engineers. I doubt you're actually developing semiconductors, which is about the only time you need to work with both.

As for holes: just imagine a grid of spaces that want electrons, and each space can only have one. The spaces are mostly filled, but one is empty - that's a hole. It can be thought of as 'positively charged' relative to the nearby spaces which are negative. And if you pop in an electron at one end, electrons will shuffle in towards the hole and towards the other end, making the hole appear to move in the opposite direction to the electron you just inserted. If you pop out an electron, that can be imagined as equivalent to popping in a hole.

[staze]

First, all devices are voltage driven. With a bipolar transistor the collector-emitter current is approximately proportional to the base-emitter current so it behaves as if it were current driven. But the actual mechanism is that the current from the emitter is driven by the base-emitter voltage and the geometry and doping of the device is such that most of the current over-shoots the base and goes out the collector rather than the base. From the point of view of behaviour it is helpful to think of the base current driving the emitter-collector current so most books describe transistors that way. But personally I found that it made me rather confused when I tried to understand the device at a physics level.

Okay, this helps too... since, well, current doesn't flow without voltage. And the base biasing is really only to set the default (no signal) state of the BJT depending on if it's NPN or PNP?

From the biasing point of view there are two types of FET, depletion mode FETs and enhancement mode FETs. In depletion mode the channel between source and drain is open (or partially open) even when nothing is applied to the gate. You then apply a negative voltage to the gate to restrict the channel eventually turning the device off. In enhancement mode devices the depletion region blocks the channel even with no voltage applied. You then need to apply a positive voltage to open the channel up. (I say positive voltage because I'm used to Schottky barrier devices where negative voltages deplete the channel - I'm a bit ignorant on jFETs in general but assume there are some where the gate diode is the other way around.)

Makes perfect sense! Though I thought in JFET land, a PNP JFET was normally "on" unless you negatively biased the gate, and a NPN JFET is normally "off" unless you positively bias it. But I could be completely off on that. But yes, what you describe is pretty much what I figured.

[c4757p]

All depletion-mode JFETs are normally "on" when the gate and source are equal, and as the gate moves away from the source (negative-bound in N-channel, positive-bound in P-channel), they begin to pinch off. The vast, vast, vast majority of JFETs are depletion-mode. Enhancement would be the opposite.

P-channel, NOT PNP!!!!!!!!! 

[staze]

There's an easy way to sort out the current direction:

Are you working in electronics? Then current flows from positive to negative and screw the chemists. Are you working in chemistry? Then current flows from negative to positive and screw the engineers. I doubt you're actually developing semiconductors, which is about the only time you need to work with both.

As for holes: just imagine a grid of spaces that want electrons, and each space can only have one. The spaces are mostly filled, but one is empty - that's a hole. It can be thought of as 'positively charged' relative to the nearby spaces which are negative. And if you pop in an electron at one end, electrons will shuffle in towards the hole and towards the other end, making the hole appear to move in the opposite direction to the electron you just inserted. If you pop out an electron, that can be imagined as equivalent to popping in a hole.

=) I only meant the rant as a "why the hell didn't they both use the same nomenclature?

Anyway... the hole thing makes sense, but when you pop in that electron, great. You keep popping them in, your holes are going to fill and the unit will stop being a source of holes. Are the electrons exiting somewhere? I guess maybe it would help if I got a good example of what a PNP vs NPN transistor is used for... At least in a stereo amp (push-pull), the NPN is your positive going signal, and your PNP is your negative going signal. I guess, what makes that PNP different than an NPN in reverse?

[staze]

All depletion-mode JFETs are normally "on" when the gate and source are equal, and as the gate moves away from the source (negative-bound in N-channel, positive-bound in P-channel), they begin to pinch off. The vast, vast, vast majority of JFETs are depletion-mode. Enhancement would be the opposite.

P-channel, NOT PNP!!!!!!!!! 

Ah, thanks. I guess yeah, they're not like a BJT where the NPN or PNP describe the layers. And heck, you just got a mnemonic.

So to shut off an N channel JFET, you pull the gate down to like -10V relative to source. Or in a P-channel, +10V. This makes sense. And yeah, don't think I've seen an Enhancement mode one... but assumed...

Now, aren't MOSFETs typically Enhancement mode (e.g. normally "off")?

[c4757p]

Yes.

[madires]

Yes.

Does anyone know some depletion-mode MOSFETs? I'm curious because I haven't found any yet but need some for testing my component tester firmware.

[A Hellene]

[...]
Again, please correct me if any of this is wrong... or elaborate if possible.

Thanks!

I think that some of the links below can keep you occupied for days and days! :-)
Seriously, now, I would initially recommend you to try and get a better grasp of what electricity really is; then, everything else becomes trivial to comprehend.

All the MOSFETs are constructed as four-terminal devices...

You can read more here or, even better, here.

[..]
For anyone interested, please read Vincent's multi-part essay on the transistors, beginning from this post (and going on for pages!); this is one of the best pieces I have ever read on that subject matter.

Additionally, for those (like me), who have a hard time accepting that the BJT is a current-driven device instead of a voltage-driven one, feel free to read William Beaty's fine essay on how do the transistors really work (part 1 and part 2), if not to explore his whole site to read about electricity and lots of common misconceptions.

...and the current drawn by the BE junction is merely a healthy side effect of a forward biased P-N (or N-P) junction, and NOT the primary cause of the transistor conduction.
The V_BE potential (or voltage) is the cause of the retraction of the depletion area which, in turn, allows the I_C current.

_____

Does anyone know some depletion-mode MOSFETs?

There you are, Markus:
IXYS Depletion Mode MOSFET Devices, and Depletion-Mode Power MOSFETs and Applications.


-George

[staze]

Yes.

Does anyone know some depletion-mode MOSFETs? I'm curious because I haven't found any yet but need some for testing my component tester firmware.

Looks like, according to this: http://en.wikipedia.org/wiki/MOSFET#Depletion-mode_MOSFETs the BF960 or BF980. Also found this: http://www.digikey.com/catalog/en/partgroup/n-channel-depletion-mode-fets/16675

So... yes?

[edavid]

Does anyone know some depletion-mode MOSFETs? I'm curious because I haven't found any yet but need some for testing my component tester firmware.

BF998 (dual gate, so an extra challenge)
Supertex LND150 (power)

[free_electron]

IRF has some depletion mode mosfets.
those beast are rare as they are not very practical ...

@staze : i posted several topics on how transistors and fets and mosfets work.

your siphon model is not far off except you have current(electorn current , chemists view) reversed
a fet is more like a rubber tube you squeeze shut. the higher the voltage the harder you squeeze. the tube itself( the channel) is bidirectional

the difference between a mosfet and a jfet ..hmm that analogy is harder. a mosfet is a perfect rubber hose. a jfet is a rubber hose with a hole in it. you squeeze on the hole. as long as you don;t take your finger of the hole nothing squirts out... ( jfets have a diode between channel and gate. this diode is in reverse )

[staze]

I think that some of the links below can keep you occupied for days and days! :-)
Seriously, now, I would initially recommend you to try and get a better grasp of what electricity really is; then, everything else becomes trivial to comprehend.

I do understand electricity... that's really part of the issue, like I said. From a physics standpoint, it's the complete opposite of from an engineering one. =P But that's hyperbole. It's still electron flow, potential, etc.

Anyway, I'll read those posts... hopefully they'll help.

[staze]

@staze : i posted several topics on how transistors and fets and mosfets work.

your siphon model is not far off except you have current(electorn current , chemists view) reversed
a fet is more like a rubber tube you squeeze shut. the higher the voltage the harder you squeeze. the tube itself( the channel) is bidirectional

the difference between a mosfet and a jfet ..hmm that analogy is harder. a mosfet is a perfect rubber hose. a jfet is a rubber hose with a hole in it. you squeeze on the hole. as long as you don;t take your finger of the hole nothing squirts out... ( jfets have a diode between channel and gate. this diode is in reverse )

Cool, I'll take a look. Got any links?

And yeah, the whole emitter/collector, drain/source thing is something I need to beat into my head. Because I guess I think of them coming OUT of the device, not into. Maybe understanding the schematic depictions would help too. =P

So, a JFET, if you don't apply a voltage to the gate, and there's a voltage on the drain/source, you'll get leakage out of the gate?

[free_electron]

only if you lift your finger off ( meaning you make the gate a diode drop 0.6 volts lower (for a P channel ) than the channel voltage , or 0.6 volts higher for an N channel )

the construction of a fet is actually a diode with two sideways contacts. by applying a reverse voltage you push electrons away out of the channel, thus shrinking the channel and reducing conductivity. the electric field pushes the electrons away ( like charges repel .. )

the same happens in a mos but there is no diode there.
i'll scribble a 'davecad' drawing tonight and post it.

[staze]

only if you lift your finger off ( meaning you make the gate a diode drop 0.6 volts lower (for a P channel ) than the channel voltage , or 0.6 volts higher for an N channel )

the construction of a fet is actually a diode with two sideways contacts. by applying a reverse voltage you push electrons away out of the channel, thus shrinking the channel and reducing conductivity. the electric field pushes the electrons away ( like charges repel .. )

the same happens in a mos but there is no diode there.
i'll scribble a 'davecad' drawing tonight and post it.

Actually, that makes perfect sense.

So, then in JFETs, the bias of the gate is relative to EITHER source and/or drain? Or is it all relative to the substrate? And while electrons flow from the source to the drain (so the "body" is like a tub of electrons), conventionally it's the other way around, or have I just tied myself in knots (nots?)? That's really the pain, is reading something like wikipedia, they don't say "this is written from the standpoint of an EE" or "from a physicist". =P

[amyk]

So, then in JFETs, the bias of the gate is relative to EITHER source and/or drain? Or is it all relative to the substrate?

In a JFET the "substrate" is the source and drain... since it's a symmetric device, they're interchangeable.

[Sigmoid]

Hm I think this thread will be perfect for this small transistor-based trivia I'm confused about.

BJTs are current-driven - no base-emitter current equals no current whatsoever... And base is low impedance. So why is it that in most circuits I see pull-up or pull-down resistors on BJT bases? I thought the only time you need a pull-up or pull-down is if you have a high impedance, voltage-driven input to prevent excessive weirdness from happening... But if you left a BJT base dangling, it would just cut current and close the transistor...

...or wouldn't it?

[edavid]

BJTs are current-driven - no base-emitter current equals no current whatsoever...

They are voltage driven, but the base draws current

So why is it that in most circuits I see pull-up or pull-down resistors on BJT bases? I thought the only time you need a pull-up or pull-down is if you have a high impedance, voltage-driven input to prevent excessive weirdness from happening... But if you left a BJT base dangling, it would just cut current and close the transistor...

For a linear amp, you need bias resistors to establish the base voltage.

For a switch, you may need a pulldown resistor so the leakage current I_CBO doesn't turn the transistor on.  You may need a pullup resistor if the driver doesn't supply base current.

[Marco]

those beast are rare as they are not very practical ...

They seem nice for protecting high impedance inputs which might be exposed to high voltages, with one or two depletion mode MOSFETs (depending on whether the current is bipolar or not) and a resistor you have a self powered current clamp to combine with a TVS diode for input protection.

Is there an inherently better solution I'm missing?

[c4757p]

BJTs are current-driven - no base-emitter current equals no current whatsoever... And base is low impedance. So why is it that in most circuits I see pull-up or pull-down resistors on BJT bases? I thought the only time you need a pull-up or pull-down is if you have a high impedance, voltage-driven input to prevent excessive weirdness from happening... But if you left a BJT base dangling, it would just cut current and close the transistor...

...or wouldn't it?

Additionally, because they are actually voltage-driven as mentioned above, they can remain turned on for a short period of time by charge held in the base, just like a MOSFET (only not as dramatic). A pull-down resistor can help them turn off faster, and the effect of that resistor setting a lower bias point even in saturated switching applications can limit the amount of charge put into the base in the first place.