When you look at Figure 6, you need to recognize that they are coupling logic at 1.2V, 2.5V and 3.3V. GPIO3 is 1.2V, GPIO 4 is 2.5V and GPIO1,2 are 3.3V It's quite a circuit.
VrefA needs to be the lowest level logic voltage, or 1.5V in your case.
VrefB needs to be the highest level logic voltage or 5.0V in your case, don't forget the pull-up resistor
Ven = 5V
Any device that has a 21 page datasheet is going to take some reading.
It doesn't seem that the device wants to deal with very much capacitance 30 pf for 100 MHz (50 pf for 40 MHz). I have no idea how much capacitive loading the monitor, cable and PCB are going to provide. I wonder if this circuit is going to require some kind of cable driver. What is driving the other signals?