Using JFETs as variable resistors in an automatic gain amplifier

[DaJMasta]

I've got an automatic gain circuit using a JFET which isn't functioning properly, and since I haven't yet been able to tinker my way to a solution and it's my first time messing around with JFETs, I figured I'd ask here.

I have an AC signal with no bias in the audio band and want to use a JFET to attenuate the signal if it gets too large.  I've got a rectifier that pumps positive charge on a cap and a voltage divider setting the default voltage of the cap to about -2V (and as the signal is rectified, it gradually raises to 0V) and this biases the gate of my n channel JFET (a J113).  I have verified this behavior on my scope by monitoring the gate pin, then when I hook up the ohmmeter, I can verify that it changes resistance properly with the voltage and fully pinches off when left alone to settle to the voltage divider potential.

The problem is that when I drop it in my amplifier circuit, the JFET seems to only attenuate the negative side of the signal, distorting a sine wave test input into the normal positive peak and a much shallower negative peak.  I've tried connecting the source to ground as well as to the output signal and the drain is connected to the input line, but I haven't yet been able to get the positive side of the signal to attenuate.  Schematic for the current version is as follows:


Ideas?  It seems to be totally unresponsive the way this is built according to the schematic (pin 1 of the JFET to ground), and attenuates only the negative side of the input sine wave when pin 1 is attached to the output signal.  The pots theoretically set the minimum resistance for the JFET attenuator and the gain for the amplifier and I haven't found an adjustment configuration where both sides are attenuated equally.  When R14 is turned to maximum, gain adjustment for R28 works just as it should.  Please excuse the part indicators, just made this as a rework of the original circuit and haven't renumbered parts because they're likely to change again.

[David Hess]

You are going to need a different circuit.  The inverting input of the operational amplifier operates as a virtual ground so that is *not* the place to try attenuating the signal.

Do a Google Image Search for "jfet audio gain control" for some ideas.

[TheoB]

Indeed this should not work. You can try to move the jfet in parallel with R9. R9 and R28 determines your gain. Note that the jfet resistance is not linear especially if the signal over it become too large (>50mV or so). So this is not what you want for a highly linear audio circuitry. It will probably work though if you choose the resistors correctly.

[T3sl4co1l]

Besides topology (you need the JFET in series with R9, not shunting -in to GND), you should also use the "linearized JFET" circuit: a resistor divider from drain to gate to bias.  See Fig.6:
http://www.vishay.com/docs/70598/70598.pdf

JFETs are only useful for a small resistance ratio, say 1:5 or so.  For larger ratios, the signal level has to be proportionally smaller, until it's so few mV as to be useless.

The reason is, the saturation knee occurs at a lower voltage, as gate voltage is reduced.  In fact, it's at Vds = Vgs - V(pinchoff).

This is doubly true of the photo JFET type parts (e.g. H11F1), which are only resistive for very small voltages (a few 10s of mV).  They don't have a gate, so, they're always close to pinch-off, I guess...

Old-school vactrols (light emitter + CdS photocell) have been out of production for a long time (and never were all that consistent, anyway), FWIW.

Now, what you really need -- an OTA, like LM13700 (which is still in production... for the time being).  It's still not very stable (gain proportional to absolute temperature, so it drifts a lot), and prone to distortion for inputs over 10-50mV (but, that's all the range you need; the gain is fairly high, so you simply reduce your input signal to suit).  But you can attenuate the input as far as you want (10s of dB), no problem.

Or better still, get an IC that does VGA, or compression or something like that.  There's probably an audio compressor chip out there -- though it may need I2C or something...

Tim

[Theboel]

For a few dollar You can buy THAT2180 its use in many audio compressor limiter

[danadak]

Take a look here -

http://www.ti.com/lsds/ti/audio-ic/volume-control-product.page


Regards, Dana.

[DaJMasta]

I know there are chips out there that can do it, and if it comes to that, I will certainly incorporate one, but I'd like to try to get it working with the jfet, as I think it's supposed to be possible.

I had looked at several ACG circuits and they seem to go about it in all sorts of ways, it also seems like there are some that are really only suited to single supply stuff, rather than my split rail supply.  Many of the example circuits also use obsolete jfets and I haven't been able to match many of them to new equivalents in terms of their usage as variable resistors.

Anyways, I tweaked the circuit and have the source and drain of the jfet across the feedback resistors of the amp (R9 and R28), but it's actually giving me the same issue I was seeing before - attenuating the negative side of the signal while leaving the positive side untouched.  I rechecked the gate biasing voltage and it does not fluctuate between the high and low part of the signal, it just gets slightly topped off at the peaks (as expected).  I've attached the current schematic and what my scope shows (sorry for the image quality), the yellow sine wave is the input, the pink oblong wave is the output.  It looks like the negative side is down to unity gain, whereas the positive side of the signal is still fully effected by the feedback resistor value.  Got the same results (though obviously less noticeable at higher gain settings on the pot) when I used the jfet in parallel with only R9 and not both R9 and R28.

I had thought jfets operating in this configuration pass negative and positive charge equally well - on the j113 datasheet it even says that the source and drain pins are interchangeable.... but since it's only working in one direction with the same gate bias, maybe this isn't the case somehow?

[DaJMasta]

OK, spoke with someone more knowledgeable about electronics than myself and I think I have some understanding of what it would take to make this idea of a circuit work.  Basically, the jfet operates as I expect it would when in terms of current, but not necessarily voltage.  In the case of this very low current operation, the jfet being used doesn't respond in the same way with a positive signal as it does a negative one.  It would seem that the way to complete the idea I have sketched out would be to actually duplicate the rectifier and jfet side of things, but use a p channel jfet and rectify the negative component of the signal and feed it through that voltage divider on the positive side.  That said, because of the difference between individual discrete components, layout, assembly, etc, it probably would have a significant dead zone without a good bit of tweaking, and even then, performance of each side would likely hurt signal integrity.  To do it with only one jfet may only be possible with a single supply design where the drain and source are always biased with a positive (or negative) voltage.

So it looks like the best option is to go for an ACG chip, but since there aren't digital components on the board, is there a good analog option that can run on a split supply (low noise is a must, low distortion is nice)?  Do I just need a 12V regulator and AC couple into a single supply block that includes the gain controller?

[edavid]

I think the problem is much simpler than that.  Your circuit isn't maintaining the proper V_GS over the whole cycle.   If you float your circuit or use subtract mode, you can measure V_GS with your scope, but it might be easier to make a simulation.

You probably need to have a much lower amplitude input.

Also, use a pot to set the static gate bias.

[DaJMasta]

I ended up swapping resistors several times to set the static gate bias and according to resistance measurements of the jfet while biasing over the range that I'm using, it's set to right about where it needs to be to be low enough to pinch off completely and be able to raise to about 0V when the output is quite high.  I have measured the gate bias with my scope and aside from slight bumps at the peaks of waveforms, it is stable and within ranges I expect based on the circuit design and on the datasheet (-2V and 0V).

I don't see an indication of Vgs being important on the datasheet, but I have played quite a few different amplitudes for inputs, from 10mV peak to peak all the way up to 10V where I have zeners starting to clip the input.  At 1Vpp input the gate voltage has raised, but it would still be under the low of the input signal and the image taken of the scope shows a 1Vpp input (there's a divider on the output, so it reads as lower than it actually is).  I could be missing something, but I have verified that the gate biasing voltage is within expectations, is stable and raises with increasing input/output amplitude and I have tested essentially the full range of input signal amplitudes that could be designed onto the board given a +-5V supply.



As for other potential options, the THAT Corporation chips seem to be the winners of what I've seen so far.  A bit expensive, but they're some of the only chips that actually specify noise figures down into the audio band.  There are a number of VGAs for antenna receivers and whatnot, but the 1.1nV * sqrt(Hz) noise figure isn't going to mean squat for my circuit if it's for a 10MHz test signal.

[RobK_NL]

Old-school vactrols (light emitter + CdS photocell) have been out of production for a long time

No, they're not.

[T3sl4co1l]

Oh, neato, they /are/ still around!

Tim

[krivx]

They may be out of production actually, just still for sale. Non-RoHS and the prices seem to be increasing steadily iirc

[T3sl4co1l]

CdS photocells obviously can't be made RoHS.  Or, perhaps more tellingly: they didn't make them an exemption.

Bulk (amorphous, poly or crystalline) Si should be a perfectly acceptable photocell material too, but I don't know that anyone's using it.  Photodiodes, phototransistors and ICs are all the rage, though.

Tim

[Alex Nikitin]

 

That circuit can be used as a good example of how not to do things.

1) The input impedance of the circuit is 75 Ohm. It might be right for a video application but for audio it is just wrong and creates the following problem (on top of loading the previous stage and the opamp too much):

2) The feedback resistors are very low in value. A JFET channel resistance, used to adjust the gain, can change from many megaohms down to about 100 Ohm - 1kOhm or so. Essentially with such low resistances in the circuit a JFET can  not adjust anything, it can at best only distort the signal.

3) A JFET can act as a reasonably linear variable resistor only if the voltage on it does not exceed few tens of mV. And it is useful to make the gate voltage on AC to sit right between the drain and source voltages. There are plenty of examples available on the net how to do it properly.

Cheers

Alex

[Audioguru]

There are thousands of AGC circuits on the internet and some of them work perfectly. Here is the difference between yours and a fairly good one:

[DaJMasta]

The input impedance is off, I actually paralleled two 150 ohm resistors in an effort to get more gain out of the stage without remembering that the 150 ohm resistor was sized to clamp the output current of the preamp stage to a little below the 35mA rated output current.  Because I've done this testing with my function gen, though, the input from that has been straight at the start of the schematic.  I've been trying to keep my resistor values as low as possible to reduce thermal noise - the complete circuit this is part of isn't for producing a pleasing sound, it's for measuring the timing of audio band waveforms.  I upped it to 220 on R11 and a 3.3K on R9 and the jfet parallel to only R28 - which reduces the current the jfet needs to sink... but it didn't make any difference.  Acts normal when R28 is at 0, and the gain added by increasing R28 is only applied to the positive side of the signal.

I understand that the jfet goes up very high in resistance when pinching off, but I at least don't think I care about linearization, I just want the output wave to be at a constant value (not a set attenuation or even a value that I decide on in particular).  My thinking is that if a few mV of bias on the gate change the resistance by 200 ohms or 200k, the feedback is the important part, not the absolute value, and running in parallel to the feedback resistors would mean that if it started getting very high in resistance, it essentially just would be removed from the system, as all the feedback would happen through the fixed resistor and potentiometer, clamping the maximum gain.  The J113 in particular goes down to 100 ohms on the data sheet (measured lower), and I've got two related parts, the j112 and j111 which have lower gate pinch off voltages, but also lower on resistances (50 and 30 ohms, respectively).

Looking at the single supply circuit above, how does the jfet ever have its gate properly biased?  I'm obviously missing something, because I've read that positive biasing the gate on an n channel jfet can damage it, yet there is no negative charge built up, I'm clearly not conceptualizing something right if that circuit works.  Is it just that Vgs has to be negative?  So that circuit would function as long as the output amplitude was less than 10Vpp (diode drop is 1V) and the attenuation would be more linear with a smaller signal (making for a comparatively more constant Vgs)?

Looking again at the datasheets, does the voltage on the source always have to be above the gate voltage for the jfet to be operating?  In that case, is it basically impossible to use a jfet as an attenuator like this without a DC bias voltage if you have a stable gate voltage?  Otherwise the gate would have to be driven with a negative offset (that is the desired gate biasing voltage) waveform matching the signal being attenuated?

[David Hess]

CdS photocells obviously can't be made RoHS.  Or, perhaps more tellingly: they didn't make them an exemption.

I always thought this dumb because most or all are hermetically sealed or close to it and they have at tiny amount of cadmium.

Bulk (amorphous, poly or crystalline) Si should be a perfectly acceptable photocell material too, but I don't know that anyone's using it.  Photodiodes, phototransistors and ICs are all the rage, though.

Tim

They used to make photo FETs (and I guess they still do) and I do not think they used a photovoltaic string of diodes to control the gate.  How did they work?

[T3sl4co1l]

Dunno.  They're definitely a junction and pinchoff device, but they're also not PV, because pinchoff is the idle state.  Maybe it's that they're doped so that the (open circuit) gate terminal is pinched off (i.e., the channel is a fully depleted region), and the photocurrent leaks from D to (floating) G to S, or vice versa as the case may be.

In which case, I suppose the physics is that of two photodiodes in anti-series.  Which means one is PV-mode, which appears as reverse bias in series with the other.  And the current flow is saturated because it's simply the photocurrent.  And, at low voltages (proportional to Vf, but actually considerably below for %reasons%), the V(I) curves begin to match up in the curved (forward bias) range, and you get some resistive range.

But it's not resistive because it's a channel -- because that's silly, there's no channel in this structure at all (if it's as I imagine it).  Which is why the 'resistive' range is so narrow: it's the same as using a regular diode or BJT as a variable resistor -- you're using a small tangent on the I ~= exp(V) curve to do the variations.  So the useful voltage range is the same as well -- proportional not to Vf, but Vth, i.e., 10s of mV at the most!

Hey, so... there's those dual-photodiode isolators.  I wonder if wiring them antiseries works the same!  (Downside: the one photodiode is on the non-isolated side, so you don't get high voltage isolation this way.  Matched pairs of single photodiode isolators would be able to do that, though.)

The photocurrent and lack of reverse bias (on 'half' of the device) also suggests the slow response time (10s of us --> recombination in average silicon).

Another way to put it would be, a badly made BJT, with symmetrical photosensitive junctions (which, because they aren't layered together, has no diffusion over the base layer between them -- no phototransistor gain -- hence the weak current flow).  Or a monolithic dual diode.

Very curious what they actually are inside, and where the term "photo FET" came from!

Tim

[JS]

  Depending on what you try to archive there are better ways to go, blackmer cells (THAT Corp VCAs) are the cleaner way to do audio gain control.

  If you are going to do it you should at least check the professional audio implementations, Urei 1176 and API 525 are 2 of the most iconic ones.

  There are limitations on the signal level a jfet can handle working in this mode before going crazy on THD, so you need low level at the cell and then recover with make up gain, in a usually high impedance path. This means noise becomes a problem, to avoid that, increasing the level at the variable gain cell applying 50% of the signal to the gate makes things much better. Then you usually see something like 100k from S to G, and 100k D to G, then feed the CV with 1M or something like so. If used going to ground (the jfet) 1M to the signal and 1M feeding the CV, both methods resulting in about 50% of the signal at the gate. That's one of the keys for a successful implementation, the CV and side-chain is other key factor. Pro audio approaches have a lot of extra stuff that makes them great but not needed in most cases. if you can find an schematic for the Urei 1178 you could take a lot out of it, since it's ICs OpAmps implementation makes more sense for DIY rather than discrete + transformers.

JS

[Audioguru]

I've been trying to keep my resistor values as low as possible to reduce thermal noise

Ridiculous. A low noise phono preamp has an input resistance of 47k. Megohms are noisy.

....the current the jfet needs to sink.

Your Jfet is connected to the (-) input of the opamp that is a virtual ground that has its signal cancelled with negative feedback, no signal there, so wonder it does not work.

Looking at the single supply circuit above, how does the jfet ever have its gate properly biased?

It is an N-channel Jfet so it has a low drain-source resistance when its gate-source voltage is zero and has an extremely high resistance when its gate voltage is a few volts negative to its source voltage.

Like in every single-supply audio circuit, the (+) input of the opamp (and the source of the Jfet) is biased at half the supply voltage with R1 and R2. R5 connects the gate to 0V when the input signal level is low then the Jfet has its gate negative to its source and it has a very high drain-source resistance producing no attenuation. A high input signal level is rectified and causes the gate voltage to approach the source voltage then the drain to source resistance of the Jfet becomes low and it attenuates the inputs signal level.

[DaJMasta]

It did partially work, but I think your explanation confirms what I had suspected - I had designed the original circuit assuming that the gate voltage could be statically biased, which while can be an imperfect attenuator with a single supply and a small enough signal, it doesn't work at all with a split supply with no bias.  If I were to redesign, I'd put the rectified bias voltage from this first circuit and add it to the signal incoming with an opamp, then bias the jfet gate with that signal... but between that or adding a rail to the project, AC coupling, and just putting this section at as a single supply voltage... I think my better choice is to use an audio VCA and I think the THAT 2180 is the right chip for the job.

As for the noise.... we'll see how much of a difference it makes in the final device, but the thermal noise for a 47k resistor is quite significant compared to the noise levels I'm expecting from the parts I've spec'd - it would be ~28nV*sqrt(Hz) for just one 47k resistor's thermal noise, and all of the opamps I've chosen work down in the single digit nV*sqrt(Hz) ranges in the audio band.  I'm expecting that the noise from the THAT 2180 and it's required input resistor (10k minimum as per their datasheet) will be the largest contributor for an individual stage, but my preamp (using some of the smallest values I could pick and using the lowest noise opamp I could find) will end up being effectively the noisiest because of the much lower signal to noise ratio from the mic input (and the mic will probably still be noisier...).  Going with a few dozen or a hundred K here or there may be just fine for normal audio use, but I'm trying to get much better performance than a person can really hear for the sake of precise measurements, so I'm doing as much as I can to optimize it (even choosing lower current noise resistor types for the signal path).


Anyways, I will probably try to get a circuit going that uses a jfet just to prove to myself that I actually understand what's going on.... but I'll go with the commercial part to keep the complex, low noise analog design stuff from being a bugbear for months of wading through it while trying to make something perform reasonably :p