Author Topic: Voltage Divider Power Question  (Read 5818 times)

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Offline Zero999

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Re: Voltage Divider Power Question
« Reply #25 on: September 04, 2018, 10:13:27 pm »
What about if the original signal comes from an opamp output (naturally very low impedance) and has a high voltage, for example 5V or greater and must be injected to the ADC input (3.3V limit)

Then a resistor divider or a potentiometer is enough or still another opamp as a follower would be necessary?
It depends on the bandwidth requirements and the impedance of the potential divider. The ADC will have a sample and hold capacitor which needs to be charge/discharge to the voltage on the potential divider, every time a sample is taken. If the potential divider has a high enough impedance, then its voltage will significantly change, due to current entering or leaving the sample and hold capacitor, when a sample is taken. One way round this is to add a capacitor between the potential divider's output and 0V which will provide plenty of smoothing, so the voltage hardly changes, when the sample and hold capacitor is connected. The downside is it reduces the bandwidth.

Here's more information.
http://www.ti.com/lit/an/spna088/spna088.pdf
https://www.st.com/content/ccc/resource/technical/document/application_note/9d/56/66/74/4e/97/48/93/CD00004444.pdf/files/CD00004444.pdf/jcr:content/translations/en.CD00004444.pdf
 


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