Voltage Divider Power Question

[bryancostanich]

Hi folks! Here with another noob question!

In one of the electronics books I'm reading, it says that in practical situations, when building a voltage divider circuit, you want to choose the lowest possible value for the total resistance.

I'm a little confused by this. Wouldn't you actually want to use the largest possible R that still allowed for the necessary amount of current that Vout required? Otherwise, wouldn't you just be leaking potentially large amounts of current to ground and draining the voltage source? Or is that current going to be dissipated as heat if you use large resistance anyway?

[Dave]

You want high resistance in terms of power dissipation and to reduce the drift that self-heating of the resistors is going to cause.

On the other hand, you want a low resistance to improve frequency response, because there is always going to be some capacitance in the circuit and the lower the impedance, the lower the time constant. Another argument for low resistance is noise. Johnson-Nyquist (thermal) noise voltage is proportional to the square root of the resistance.

So what you're really looking for is a balance between the two, so you get a tolerable power draw but still keep a decent frequency response and low noise.

[Zero999]

It's a compromise. The lower the resistance values, the lower the output impedance, but the higher the current will be. The higher the resistor values, the higher the output impedance but the lower the  current will be.

The output impedance is equal to both of the resistor values in parallel: R_OUT = (R1×R2)/(R1+R2)

One way round the above, is to use add a low power, unity gain op-amp to the output of the potential divider.

[rstofer]

The voltage divider probably hooks up to something.  If it is an op amp, no problem, the op amp impedance is, for all practical purposes, infinite.  It doesn't load down the divider.

OTOH, if the divider hooks up to something with a lower impedance, you want about 10x the amount of load current flowing in the divider.  If the load requires 10 mA, you want 100 mA running through the divider.  That way, as the load varies, the voltage doesn't move around as much.  There's nothing magic about 10x, other numbers work but the effect of a varying load needs to be considered.

And, of course, the load impedance needs to be including in parallel one resistor of the divider.  If the load connects to ground, the load impedance is in parallel with the bottom resistor.  If it connects to Vcc, the load impedance is in parallel with the upper resistor.

[Ian.M]

Potential dividers are great when you want a scaled down bias voltage or signal, but absolutely suck if you need to supply power to a load.   As Rstofer just pointed out, you need far more current flowing through the divider than the peak load current to keep the voltage anywhere near to stable.    One way to help it out if you are dealing with DC voltages and can tolerate an extra drop of about 0.7V is to hang a BJT emitter follower off the potential divider tap, so the divider 'sees' the load current divided by the transistor H_FE.   Its cruder than the OPAMP buffer Hero999 mentioned, but still can be useful.   You can roughly compensate for the drop by inserting a small signal silicon diode in series with the bottom of the divider, but at the top end it still wont come closer than one diode drop to the supply voltage.

[bryancostanich]

I'm using it to hook a 5V sensor to a 3.3 ADC input.

My understanding is that the ADC has a high impedance. So it won't draw much current at all.

So I can probably use pretty small total resistance.

Still not sure I understand some of the power considerations though. Also, it seems inefficient; i'm just leaking current through R2 to ground the whole time?

[rstofer]

I'm using it to hook a 5V sensor to a 3.3 ADC input.

My understanding is that the ADC has a high impedance. So it won't draw much current at all.

So I can probably use pretty small total resistance.

Still not sure I understand some of the power considerations though. Also, it seems inefficient; i'm just leaking current through R2 to ground the whole time?

Read the datasheet for the ADC, most are NOT high impedance and require a fairly low source impedance - most often 10k or less.  The ADCs on microcontrollers usually require the lower impedance.

You can scale down with fairly high values of resistors as long as you use an op amp as a voltage follower to reduce the equivalent source resistance.

[Ian.M]

Edit: Rstofer already mentioned this, but here's some more detail.

It depends on the ADC input.  A switched capacitor SAR ADC can need a significant current to charge its capacitors to the input voltage.  The shorter the sampling period the higher the current.   Most ADC or MCU ADC datasheets will have recommendations for the maximum source impedance that can be used without degrading accuracy due to the sampling current or due to the DC offset caused by the input leakage current.

E.g. for older 8 bit PIC MCUs you need to keep the source impedance under 10K and ideally, if you are running the ADC at its maximum clock speed,no ore than a few K is preferable.

For slow changing signals, adding a capacitor right at the ADC pin big enough that charging the internal capacitors doesn't shift its voltage significantly can be a big help - if you can tolerate its RC time constant with the divider's thévenin resistance.  Ideally the external capacitor should be 2^N+1 times bigger than the total internal switched capacitance or the internal hold capacitor if it has one, so the voltage shift is no more than 1/2 the LSB.  N is the number of ADC bits.

If you cant satisfy the ADC's source impedance requirements, a true rail-to-rail OPAMP buffer is advisable.

N.B. Reference voltage inputs often need an even lower source impedance than the ADC input, and their impedance requirements may not be well specified in the datasheet. 

[bryancostanich]

I'm looking at the [STM32F4 datasheet](www.st.com/resource/en/datasheet/stm32f429ng.pdf), table 74 says that the max ADC input impedance is 50k , but the actual value is determined by an equation in which I don't know or understand most of the variables.

also, table 35, says that the ADC current consumption is ~4.5µa/MHz up to 90MHz. The MCU is running at 168MHz. So I guess that's 405µA (90 * 4.5), if I understand correctly.

edit: weird that the board doesn't recognize a standard ohm symbol, and turns it into a question mark. the emoji for ohm is pretty ugh.

[suicidaleggroll]

I'm looking at the [STM32F4 datasheet](www.st.com/resource/en/datasheet/stm32f429ng.pdf), table 74 says that the max ADC input impedance is 50k , but the actual value is determined by an equation in which I don't know or understand most of the variables.

also, table 35, says that the ADC current consumption is ~4.5µa/MHz up to 90MHz. The MCU is running at 168MHz. So I guess that's 405µA (90 * 4.5), if I understand correctly.

edit: weird that the board doesn't recognize a standard ohm symbol, and turns it into a question mark. the emoji for ohm is pretty ugh.

The variables are k, fADC, CADC, RADC, and N.  k and N are defined in the sentence below the equation, fADC, CADC, and RADC are defined in the table above.

The current consumption from table 35 is from the power supply, not the input pin.

If you're worried about current draw and power being wasted in a ~1k divider, then you have two options:
1) Use a higher value resistor divider and add a large cap at the ADC input pin.  The cap will buffer the voltage for the ADC.  The downside is your frequency response will suffer heavily, and it will only work for slow sample rates - if you sample too often, you'll end up depleting the cap quicker than your resistor divider can charge it back up.
2) Use a higher value resistor divider and have an op-amp buffer the output to drive the ADC.

[I2C]

Voltage dividers can have many combinations to achieve the same output voltage. A simple example is if your input is 10V and you want a 5V output (half) then a 1k & 1k will work, or a 10k & 10k (plus many other combinations); the important thing to know is that the maximum current you can draw will decrease as the resistance increases. As rstofer said, if it's an op-amp that's on the output then the current-draw is almost nothing so you're fine, but if the output current is higher then you can risk a significant voltage-drop, or even burning-out the resistors. It's best to check and see what the maximum current draw is first. I hope this helps!

[bryancostanich]

I think we need to step back a bit and resolve some more fundamental questions I have.

If i have two divider circuits of the following configuration:



Of the following values:

```
Voltage Divider 1:
 R1 = 8ohms, R2 = 12ohms
 Total R = 20ohms
 Total I = 5V / 20 = 0.25A = 250mA
 I @ R1 = 5V / 8ohms = 0.625A

Voltage Divider 2:
 R1 = 80ohms, R2 = 120ohms;
 Total R = 200ohms;
 Total I = 5V / 200 = 0.025A
 I @ R1 = 5V / 80ohms = 0.0625A
```

So first, if I understand correctly, then the max I can draw on Vout is 625mA in circuit 1, and 63mA in circuit 2. Since that's the max amount of current that can get through R1 at that voltage. Is that correct?

Second, what about power loss? For this question, let's forget it's a voltage divider network and just assume it's a serial resistance. Let's say I'm running this off an 5V battery (assuming it's an idea voltage source) that has 1000mAh. In circuit 1, I can expect to have 1000mAh/250mA = 4hrs. In circuit 2, I would have 40 hrs of charge (1000/25). Yeah?

Is that right? Or am I misunderstanding how resistors work, because I've read that the excess power is dissipated. but i'm not sure what that _really_ means.

[suicidaleggroll]

I think it's important to note that a voltage divider is NOT a voltage regulator.  The equation Vout=Vs*R2/(R1+R2) only applies if there's no load.  As soon as you start drawing ANY current out of a voltage divider, you change the voltage.  This is because you're effectively adding a load resistor in parallel with R2.  Then your divider is no longer R2/(R1+R2), it's RX/(R1+RX), where RX is the parallel combination of R2 and Rload.

I think we need to step back a bit and resolve some more fundamental questions I have.

If i have two divider circuits of the following configuration:



Of the following values:

```
Voltage Divider 1:
 R1 = 8ohms, R2 = 12ohms
 Total R = 20ohms
 Total I = 5V / 20 = 0.25A = 250mA
 I @ R1 = 5V / 8ohms = 0.625A

Voltage Divider 2:
 R1 = 80ohms, R2 = 120ohms;
 Total R = 200ohms;
 Total I = 5V / 200 = 0.025A
 I @ R1 = 5V / 80ohms = 0.0625A
```

So first, if I understand correctly, then the max I can draw on Vout is 625mA in circuit 1, and 63mA in circuit 2. Since that's the max amount of current that can get through R1 at that voltage. Is that correct?

Well, kinda, but in order to pull that much current out of the divider you'd have to short the output to ground (Rload=0), which means your "voltage divider" is now putting out 0V and isn't "dividing" anything.
What you need to focus on is how much current you can pull out of the divider without changing the voltage more than X%, where "X" depends on your application.  This will be likely be several orders of magnitude lower than the numbers you calculated above.

Second, what about power loss? For this question, let's forget it's a voltage divider network and just assume it's a serial resistance. Let's say I'm running this off an 5V battery (assuming it's an idea voltage source) that has 1000mAh. In circuit 1, I can expect to have 1000mAh/250mA = 4hrs. In circuit 2, I would have 40 hrs of charge (1000/25). Yeah?

Yes, if this voltage divider is your entire circuit, those calculations are correct (ignoring ESR in the voltage source).  If your circuit consists of other components you'll need to add in their current draw as well.

[Brumby]

So first, if I understand correctly, then the max I can draw on Vout is 625mA in circuit 1, and 63mA in circuit 2. Since that's the max amount of current that can get through R1

Yes, that IS the maximum current you can get through R1 - but that can only happen when R2 or the network associated with R2 is zero.  You have implicitly stated this in the formula you used:

I @ R1 = 5V / 8ohms = 0.625A

By having no other resistances in the formula, you are stating every other part of the circuit is a simple wire.  The 8 ohms is the total load seen by the source.

at that voltage. Is that correct?

If by "voltage" you mean V_s, then Yes.  If you mean V_out - then NO.  To get that maximum current, the output voltage will be Zero.


This is the issue with simple resistor dividers - any additional load you put on them will affect the voltages at all points of the network outside of the source.

[rstofer]

The resistors dissipate power no matter what.  The power P in Watts is given by:

P = I * E
P = I^2 * R
P = E^2 / R

If you remember one formula, you can easily derive the others by using Ohm's Law.  For example:  Look at P = I^2 * R.  Expand that to P = I * (I * R)  Well, we know that E = I * R so the equation falls back to P = I * E.

P in Watts
I in Amps
E in Volts
R in Ohms

[bryancostanich]

Ok, so does it make sense to recommend that you use the largest total resistance in a voltage divider that still allows for the necessary current the ADC needs?

In my case, I'm using an STM32F4 chip, and the data sheet says that the ADC has the following characteristics:

ADC Sampling Switch Resistance : 6Kohms
External Input Impedance : 50kohms
Internal Sample and Hold Capacitor : 4pF

So the peak current draw would be:

I = 3.3V / 6000 = 0.0006 = .6mA

Therefore,

R = V / I
R = 3.3V / 0.0006A = 5,500ohms = 5.5kohms

But then the problem I see there is that the total resistance is less than the sampling resistance. Wouldn't that blow my voltage divider math out of the water?

[suicidaleggroll]

I think you're confused about what the ADC switch resistance and input impedance mean.  Skip to section 4.4-4.5 of this document:
http://www.st.com/content/ccc/resource/technical/document/application_note/9d/56/66/74/4e/97/48/93/CD00004444.pdf/files/CD00004444.pdf/jcr:content/translations/en.CD00004444.pdf

Essentially a higher source impedance means you have to run your ADC slower to give the internal sample and hold capacitor time to charge up.  Using a cap on the analog line will help with this as it can supply the current "surge" into the ADC, as long as you give it time to charge back up before the next read by slowing down your ADC sampling speed.

You still haven't told us what sampling rate you need.  If you need it to sample quickly, then you will not be able to do it with a simple voltage divider unless you want to burn a lot of power.  As has been said many times before, you'd want to add an op-amp to buffer the output of the voltage divider and drive the ADC.

[bryancostanich]

I don't know what the sampling frequency is set to. It's a Netduino with an STMF4 running at 168MHz.  As I understand, the sampling frequency is set in software; but I don't know what it's been set to.

It's so strange to me that this has been such a rabbit hole. There are all these tutorials out there [here is one](https://learn.sparkfun.com/tutorials/voltage-dividers) that say, "hey if you have a sensor with a 5V output and you need 3.3V; no problem, just use a voltage divider."

But in digging in, that doesn't seem to hold the scrutiny of the folks here. 

After reading and studying, I get a lot of what's been said here, but it's totally contradictory to what I'm reading in these tutorials.

[rstofer]

If this was an easy problem to solve, with a universally correct answer, they would have told us in the first week of EE school and we could have taken the next 4 years off.

You need to use the formula to find the MINIMUM driving impedance necessary for the operating conditions.  If the conditions change, the result of the calculation changes.  As has been pointed out above, this type of voltage divider is FAR LESS than a good idea because the parallel combination of the bottom divider resistor and the ADC input impedance changes with the conditions.  This means that the voltage divider ratio changes with the operating conditions.  So, not knowing the operating conditions means you can't solve the equation and, therefore, you can't come up with an appropriate divider.

But that's a good thing because the divider is doing nothing for accuracy.  Furthermore, your sensor may not want to drive a relatively low impedance divider.  Or, it might not be able to achieve accuracy driving it.

What you really want to do is use a 3.3V rail-to-rail input-output op amp between your sensor and the ADC.  The sensor will see an essentially infinite load impedance (no current flow) and the ADC will see essentially a zero ohm driving impedance.  It doesn't get any better than this!

If you don't know the operating conditions of the ADC, you should be looking into it.  It all comes down to accuracy.  If you don't need accuracy, any pair of resistors will do something.  It won't be right, of course, but you will get results similar to what the folks on the Internet are getting.

Excel can do the calculations for the driving impedance (sensor) feeding into the divider with the parallel bottom resistor.  Then you can iterate over sensor voltage and see what kind of graph you get.  You could also model it in LTspice.  But sooner or later, you're going to need to know the operating conditions.

ETA:  The operating condition (frequency of conversions) could be as simple as "every time I loop through this C code, I grab one sample".  If so, the calculation could be quite simple.  Where the formula is really important is when you are taking periodic readings at a fast rate.  Maybe a timer kicks off readings and the DMA channel stuffs them into memory.  That might be a lot faster cycle.

[rstofer]

After reading and studying, I get a lot of what's been said here, but it's totally contradictory to what I'm reading in these tutorials.

Yup! 

Most of us have seen the tutorials but some of us don't sign right up.  When ST can't give you a definitive input impedance because it varies with frequency of operation, how can you possibly expect to calculate the right divider?  That ADC input impedance is in parallel with the bottom divider resistor.  It used to be that the manufacturer gave us the worst case input impedance or, better yet, told us what the source impedance had to be less than.  ST, OTOH, has chosen to give us the real equation and left it to us to match our design.

The resistor divider equation is only accurate for ONE value of ADC input impedance and that impedance needs to be known to as high a degree of accuracy as the ADC itself.  That also implies that our divider has to be very accurate (0.1% resistors).

Yes, you can use the 'rule of thumb' to have 10x as much divider current as you expect to have ADC input current, and it might actually work, it could still not be accurate over frequency,  Or the sensor won't like it...  The capacitor at the ADC input is also workable as long as it can fully recharge between readings.  Probably 6 time constants might work out but 10 time constants would be better.  This implies that a big capacitor needs a LONG time to recharge and a small capacitor might not hold enough charge to help with driving impedance.

[suicidaleggroll]

I don't know what the sampling frequency is set to. It's a Netduino with an STMF4 running at 168MHz.  As I understand, the sampling frequency is set in software; but I don't know what it's been set to.

What do you mean "what it's been set to"?  Aren't you writing your own firmware?  You're the one that sets the sample rate.

It's so strange to me that this has been such a rabbit hole. There are all these tutorials out there [here is one](https://learn.sparkfun.com/tutorials/voltage-dividers) that say, "hey if you have a sensor with a 5V output and you need 3.3V; no problem, just use a voltage divider."

But in digging in, that doesn't seem to hold the scrutiny of the folks here. 

After reading and studying, I get a lot of what's been said here, but it's totally contradictory to what I'm reading in these tutorials.

I don't see any contradictions, only simplifications.  A lone voltage divider is easy, and as with all easy solutions, it has a number of drawbacks.  It will divide the voltage, but it will force you to slow down your sample rate due to the divider's output impedance, and it will dissipate excess power.  Sometimes these drawbacks are important, sometimes they're not, YOU are the one that has to decide.  YOU are the one that came here concerned about excess power draw from a resistor divider.  If a simple resistor divider does not work for YOUR application, then you need to find an alternative.  That does not contradict anything in the sparkfun tutorial.  All the members here have been doing is pointing out what the drawbacks of a simple voltage divider are, and ways you can work around them if those drawbacks are problematic in your application.

As rstofer pointed out above:

the voltage divider ratio changes with the operating conditions.  So, not knowing the operating conditions means you can't solve the equation and, therefore, you can't come up with an appropriate divider.

You are not adequately defining the problem, which means it's impossible to tell you which approaches will or will not work or with what level of accuracy.  Come back to us with some actual requirements, like "I want to sample an analog voltage at 100 Hz using an STM32F4's built-in ADC with <0.1% error, without wasting more than 1mW of excess power, for less than $2 in single digit quantities", and we can turn around and recommend a circuit that will do that.  With an unknown sample rate, unknown accuracy requirement, unknown power dissipation requirement, unknown price limit, unknown size limit, etc. there are an infinite number of solutions, some better in certain aspects, and worse in others.

[bryancostanich]

Thanks folks.

I think I'm going to steer folks clear of this kind of setup. Especially given that you can get level shifter ICs and circuits for hardly any $. I was hoping that this would be simple for prototyping, but it's not. And the advice out there in the tutorials seems basically worthless. Actually, worse than that, because it gives people a false sense of something like this working and being accurate.

[suicidaleggroll]

Level shifters, like the ones I imagine you're referring to (eg: SN74LVC1T45) are for digital signals, not analog.  There's no such thing as a general purpose "do everything" analog level shifter that will work for all applications.  A voltage divider may work just fine, or it may not.  Being an electrical engineer means knowing the advantages and drawbacks of all potential solutions to a problem and deciding which is the best fit given the application, "given the application" being the key phrase in that sentence.  If you don't know the application, you can't recommend a circuit with any level of confidence in its performance.

[LukeW]

"I'm using it to hook a 5V sensor to a 3.3 ADC input."

I assume you mean a 0-5V sensor signal, and a single-ended ADC with a 3.3V reference. If the output was always 5V it wouldn't be a very good sensor.

If we assume the ADC input impedance is high, then yes, a voltage divider will work. It won't be infinite, but it should still be reasonably high.
Lower resistances lower the effect of this finite input impedance, at the expense of greater power dissipation, greater thermal noise and greater sensitivity to the non-zero resistance on the input side.

If you know the ADC true input impedance, then you can calculate the corrected resistor value to use to give you exactly the right division, with this resistor (the bottom half of the divider) in parallel with the internal ADC input impedance.

Basically, a voltage divider is only practical when we assume the source impedance is zero and the load impedance is infinite.
You can model this as a source resistance in series with the top divider resistor and a load resistance in parallel with the bottom divider resistor.

If in doubt, you can use an opamp voltage follower on the output side.

[VanitarNordic]

What about if the original signal comes from an opamp output (naturally very low impedance) and has a high voltage, for example 5V or greater and must be injected to the ADC input (3.3V limit)

Then a resistor divider or a potentiometer is enough or still another opamp as a follower would be necessary?