I'm not so sure -- doing a (admittedly very simplistic liberal calculation) assuming:
-- Switiching time = IRF3205 total gate charge / NE555 output current
-- MOSFET dissipates 10 amps * 12 volts while it is switching
Gives a dissipation of 2.8W. While I realise that my calculation is
vastly overestimating in many regards*, I'd like to know if there were any calculations behind your statements Paul? Even if it turns out to be true that this particular combination of parameters is OK, it might be more educational to explain where the cutoff lies.
In any case, a more optimized choice of transistor can reduce dissipation in the FET -- just picking the lowest on-resistance is a bad idea because low on-resistance comes with high gate charges --> long switich times --> higher switching losses. If you really want to have some fun, you can download digikey's transistor catalogue and use spreadsheet formulae to find the best transistor for your application, perfectly trading off switching losses vs resistive losses.
(Also, the decision pedantically depends on how willing the OP is to trade off wasted power in heat dissipation vs solution size vs BOM cost.)
* 2.8W would require heatsinking, but given that the real figure
might be about 10 times smaller (0.28W), I'd
guess that the MOSFET would not need a heatsink and just get a tiny bit warm.