I think we are just talking about the same thing. I am doing signal processing for more than fifteen years (worked for several big companies in this topic in the past), so i do not really need a lesson how a sine, square, pulse, ect looks like in the frequency domain. You say that rise/fall time is what counts, but not the frequency (spectrum) and it is completely wrong! The two is the same thing
No it is NOT ! This is a common mistake that is made over and over amd is very hard to stomp out.
The 'frequency' is not the 'spectrum'. The spectrum is the sum of all frequencies.
Fouriers theorem : a square wave is made by adding a fundamental sinewave with its harmonics. Every harmonic increases the edge rate.
The frequency of the signal is still only the base frequency ! Adding harmonics does not change the time required to pass through one full period of the signal. 'frequency' means 'base frequency'.
If you make an assymetric edge controlled square wave , lets say a rise time of 1us, 3 us high, 1us fall time, 95 us low.
The period is 100us or 10khz.... The crap in the spectrum is still generated by the edges. In case of an assymetrical signal the spectrum distribution is going to be very weird since the superposition theorem doesnt hold.... That only works with symmetric 50% duty cycle signals...
If i take the same period for this pattern but i pump up the edge rates to picoseconds. 1 picosecond up , 5 nanosecond (-2 ps) high, 1 ps down.. The period of this signal has not changed, so its frequency has not changed! Yet it radiates waaaay further in the spectrum. So , edge rate is not the same as frequency ! The only relation is that your edge rate can never be slower than 1/2 period. If you edge rate is 1/2 period you have a triangle wave.
Its got nothing to do with position on the forum. I'm the first to admit that there is at least 90% of electronics i don't know anything about. The above is how it is defined in all literature about emc and emi.
I followed the course given by Montrose ( one of the gurus in this field) at UCSC a couple of years ago (uni of California - Santa Cruz) Very interesting stuff. Final exam was a pcb stack and layout that had to be optimized for emc. The damn thing was full of traps.. Aced it
walked away with 100%