Most TRIAC datasheets I've seen, quadrant IV operation is only double the bias required of the others, so it shouldn't be too terrifically hard. That's static, so I don't know if dynamic (i.e., turn on speed) still sucks.
Standard CMOS MCUs will hardly care, because the PSRR to VCC is only slightly more than to GND, and both have reasonable noise margins. Ideally, the threshold range is 30-70% of supply, i.e., symmetrical, but NMOS are about 2.5 times better performing than PMOS*, meaning either the NMOS transistor is physically smaller (it is -- normally CMOS is fabbed with a 1:2 area ratio) and has lower capacitance, or the same size (and capacitance) but much lower resistance (normally the NMOS is ~30% lower resistance, which, hey, that's almost exactly the remainder of 2.5 / 2 expressed as percent, so the system works).
So, as far as sensitivity to supply rails, GND is probably slightly more sensitive due to the lower resistance to it (when devices are active). The threshold voltages should be matched as specified, so that's really the only difference there is to note. CMOS is otherwise pretty symmetrical, as it aims to be.
*A handy rule of thumb, which is based directly upon the material properties of the semiconductor: namely, electron mobility is always higher than hole mobility. They're still fairly close in silicon, but CMOS never worked out for GaAs because the hole mobility is something awful like 5 times lower than the electron mobility. Which is, in turn, several times better than it is for silicon. This is both reasons for why 1. GaAs generally goes much faster than Si, and 2. all the big logic circuits that were fabbed in GaAs (e.g., Cray-1) were designed with good old fashioned NMOS (N channel FETs plus dumb old pull-up resistors!). Needless to say, all that logic simply gobbled up power!
Tim