Why don't chip manufacturers build decoupling caps into ICs?

[markbrannan]

In every design I use I always add 100 nF decoupling caps to any IC, on both power rails if there is more than one.  I know that in some cases ICs don't necessarily need to have bypass caps to work well enough for the application, it's just a habit i'm in - surely it can only help. However, surely IC designers know that people are putting these additional caps around their ICs all the time and it is actually a beneficial upgrade to the IC alone and they would opt to build them *into* their ICs? Are there some niche applications for which decoupling is detrimental and this is why they leave them out? Would it actually make the chips noticeably more expensive?

...is it a big sneaky ploy?

[mikerj]

They simply don't have the room to integrate large value caps onto silicon.  It would make the die enormous and very expensive.

[T3sl4co1l]

The process also isn't compatible*.

*FeRAM actually uses DRAM made of the same stuff (more or less) -- the hysteresis of the material (which manifests itself to us as useless power loss) is used to store nonvolatile data.  I don't know how much the extra steps change the process, in terms of cost or suitability for other purposes.  So, at least when it comes to generic parts... it's added cost if nothing else.

It would also preclude some off-label uses, e.g., using an LM317 as an RF oscillator.

The bigger chips are bypassed on device, though not on die necessarily.  For many years, CPU modules have had local bypass integrated into the module, at least to handle the highest frequency transients.  Arguably, the Pentium IIs were possibly the first to do this, but since a Slot module is just a regular PCB, that's kind of silly; the PGA versions may've done things this way though.

Altera, for example, recommends a good power supply impedance up to 100MHz or so, beyond which they don't care, meaning on-device reserves take over.  FPGAs are usually chip-on-board, where the board carries the die and whatever other bits, under encapsulation, with balls on the bottom side.

Tim

[tggzzz]

However, surely IC designers know that people are putting these additional [bypass] caps around their ICs all the time and it is actually a beneficial upgrade to the IC alone and they would opt to build them *into* their ICs?

To some extent they do, both in the silicon (where the capacitance is low, but in the right place) and also as conventional capacitors in/on the IC package (where the capacitance is higher, but further from where it is needed)

[marshallh]

In many cases it's cost prohibitive. But in others like BGA both wirebond and flip chip, on-interposer decoupling is common. Additional very low value caps are on die for the faster on-chip switching speeds. You may never see these due to the package, but they're there

[Paul Moir]

Arguably, the Pentium IIs were possibly the first to do this, but since a Slot module is just a regular PCB, that's kind of silly; the PGA versions may've done things this way though.

Coincidentally I have an old UltraSparc processor sitting on my desk, which is a more integrated solution with decoupling and older than the P-II:

http://en.wikipedia.org/wiki/UltraSPARC#mediaviewer/File:KL_Sun_UltraSparc.jpg

I'm sure we'd be able hunt down some more esoteric older examples.  I hope this comes across right.  I'm trying to be informative and not pedantic.  It's just sitting here right in front of me!  The things in the middle of the spreader are studs for holding the heatsink to the package.


Back before SMT when there was lots of room in the package, not stuffing a capacitor somewhere in there baffled me. 

[marshallh]

Example of an early multi-chip module (MCM)
Writable control store for DEC KA820 cpu

I believe that IBM was doing this in the late 60s, early 70s but I can't find any pics at the moment. 24 layer ceramic substrate? No problem...

[T3sl4co1l]

Arguably, the Pentium IIs were possibly the first to do this, but since a Slot module is just a regular PCB, that's kind of silly; the PGA versions may've done things this way though.

Coincidentally I have an old UltraSparc processor sitting on my desk, which is a more integrated solution with decoupling and older than the P-II:

http://en.wikipedia.org/wiki/UltraSPARC#mediaviewer/File:KL_Sun_UltraSparc.jpg

I'm sure we'd be able hunt down some more esoteric older examples.  I hope this comes across right.  I'm trying to be informative and not pedantic.  It's just sitting here right in front of me!  The things in the middle of the spreader are studs for holding the heatsink to the package.


Back before SMT when there was lots of room in the package, not stuffing a capacitor somewhere in there baffled me.

Cool.  Make sense it's been done, long before -- usually fancy things filter down to consumer stuff only by the time they're desperately needed!

Tim

[coppice]

There are a lot of situations where decoupling is placed inside an IC package or on its outside. However, it is only done where performance demands its, because external decoupling would just be too far away to be effective (e.g. RF devices). Its a lot cheaper to decouple with separate components on the board. Many devices have multiple pins just for the attachment of external decoupling caps for various internal rails. People are always trying to keep their pinout efficient, so they aren't using up pins for no reason.

I think a growing issue is super slim packages. There just isn't enough thickness for conventional decoupling caps to be buried inside the device. Perhaps thinner and broader caps could be developed for this.

[T3sl4co1l]

I have an AMD Duron that's got "sideways" caps on the interposer.  No guess what value they are, other than "enough" of course.  They're not very big, maybe like... 1205 or so.  Pretty thin.  Wouldn't be hard to get inside a smaller package, though doing that with, like, chip scale packages would be a big challenge.  And those are the more popular types when it comes to miniaturized electronics.

Oh, this comes to mind: the SD standard allows up to 10uF (8uF? I forget) on card.  So you don't have to worry about filtering beside the socket.  But you do have to worry about power transients if the card is to be hot-plugged!  A 1 ohm series resistor to the supply pin is probably a good idea.

Tim

[SeanB]

Major problem is the package manufacture will not be compatible with the capacitor mounts, as they will be subject to very high pressures during a plastic package moulding cycle, and the attachment to the die leadframe will need to be done with a weld, not a soldered connection. Extra steps in assembly, and a lot of extra machinery that will sit idle most of the time, just to save a single component on the BOM. Look at all the examples given, which use either a multilayer interposer board that has the capacitors on it in a non covered area, or in a keep out in a plastic overmould, or on a ceramic substrate. This is to keep the capacitor from being stressed, which reduces the reliability.

In the old days od DIP packages you got sockets with integrated decoupling capacitors ( 100n 50V chip ceramic with leads and a dipped coat or a glass frit seal) that you soldered to the board like a regular socket, then plugged the IC into that. More expensive than the socket plus capacitor, but used where space was tight or the extra capacitance was needed for some reason or to cure a noise issue.

[tggzzz]

In the old days od DIP packages you got sockets with integrated decoupling capacitors ( 100n 50V chip ceramic with leads and a dipped coat or a glass frit seal) that you soldered to the board like a regular socket, then plugged the IC into that. More expensive than the socket plus capacitor, but used where space was tight or the extra capacitance was needed for some reason or to cure a noise issue.

Or Rogers Micro-Q, which was the best thing available for two-sided boards. http://www.farnell.com/datasheets/22715.pdf

[jeremy]

Ooooooh, I found a bunch of these micro q units before, but I never knew what they were for.

[SeanB]

You only used those if you had done a complete FU and there was no time or space to respin the board with decoupling caps on fast logic. They were expensive.......

Only time I saw them used was in the custom versions like on the Core memory Dave got, where they served as both power distribution and decoupling capacitor. IIRC you could get a prototype version that had leads on a 0.1in spacing on each side, and an extended leadframe so you just cut off the unneeded pins to leave power and ground to fit the board when needed. Basically a narrower strip of capacitor in the middle so it would not short out. When you had a design finalised you got the part custom made with the leads in the right places for the circuit.

[Marco]

When the patents on using ceramic dielectric layers inside PCBs run out we'll probably be able forget about decoupling caps on 4+ layer boards.

[SeanB]

I saw some boards made in the 1970's that used the 24 layer board as decoupling, using a few of the inner layers that did not carry traces. Absolutely no room for decoupling there aside from that, except for a bulk capacitor on the input of the board.

[Alex Eisenhut]

In every design I use I always add 100 nF decoupling caps to any IC, on both power rails if there is more than one.  I know that in some cases ICs don't necessarily need to have bypass caps to work well enough for the application, it's just a habit i'm in - surely it can only help. However, surely IC designers know that people are putting these additional caps around their ICs all the time and it is actually a beneficial upgrade to the IC alone and they would opt to build them *into* their ICs? Are there some niche applications for which decoupling is detrimental and this is why they leave them out? Would it actually make the chips noticeably more expensive?

...is it a big sneaky ploy?

Some chips do, ADS5292 for example. Probably in general manufacturers make more money putting transistors in the area of a capacitor, unless there's electrically no choice anymore. There's no ploy.

[Paul Moir]

..very high pressures during a plastic package moulding cycle...

I hadn't considered that one.

I only saw those strip capacitors used in an old late 70s daisywheel printer.  It was one of those things that probably cost a few thousand then.

[Zero999]

In every design I use I always add 100 nF decoupling caps to any IC, on both power rails if there is more than one.  I know that in some cases ICs don't necessarily need to have bypass caps to work well enough for the application, it's just a habit i'm in - surely it can only help. However, surely IC designers know that people are putting these additional caps around their ICs all the time and it is actually a beneficial upgrade to the IC alone and they would opt to build them *into* their ICs? Are there some niche applications for which decoupling is detrimental and this is why they leave them out? Would it actually make the chips noticeably more expensive?

...is it a big sneaky ploy?

Some chips do, ADS5292 for example. Probably in general manufacturers make more money putting transistors in the area of a capacitor, unless there's electrically no choice anymore. There's no ploy.

I couldn't find anything on the datasheet about it having built in decoupling. It does have very small sample capacitors integrated but that's nothing unusual. Plenty of ICs contain small capacitors, take th old uA741 which has a 30pF compensation capacitor built-in and any microcontroller with a buiilt-in RC oscillator.

Decoupling capacitors tend to be much larger >100pF and take up a lot of die area so won't be used unless it's necessary.

[Alex Eisenhut]

In every design I use I always add 100 nF decoupling caps to any IC, on both power rails if there is more than one.  I know that in some cases ICs don't necessarily need to have bypass caps to work well enough for the application, it's just a habit i'm in - surely it can only help. However, surely IC designers know that people are putting these additional caps around their ICs all the time and it is actually a beneficial upgrade to the IC alone and they would opt to build them *into* their ICs? Are there some niche applications for which decoupling is detrimental and this is why they leave them out? Would it actually make the chips noticeably more expensive?

...is it a big sneaky ploy?

Some chips do, ADS5292 for example. Probably in general manufacturers make more money putting transistors in the area of a capacitor, unless there's electrically no choice anymore. There's no ploy.

I couldn't find anything on the datasheet about it having built in decoupling.

pg 57

"Supply Decoupling
Because the ADS5292 already includes internal decoupling, minimal external decoupling can be used without loss in performance"

[Alex Eisenhut]

Example of an early multi-chip module (MCM)
Writable control store for DEC KA820 cpu

I believe that IBM was doing this in the late 60s, early 70s but I can't find any pics at the moment. 24 layer ceramic substrate? No problem...

Beautiful. I love the 1/4W resistor.

[tggzzz]

You only used those if you had done a complete FU and there was no time or space to respin the board with decoupling caps on fast logic. They were expensive.......

A bit of an exaggeration, and depends!

Back in the 70s, double-sided boards with lots of dense logic tended to, ahem, economise on the width of Vcc and Gnd tracks - simply to leave room for the signals. The Micro-Q devices were typically wider than the Vcc/Gnd tracks and so had lower inductance as well as capacitance. I never did have any problems with decoupling nor bounce, but then I've always been paranoid about it. In one case I even had people remark that "they were amazed that a board with so many ICs on it worked first time"

As to "expensive"? Depends on what you are doing. During prototyping and proof of concept in the field you do want to debug the concepts and really don't want to be debugging your decoupling! For production, well, that depends on many factors.

Having said all that, I never had to use them "in anger" but I probably used them in a "belt-and-braces" fashion.

[DutchGert]

DDR3 memory has a bit on on-die termination.

[tszaboo]

Because it costs 1 cent + 1 cent for the assembler if it is outside, while it would cost more if you build it in. Simple as that.

[pmbrunelle]

There's the Melexis No-PCB Hall sensor:

http://www.melexis.com/launch-mlx90364.aspx?utm_source=Print&utm_medium=PR&utm_content=PR&utm_campaign=NO%20PCB

Quite neat, because it's no fun to have to add a PCB to a component just because it needs decoupling capacitors...