Will an RC time constant circuit work to delay this transistor turning on?

[Chris Wilson]

Can I add a form of RC circuit to this schematic to stop the transistor turning for say 0.5 or so seconds after the TIP125 base is grounded?

Thanks.

[Andy Watson]

Yes. But what are you trying to achieve ? Slowly raising the Vcc supply to logic chips is a bit non-deterministic!

[T3sl4co1l]

Why not, at the 1k resistors going into IC5, add a pair of AND gates instead?

Tim

[Chris C]

Slowly raising the Vcc supply to logic chips is a bit non-deterministic!

^This.  A bipolar transistor is a current-driven device.  With any RC circuit sufficiently large to delay turn-on for 0.5 sec, when it does start to turn on, turn-on will also be correspondingly slow.

Simply substituting a voltage-driven device like a MOSFET will provide much better results.  Though you could get fancier still, by adding a feedback path; so that when the output of the MOSFET starts to rise, it feeds back into its own gate and snaps rapidly into full conduction.

[AlfBaz]

I've done similar by placing a zener in series with the base. When the RC circuit reaches the zener's break over voltage the transistor turns fully on

[Chris Wilson]

Why not, at the 1k resistors going into IC5, add a pair of AND gates instead?

Tim

Hi Tim, Chris, Andy and all.

The reason  I am having to do this is as follows.

The output FET driver chip must not be left where it leaves an output FET in an ON state. It's fine when an input signal to the amp is present, but should that stop a protection circuit  based on the monostable vibrator chip kicks in, and the amp shuts down with the warning LED illuminated. It works fine!

But WSPR and OPERA, two ham radio digital mode programmes, stop and start transmission on a time based format. 70% of the time the software will send the opening data and the amp wakes up and goes to TX. But the rest of  the time I believe  the "about to transmit, start the amp" signal from the transceiver that drives the TIP125 in the amp arrives sufficiently before the data from its output terminal for the amp to shut down, thinking there is no signal. Or maybe arrives between pulses from the monostable??

My thinking was if I could delay the grounding of the TIP125 for a short period, yet allow the drive from the transceiver to start, all would be well. A viable signal would be there *BEFORE* the TIP125 started to conduct.  I had not considered that an RC network would slowly bring up the voltage, rather than suddenly turn it fully on, after the delay. That may or may not be satisfactory, but  I suspect it could have unpredictable effects.

The gates in series with the 1K resistors to IC5 would not work, I don't think, as the safety stuff is before them, so it would still shut down due to no signal, or poor signal timing.

The FET sounds good, and, as was talked of in another of my posts elsewhere in here, it would not drop the voltage as much due to a FETS low on resistance, either.

The Zener also sounds like another avenue to explore, I certainly hadn't considered that.

Hopefully the above sufficiently explains why I am trying to delay the switch on?

Thanks!

[Andy Watson]

If I understand this correctly you are controlling the transmitter by switching the power supply? I would only consider this as an emergency shutdown option.

I think what you want to do is use the spare input on IC6, pin 8, to disable the outputs when your "Tx" signal becomes high. Extend the Tx signal with a monostable  - if required.

Edit: You will need to invert the Tx signal to use IC6, pin 8.

[T3sl4co1l]

Eh..?  Disabling at IC6 will leave one side hot.  Pffsst..BANG!

Gating the MOSFET drivers is a preferred method.  Move the protection stuff up there.  Shutting down entire supply rails is dumb for a number of reasons:
- Violates input voltage ranges
- Slow as hell
- Lots of uncertainty (how fast is it actually shutting down, is it crossing safe thresholds in the process?)
- Bad for the transistors ANYWAY (until the MOSFET driver crosses its UVLO threshold, the gates will be driven with insufficient voltage, leading to momentary linear operation and extreme dissipation).

This is an excellent illustration of the principle: just because it works at DC, doesn't mean it's a good idea.  You can't simply go from DC to "mehhh, it'll work!" -- there's a huge number of nanoseconds inbetween for things to go wrong an awful lot faster than "DC"!

An asynchronous gate to the gate drivers is still not quite preferred, but the startup/down transient is now limited to a full half cycle (assuming the input clock source is maintained at all times), that is, the instant the signal transitions to ON, it may be followed by a full half-cycle for one transistor, or half, or only a sliver.  Ideally, it would be triggered by a latch, timed from 1/4 or 3/4 cycle points only.  But this isn't a big deal; the resulting transient will be handled safely if the output transformer has a 2x safety factor on saturation flux density.

Tim

[Andy Watson]

Eh..?  Disabling at IC6 will leave one side hot.  Pffsst..BANG!

Are we looking at the same chip? IC6 must be an NAND gate (otherwise tying pin 8 to the positive would disable its function). Pulling IC6 pin8 low will force its output high. Its output goes (I believe) to the Set and Reset inputs of the D-type flip-flop (4013), thereby forcing its outputs low high. This functions exactly the same as the time-out of the clock signal. The clock to the D-type is pin 3 - no?

Edit: Correction of the output inversion.

[T3sl4co1l]

Oh duh, those AREN'T D inputs, are they...

Yeah, that'll do just fine.  Beats adding logic!

Tim

[Chris Wilson]

For clarity, here is the description of the safety interlock stuff from the design notes, and attached should be an annotated schematic detailing what the IC's are. Does the advice of using pin8 on IC6 still hold good? Thanks for the posts and discussion

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The rig is crystal or VFO controlled and uses Philips Locmos 4000 series chips to generate push-pull square-waves on 136kHz from the high frequency source. The basic divider chain requires an input at 1.36Mhz which comes either directly from the VFO or from the 13.6Mhz crystal via a further divider. The 4013 D-type, IC4, must divide by two in order to produce its push-pull output so the 4017 decade counter, IC2, is strapped to divide by five by connecting Q5 back to the reset pin. The 136kHz square-waves are fed to the TC4426 driver chip, IC5, via 1k resistors. An interlock to prevent damage to the output devices, should the drive fail or the SWR be poor, is provided by IC3, a 4538 dual re-triggerable monostable and the gates IC1 and IC6. IC3a is clocked by the 272kHz signal at the output of the IC2 and, if the signal stops, the output on pin 6 goes low and, via the gates, stops IC4 producing output. Should the reflected power or the PA current rise to unacceptable levels the drive is also shut off. When the error signal stops, IC3b is triggered and by the same mechanism, stops the drive for approximately one second. This prevents the TX chattering on and off in the presence of a fault and gives the operator enough time to let go of the key! IC3b is prevented from triggering on power-up by the R and C on pin 13 (clear).

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[Andy Watson]

Yes, enabling the outputs via IC6,8 would turn the transmitter on/off, but after re-reading your problem and studying the circuit with the extra descriptive information, I have a slightly different solution. I had assumed that IC3 was concerned with detecting the presence of the clock signal, I had not twigged that IC3b was providing an extended "lock-out" on the detection of an error. I now believe it is this latter condition that you are trying to defeat when powering-up the transmitter.

When the Tx signal occurs you need to trigger a delay (0.5 seconds?) during which time you hold IC3b in its "Clear" state - via pin 13. This still leaves the other safety locks operative via IC1b,11 and IC6,2, but should prevent IC3b from starting its lock-out period.

IF (and I still think this is a dirty method of going about things), but if you are enabling the transmitter via controlling the Vcc power line the simple solution is to increase the time-constant of the RC network on pin 13 of IC3. C would have to be increased to about 10uF. I would also include a diode to the Vcc rail to prevent this capacitor discharging via IC3 when the power is removed.