Writing EEPROM, sudden battery loss, capacitor keep-alive calculation?

[jnz]

And conversely, if your circuit is being fed on it's own, when that feed is opened, your internal power rail capacitance may tend to keep the feed at highish voltage, meaning you may not detect a nice obvious drop in voltage to be able to say "oh look the powers gone off".........

You're implying that the micro's brownout detection wouldn't be fast enough if I'm buffering on the 5V side of the power supply because it itself is being buffered? Hmm, I guess I haven't considered that, but in this case the micro says it'll work down to 1.8V... My plan is to ride 5V down to 2-2.5V with the cap, I sort of assume the micro will can let me know between 4-4.5V if I can start EEPROM or not. IDK.

This is a lot more complex than I expected.

[SeanB]

You probably want a power supervisor there, that will detect the falling power supply voltage, and generate an interrupt for the micro to tell it the power is on it's way out. As a bonus many also include, almost for free, a precision brownout detector, and as well a reset generator with a well defined trip level, and also often a watchdog system that can restart the microcontroller if it stops giving the watchdog reset for a while. Some also include a battery backup section that drives an external RAM and both provides power to it from an external cell, either primary or secondary, along with the right control signals to minimise RAM standby current.

[GeorgeOfTheJungle]

It's better to put the capacitor before the LDO, why?

1) Because if (as it seems) there's more than double the voltage before the LDO (input) than after it (at the output), the energy in the capacitor is going to be 4 times more: E is proportional to V squared (C*V²/2)) => twice the voltage, 4 times the energy in the (same µF) capacitor. While the power consumed  is I*V not squared (4 times more reserve energy but only twice the power).

2) It's easier to monitor that and you'll be able to detect a drop in V much sooner than after the LDO, and the sooner the better.

1)+2) = much better before than after.

Put 12V (2.4 times more) into V and leave 330µF in C and multiply the µJ/µs x2.4 in the spreadsheet and see.

[jnz]

It's better to put the capacitor before the LDO, why?

1) Because (if, as it seems) there's more than double the voltage before the LDO (input) than after it (at the output), the energy in the capacitor is going to be 4 times more: E is proportional to V squared (C*V²/2)) => twice the voltage, 4 times the energy in the (same µF) capacitor. While the power consumed  is I*V not squared (4 times more reserve energy but only twice the power).

2) It's easier to monitor that and you'll be able to detect a drop in V much sooner that after the LDO, and the sooner the better.

1)+2) = much better before than after.

Put 12V (2.4 times more) into V and leave 330µF in C and multiply the µJ/µs x2.4 in the spreadsheet and see.

Because those nice cheap 330uF parts - have 6.3V maximums.