Yet another power supply - overshoot problem

[Microcheap]

Well, not quite another, I took the design of that infamous 30V 3A power supply, widely discussed here and other forums as a start point, and I am making some changes to it while I'm trying to learning some thing in the process.

Voltage regulation and current limiting are working, I have to tweak some components values yet but the major problem I'm facing now is that the output of the power supply is overshooting to the V+ rail on power on and off.
I've attached some pictures showing what happens:
When I turn off the psu the negative rail collapses(CH2 in blue), the opamp saturates and the psu output (CH1 yellow) goes to the maximum V+. Same happens when turning on, the output overshoots and then falls to the set value when the negative supply of the LM358 stabilizes. CH3 is the +12V fed to the opamp.

I tried to attach the LM358 to ground, change the configuration of the output stage, some components values... I just could do things worse. Any idea what I'm doing wrong? Any suggestions?

thx

[Ian.M]

Try adding a Schottky clamping diode to keep the negative rail from going more than 0.3V above ground, and a N-JFET pulling down the base of Q5 to ground, with its gate driven from the negative rail to hold the pass transistors off while the negative rail is not present.

However while the pass transistors are disabled, the error amplifier will wind up and rail so you may still get some overshoot if the JFET cuts off too quickly.

[Microcheap]

Thanks for the suggestions Ian. It did help.
I've tried before to tie the collector o Q1 to the base of Q5 but it didn't work, as I don't have any JFET at hand I used a BS170 instead. Now, on power off I get only a small spike and with some load on the output (I tested with a 220ohm resistor at 10V) it is even better.
Unfortunately the problem persists when I switch on the power supply. I'll try to find some JFET to test and see if it does any difference.

[Ian.M]

A N-JFET needs negative gate bias to cut off - rather different from most N-MOSFETs (depletion mode N-MOSFETs are similar).   It 'looks' resistive with zero gate bias and zero Vds.  Combined with the Schottky I mentioned, it will inhibit Q5 from before the +VDC (unreg) rail starts to rise on startup, until the -5V rail is at least a few volts negative of ground, and till after the +VDC rail has collapsed to zero on shutdown.    You could adjust the cutoff by taking the gate to the wiper of a preset between Gnd and -5V.  Most alternative UVLO circuits capable of sensing the -5V rail are far more complex.

Caution: the N-JFET *MUST* have an Idss>>I(R15) to be effective.

[SeanB]

I would also add a 1k or so resistor across base emitter of Q2, as the turn on might couple enough charge to turn on the pass element transiently, and any leakage in the transistor will cause voltage to rise, especially as the pass element and driver get hot with high current operation. Additionally change R16 to a 470R resistor, 1k is a little high to handle leakage in a 2N3055 as it gets hot, and a better transistor to use there is a 2N3773 or 2N3774, which has a lot better SOA area and much improved thermal characteristics over the old venerable 2N3055.

Replace R15 with a pair of resistors in series, probably 1k in series with 2k7, with the junction of the 2 resistors having a capacitor of 10-47uF 35v connected from the junction to your common ground rail. This will mean the voltage to turn on the pass elements is slow to rise on power on, and thus there is time for the control loops to stabilise and pull the output voltage down before there is enough current flow in the control loop to turn on the pass transistor. The capacitor will not have any effect on the loop itself in normal operation, as Q5 is being current driven and thus has a near constant 1V2 on the control line.

[Microcheap]

Just a follow up. Sorry for the delay but I was waiting to get the JFET to finish testing this power supply. I tried the suggestions from Ian and Sean and it did work, I still have a small spike on the output during power on, but it is way better than before, and with some load on the output a see a clean rise of the wave form.
Tomorrow I will have to fix my DC load that I burned today (using a too small heat sink  ) and then I will do more tests to see how it behaves. As far as I got, it was promising.