Dave, I have better explanation of the patented frontend circuit discussed in the video.
The cap and resistor between B and C together with the next inverter and its input protection diodes act as a pulse shortener.
It sends a short pulse out every time the input transitions from low to high.
If the input is stuck on either logic level there will be no pulses going out.
These pulses charge the second cap thru the diode while the resistor in parallel with it discharges it.
This means that the cap voltage will rise over the logic high level threshold if there are enough pulses in a time span to charge the cap more than it is discharged by the resistor.
So output of the inverter behind the second cap will signal continous presence of series of low to high transitions on the input, that is the AC signal capacitively coupled onto the probe tip.