EEVblog #648 - Mailbag

[EEVblog]

Mailbag Monday
Dave opens his mail, outback Australian style...

Franky's Ebay Store
http://stores.ebay.com/99centhobbies

Ten Essential Skills for Electrical Engineers
http://amzn.to/1zJTX3B

WiFi Digital Radio teardown

1970 vintage Magnetic Core Memory!

[221-b]

Dave,

The Swiss Army Knife made me itch but the new "broadsword" was hilarious! 

I am poor enough at electronics that my wife has to change all the batteries but I think I noticed a hole damaging one or two conductors of the bodged flat flex in your internet radio.  It was a couple inches from the tear "repair".  You have probably caught it already but just in case...  Many thanks for all the shockingly good video!

Brian

[Homer J Simpson]

[max666]

That magnetic memory is fascinating, would love to see you write and read some stuff on it, Dave.
Jeri has done a nice vid on Magnetic Logic:

[Vgkid]

This is a really neat mailbag Monday, gotta love the Magnetic Core memory.

[BravoV]

Lol ... love that knife Dave ! 

[robbak]

Make sure that, before you write to that core, that you do a full read! Although core memory is destructive read (you basically set the bit back to zero and measure whether you get a voltage spike that tells you it changed), it is otherwise non-volitaile, so that core will have decades-old data sitting on it.

[EEVblog]

it is otherwise non-volitaile, so that core will have decades-old data sitting on it.

all 400 words of it 

[pickle9000]

If it has "Nixon sucks" or "Dickhead" on it then it will all be worth it.

[NiHaoMike]

On the radio, it looks like there's a hole in the cable a little up from the connector. Should be easily fixable if the pitch isn't too small. I'm also surprised they used an old audio amplifier design that needs a heatsink, especially on something that can be battery operated. A modern amplifier of that power level would be a little SMD chip on the board.

[Stonent]

I've wondered if 3M Z Axis tape could be used to splice flat flex cable?

I'm sure David L. "Crocodile Clip" Jones could come up with something better, though.

[iloveelectronics]

Thanks for selecting my package and taking that Chinese DMM apart

My 9-year-old son REALLY liked the knife part He thought it was hilarious! He's not into electronics but I know he likes silly stuff like that (just like any other boys his age!) so I showed this one to him and he laughed every time you used that knife to open a package! Good stuff!

[nuhamind2]

Looks like the DMM probe should be used like a chopstick 

[aargee]

Dave, Victorinox owns Wenger. I do like the pocket knife much better, I hope you didn't have to buy a stuffed crocodile with that knife.

[dave_k]

Hey Dave,
What model is the HP printer card? If it's a 615N it will curl up and fail at some point!
There is a well known issue with these cards:
http://en.wikipedia.org/wiki/JetDirect#615n_series_ASIC_issue

If it's a 620N then you're OK 

[JoeMuc2013]

Hi Dave,

is this the magnetic core memory production video you were talking about?
221-b and NiHaoMike are probably right, there is another hole in the ribbon flex cable just below the part number print, possibly puncturing traces #12 and/or #13. Traces #20 and #21 were not solder-fixed where the cable was ripped.

Greets,
Joe

[miguelvp]

Scope is still right side up

[creepyoldenj]

About the core memory.

I watched core planes being made on a field day from school.
The loose cores were poured onto a metal plate with little
slots laid out into an array etched into the surface of the plate.
The plate was vibrated and
the cores would fall into the slots in such a way
that they would stand on edge.  The extra cores
would be shaken off the plate.
Then RTV(silicon rubber) was poured over the plate
with the cores on it.  Once the RTV set, it was peeled off
with the cores attached to the RTV.
Then workers would pull out fine, straightened wire from
long glass storage tubes and thread the cores sitting
upright on the RTV by hand!
Talk about tedious! There was a lot of labor involved,
and the arrays cost a lot of money to make.
This was back in the early 70's. One of the reasons
core memory was still in production was aerospace & military.
Core was much more robust against radiation & emp and mechanical failure than
other RAM type storage at the time.

[HP-ILnerd]

That knife is awesome by the way.

[rrmm]

Anyone know what Siemens computer that core module goes to?  Quick count looks like the word size is around 60-64bits and some parity?

Couldn't find much on the web about Siemens' mainframe offerings from the era.

[coppice]

About the core memory.

I watched core planes being made on a field day from school.

Where was that? Almost all production of core stores went to South East Asia in the very early days, as part of the first wave of moving production to cheap labour countries. It wasn't just about hourly costs, though. This work had a bad effect of people's eyesight, and in places with poor worker protection, they just tossed out and replaced the assembly line workers every couple of years. Not a very noble part of the history of electronics.

I think at the very end they were able to automate the assembly of these things. They certainly pushed up the density a lot. Early 70s core stores were far smaller than early 60s ones. As you said, core continued for a long time in high reliability and radiation sensitive applications. Early DRAM just couldn't match the robustness of core stores, although its density and speed quickly took the lead.

[coppice]

Hi Dave,

is this the magnetic core memory production video you were talking about?

They are assembling ferrite sheet memory in that video, not core stores.

[lapm]

Dave thats not a Knife, thats damn sword... 

[Dr. Frank]

Crocodile Jones, get your hair dyed blonde! 

Awesome mail bag Monday!

Frank

[SeanB]

I repaired a few core memories to replace cracked cores. Simplest and easiest was simply to add the new one at the one column end, then unsolder the row and extend it to go through and back to the pad, then route the sense wire through along with inhibit. Worked as the memory core was around 16 bytes of 12 bit info. There was a replacement unit made that used 2 Dallas ram chips to emulate the memory. 2k of memory that only had a tiny amount in use.

I still have some core driver arrays, MPQ6502 transistor arrays that have 2 2N2219A dies and 2 2N2905a dies in the package.

[robrenz]

Most excellent Mailbag Monday    Love the knife, the only thing to top that would be to use a Binford 6100 chainsaw to open the packages a la Tim the Tool Man. (Home improvement/ tool time)

[WarSim]

About the core memory.

I watched core planes being made on a field day from school.

Where was that? Almost all production of core stores went to South East Asia in the very early days, as part of the first wave of moving production to cheap labour countries. It wasn't just about hourly costs, though. This work had a bad effect of people's eyesight, and in places with poor worker protection, they just tossed out and replaced the assembly line workers every couple of years. Not a very noble part of the history of electronics.

I think at the very end they were able to automate the assembly of these things. They certainly pushed up the density a lot. Early 70s core stores were far smaller than early 60s ones. As you said, core continued for a long time in high reliability and radiation sensitive applications. Early DRAM just couldn't match the robustness of core stores, although its density and speed quickly took the lead.

Yes commercial core memory was sent out of country.  The poster mentioned aerospace and military.  These industry stayed at home almost until it was replaced.  I say almost because a political game sent procurement out of country just before the replacement was finalized. 

Thank you for the"almost all qualifier".  I am glad to see that some people realize that commercial/industrial are not the only electronics industries. 

[djacobow]

Regarding the destructive reads: of course, reads from DRAM are destructive, too. Every read needs to be followed by a write of the same data. It's all handled transparently by the chip, bit it does have to happen.

[coppice]

Regarding the destructive reads: of course, reads from DRAM are destructive, too. Every read needs to be followed by a write of the same data. It's all handled transparently by the chip, bit it does have to happen.

That's not true of either SRAM or DRAM. SRAM just stores without any need to refresh the memory cells at all. DRAM needs refreshing, but its to overcome leakage. It is not to put back data destroyed during a read.

[djacobow]

That's not true of either SRAM or DRAM. SRAM just stores without any need to refresh the memory cells at all. DRAM needs refreshing, but its to overcome leakage. It is not to put back data destroyed during a read.

No, it IS true of DRAM. DRAM bits are capacitors. When a row is selected, the charge on the capacitors is sent to sense amps for reading. In the process, the charge is partially depleted. As part of the read cycle, the cell read must also refreshed. This can happen during the same row selection as the read. Essentially, the sense amp determines the state of the cells and then transistors on columns turn on to push the voltages back up in the appropriate columns.

This is independent of the bulk refresh cycle periodically applied to the whole DRAM.

Step "7" in the operation section here describes badly how this works:
http://en.wikipedia.org/wiki/Dynamic_random-access_memory

Slide 4 of this deck from some Stanford EE class also describes it:
http://www-inst.eecs.berkeley.edu/~cs150/fa04/Lecture/lec16.ppt

[SeanB]

Dram read refreshes all the cells in the selected row using the read amplifiers to refresh the level to a level that stores a bit. Thus a read is going to refresh, and connecting the read amplifier does remove charge from the cell, you just have to do it soon enough that it is reliably readable as to state. Refresh can either be on chip with an internal counter that free runs when the chip is not selected, or via an external controller that handles the refresh to keep the chip alive.

IIRC the old Z80 had a built in DRAM refresh circuit that generated memory reads when the bus was idle, and this went in a 128bit cycle to refresh the DRAM transparently.

[max_torque]

Stumbled on this magnetic core "shield" for the popular Arduino platform, and the page also has a good simple explanation of the physics behind it ;-)

http://www.corememoryshield.com/report.html

[electronics man]

Was that magnetic memory modern at the time?

[jolshefsky]

Ha—August 30, 1970 is my birthdate! What an odd thing to see appear on a YouTube video!

[DrJoe]

Was that the serial number on the silver label under the bale of the Chinese DVM - 000000106?
 (5:40 in the video). First day of production?

[iloveelectronics]

Was that the serial number on the silver label under the bale of the Chinese DVM - 000000106?
 (5:40 in the video). First day of production?

The "CMC" logo is the China Metrology Certification. I believe the number following it is just a certification number, not the serial number for the unit. I can't find any info about the CMC mark in English, only some in Chinese:
http://baike.baidu.com/view/2331156.htm
http://baike.baidu.com/view/1032852.htm

[coppice]

No, it IS true of DRAM. DRAM bits are capacitors. When a row is selected, the charge on the capacitors is sent to sense amps for reading. In the process, the charge is partially depleted. As part of the read cycle, the cell read must also refreshed. This can happen during the same row selection as the read. Essentially, the sense amp determines the state of the cells and then transistors on columns turn on to push the voltages back up in the appropriate columns.

This is independent of the bulk refresh cycle periodically applied to the whole DRAM.

Step "7" in the operation section here describes badly how this works:
http://en.wikipedia.org/wiki/Dynamic_random-access_memory

Slide 4 of this deck from some Stanford EE class also describes it:
http://www-inst.eecs.berkeley.edu/~cs150/fa04/Lecture/lec16.ppt
[/quote]

Read those two steps carefully. They agree with what I said. The cell's contents are never lost at any point in the read cycle. If the refresh step at the end of the cycle were skipped the cells would still be readable a number of times before the cell's contents were lost. This is fundamentally different from reading core stores, or something more modern like FRAM. These don't weaken the cell's state during a read, they completely destroy it. With these memories a read cycle is inherently longer than a write cycle, as a user level read operation is actually a read cycle followed by a write cycle.

[wholder]

Here's a project I did a few years back that creates a simple, one bit magnetic core memory.  I intended to scale it up, but have yet to get time to do that.  In any case, I think the circuits I worked out are fairly simple to understand in case anyone else want to dink around with core men:

  https://sites.google.com/site/wayneholder/one-bit-ferrite-core-memory

Wayne

[chickenHeadKnob]

Was that magnetic memory modern at the time?

Not really. The concept had been known for decades. Once semiconductor memory became readily available in sufficient quantities and sizes it quickly displaced magnetic core memory in all but very niche applications. The space shuttle apparently used magnetic core memory.

By 1970 the end of the line could be seen for core memory. Younger people today forget that Intel started out as semi-conductor DRAM.+SRAM core replacement company, not microprocessors. Mainframes were still being shipped with core but everyone could see semi-conductor memory was going to take over. I think that replacement market was something like 90% of intel's bottom line in the early-mid seventies.

[coppice]

By 1970 the end of the line could be seen for core memory. Younger people today forget that Intel started out as semi-conductor DRAM.+SRAM core replacement company, not microprocessors. Mainframes were still being shipped with core but everyone could see semi-conductor memory was going to take over. I think that replacement market was something like 90% of intel's bottom line in the early-mid seventies.

Intel didn't invent DRAM, but the Intel 1103 was definitely the first successful DRAM device. It kinda sucked at first, but after a few revisions is settled down to be an affordable reliable memory. At that point the core memory coffin started to creak shut.

[djacobow]

Read those two steps carefully. They agree with what I said. The cell's contents are never lost at any point in the read cycle. If the refresh step at the end of the cycle were skipped the cells would still be readable a number of times before the cell's contents were lost. This is fundamentally different from reading core stores, or something more modern like FRAM. These don't weaken the cell's state during a read, they completely destroy it. With these memories a read cycle is inherently longer than a write cycle, as a user level read operation is actually a read cycle followed by a write cycle.

I am not seeing any real disagreement here in how a DRAM read works. You seem to be making a semantic point that is  important to you, but the fact is, if DRAMs did not refresh as part of read cycle, they would not work properly and you could not build a working computer with them. That is the same as for core. Whether this happens on the 1st read of a location or the 100th doesn't really matter.

Bulk refreshes come how often? Maybe every 50-100ms? In that time, an individual memory location could be read thousands if not millions of times. If there were no refresh as part of the read, you'd soon get the wrong answer.

[FrankBuss]

And recently TI kind of re-invented magnetic core memory on a chip:

http://www.ti.com/fram

With 8 MHz it is much faster than the old core memory, and it has 10^15 write cycles lifetime, which means 4 years writing all the time with max speed. Would be an interesting project to verify this.

I wonder what other obsolete concepts could be used in a modern way. NASA's 460 GHz vacuum channel transistor looks cool, a vacuum tube on a chip:

http://hexus.net/tech/news/industry/71493-nasa-scientists-created-460ghz-vacuum-tubes/

[coppice]

Read those two steps carefully. They agree with what I said. The cell's contents are never lost at any point in the read cycle. If the refresh step at the end of the cycle were skipped the cells would still be readable a number of times before the cell's contents were lost. This is fundamentally different from reading core stores, or something more modern like FRAM. These don't weaken the cell's state during a read, they completely destroy it. With these memories a read cycle is inherently longer than a write cycle, as a user level read operation is actually a read cycle followed by a write cycle.

I am not seeing any real disagreement here in how a DRAM read works. You seem to be making a semantic point that is  important to you, but the fact is, if DRAMs did not refresh as part of read cycle, they would not work properly and you could not build a working computer with them. That is the same as for core. Whether this happens on the 1st read of a location or the 100th doesn't really matter.

Bulk refreshes come how often? Maybe every 50-100ms? In that time, an individual memory location could be read thousands if not millions of times. If there were no refresh as part of the read, you'd soon get the wrong answer.

So, you don't see a material difference between:

• a device which will store indefinitely with the power off, but can only be read by totally obliterating its contents.
• a device that leaks all day, leaks a bit worse when you try to read it, and can't store for more than 100ms or so with the power off

There are both opportunities and pitfalls in that difference. Its very relevant now, as core and FRAM behave in almost identical ways.

[djacobow]

So, you don't see a material difference between:

• a device which will store indefinitely with the power off, but can only be read by totally obliterating its contents.
• a device that leaks all day, leaks a bit worse when you try to read it, and can't store for more than 100ms or so with the power off

There are both opportunities and pitfalls in that difference. Its very relevant now, as core and FRAM behave in almost identical ways.

Of course I see a material difference. I was just reacting to Dave's being so excited by the fact the core had destructive reads and it was necessary to engineer around that, whereas for DRAM reads are also destructive and you have to engineer around that, too. The reality is that the technologies both have their quirks, admittedly, different quirks, but both  can be made to work (obviously) and there is some similarity.

Core, as you point out, retains its state when powered down, requires no power when not being read or written and is impervious to soft errors, but it requires a somewhat weird two-stage read cycle. I think core was still in use on the Space Shuttle when it was retired. It's neat stuff.

[Kadah]

I twitted this last night, but likely got missed so I'll post it here instead.

I've got a (pair actually, I plan to keep one) 16k 16bit word core memory board that I've been meaning to send in for months, but work as been too busy to package it up. The units were made by Ampex and came from the early NASA space shuttle program during the Space Lab project with ESA and would have been used in the Mitra 125 ground computers. They're unused spares and technically new old stock.

Dave, if you want it and willing to hold off making a video on core mem, I'll get the puppy shipped off in the next week.

[gflater]

Anyone know what Siemens computer that core module goes to?  Quick count looks like the word size is around 60-64bits and some parity?

Couldn't find much on the web about Siemens' mainframe offerings from the era.

Doing more research I am not sure if it belonged to a Siemens computer or not, the board is branded Siemag, the notes on the board were in german. Siemag is still active in metallurgic industries. This might have been one of their old side businesses.
I don't know what kind of computer it came from for sure. I found the board in a closet on my old job, if I recall correctly, some 20 odd years ago. The company was moving and I think this was going to get tossed together with a whole pile of old electronics.

Would be cool if Dave could hook it up to a micro controller and have it store and read back something.

[coppice]

I twitted this last night, but likely got missed so I'll post it here instead.

I've got a (pair actually, I plan to keep one) 16k 16bit word core memory board that I've been meaning to send in for months, but work as been too busy to package it up. The units were made by Ampex and came from the early NASA space shuttle program during the Space Lab project with ESA and would have been used in the Mitra 125 ground computers. They're unused spares and technically new old stock.

Dave, if you want it and willing to hold off making a video on core mem, I'll get the puppy shipped off in the next week.

https://www.dropbox.com/s/pxw7ktkok5atoqc/IMG_20140326_170124.jpg

Are the brown strips on that board a mezzanine power bus? I haven't seen one of those in quite a few years.

[rrmm]

[Doing more research I am not sure if it belonged to a Siemens computer or not, the board is branded Siemag, the notes on the board were in german. Siemag is still active in metallurgic industries. This might have been one of their old side businesses.
I don't know what kind of computer it came from for sure. I found the board in a closet on my old job, if I recall correctly, some 20 odd years ago. The company was moving and I think this was going to get tossed together with a whole pile of old electronics.

The only other reference to it I could find was this: http://www.ebay.ca/itm/Vintage-Core-Memory-Cartridge-70s-SIEMAG-Collectible-/121276238805

The storage doesn't seem very big nor the cores very dense (given the vintage).  Perhaps it's from an industrial PLC of some sort. 

Interesting find in anycase!

EDIT: looks like it might be from a Philips computer maybe P1000?

[AReResearch]

On the wifi radio:
Looks like the 11th and 21st traces of the ribbon cable have broken again after the repair.
The hole in the 12th had already been noticed.

Either someone has mistreated the unit or there is a serious mechanical design flaw.
Shouldn't be too hard to fix.

[BlinkY]

If it's possible to read and write to the fascinating Magnetic Core Memory module, I'm suggesting "EEVblog" and then frame the whole module for the future.
I'm assuming it will fit? 8 bytes for each letter, 8 x 7 = 56 bits.

[miguelvp]

If it's possible to read and write to the fascinating Magnetic Core Memory module, I'm suggesting "EEVblog" and then frame the whole module for the future.
I'm assuming it will fit? 8 bytes for each letter, 8 x 7 = 56 bits.

If framed, at least put a connector on the edge with a cover to prevent getting dust/dirt inside the connector.

[Kadah]

Are the brown strips on that board a mezzanine power bus? I haven't seen one of those in quite a few years.

Could be, but I wouldn't really know. There's one running under nearly every row of DIPs. Looking at it again, it does look like its 2 separate conductor layers laminated together.


The lower board contains the actual memory.

[RupertGo]

I used to have a PDP 8/A, which had (I think) 16K of proper core store. The service manual the PDP came with also detailed an alternative, solid-state, static replacement memory made out of either discrete components or SSI. The aspect of it (the 8/A was a late TTL version)  I most definitely remember was that it also came with huge secondary batteries, so that it could properly emulate core store for however many hours they lasted...

[romantronixlab]

Nice mailbag, Made me laugh all the way , Nice blade btw. Is that a Dave "?" Jones edition blade?

[coppice]

Are the brown strips on that board a mezzanine power bus? I haven't seen one of those in quite a few years.

Could be, but I wouldn't really know. There's one running under nearly every row of DIPs. Looking at it again, it does look like its 2 separate conductor layers laminated together.

Now I see it close up it I recognise it. They usually stood upright, and they were more often white, but those mezzanine power buses were quite popular in high end equipment at one stage. They were often stacked several layers thick, in the days when quite a few chips (e.g. DRAMs) had three power rails.

[mswhin63]

Surprised no one mentioned comment on Bruce.

[BlinkY]

Quote from: mswhin63 on Today at 09:42:51 AM

Surprised no one mentioned comment on Bruce.

>

Nice one, Bruce.

[Stonent]

Quote from: mswhin63 on Today at 09:42:51 AM

Surprised no one mentioned comment on Bruce.

>

Nice one, Bruce.

Ay Bruces! Ya know it works better if you take the "S" off, right?

[dean1066]

Dave,

I work for Pure in the UK, I'll see if i can dig out a replacement OLED display for you ( It may be a white backlit one rather then yellow/green).
To replace it you need to take out the whole front panel PCB assembly, but first  pull of the knobs on the front panel to allow you to undo the nuts which hold in the shaft encoders. It's fairly easy.

Pure are shipping many Digital/Internet radios  to Australia now and also a range of wireless multi-room speakers called Jongo... check it out on our website...

http://www.pure.com/au/

[kcozens]

Greetings, Dave. It is always interesting to see what items land on your desk to be opened on Mailbag Monday. I think you made your point with the big knife. I never had a problem with the size of the knife you used but I always thought of it as a safety issue. At least you haven't accidentally cut yourself with it when opening packages.

I liked the segment on the core memory. The first computer I really got to touch and operate was an HP 2114A that came to my school. I had been doing some programming in a computer club after school so when I became a student operator of the machine for a week when my math class was giving the other students in the class information about the computer and how to program it. The 2114A used core memory in it. If the computer had been off over the weekend you had to use the attached paper tape reader to reload the BASIC interpreter so the students could run their programs. The programs were fed to the machine using mark sense cards and printouts went to an ASR-33 teletype printer. It used to shake the table it was sitting on when it was typing out a program listing. I can still remember the sound of over 30 years later. Ah, what memories.

[Porto]

The Victorinox knife is cool, I have a 90's SwissChamp!   
The bowie knife is cooler, looks a bit like my Gil Hibben made Rambo 3 knife I have laying around.




Nice one!   

[BlinkY]

Quote

Ay Bruces! Ya know it works better if you take the "S" off, right>[/quote]

Not sure I follow, Bruce. But right on .
Back on topic before that Crazy Aussie bloke slaps us with wet fish.



EDIT: I've edited this message about five times and the format is continuously messed up, if it's messed up this time then everyone knows why.

[crisr]

Did anyone else shout "Crocodile Dundee" seeing that crazy aussie bloke holding that knife?

[SeanB]

I watched that in the cinema, on the big screen ( 2 storeys tall as well!) and I was in row 3. you could see every freckle on Lisa Koslowski's face, and every pore, along with other things, shown large. I also saw Star wars there, with the Dolby Surround turned up full wick. After a week they had to turn it down, as the blocks of flats around were complaining of pictures falling off the walls.

[Galaxyrise]

The pocketknife on that book cover had its logo edited off, but there's no hiding which style of knife it is (Victorinox).  Have a look at these comparison images; the can opener is the dead give-away.   Specifically, it looks like the Spartan.

[coilcap]

Does anyone know if Dave placed the hi-res images of the core memory anywhere on this web site? I would love to have a copy. This micro mechanics is so cool looking. Thanks a bunch!