Oops.. 30 min power outage destroys 3.5% of global NAND flash output

[mikeselectricstuff]

https://www.anandtech.com/show/12535/power-outage-at-samsungs-fab-destroys-3-percent-of-global-nand-flash-output

[imidis]

Ouch 

[glarsson]

Samsung can't even design their buildings without making a copy.        Piet Mondrian this time.

[Ampera]

Memory companies being asses, what else is new? I can't remember.

[EEVblog]

Samsung uses its fab near Pyeongtaek to produce 64-layer V-NAND chips used for various applications.

64 layers 

[Ampera]

Why can't I hold all these layers?

[wraper]

Samsung uses its fab near Pyeongtaek to produce 64-layer V-NAND chips used for various applications.

64 layers 

Companies go away from planar NAND, Micron and Toshiba do the same. They use larger fabrication node but do many layers.

Toshiba Memory Corporation Announces 96-Layer 3D Flash Memory

https://toshiba.semicon-storage.com/ap-en/company/news/news-topics/2017/06/memory-20170628-2.html

[wraper]

Companies go away from planar NAND, Micron and Toshiba do the same. They use larger fabrication node but do many layers.

I like this. Instead of shrinking feature size, they increase vertical layers.
Can't imagine the reliability if they use sub 10-nm process on QLC.

I don't think this would work at all. <20nm TLC is already barely passable. But due to large feature size, 3D TLC NAND is as reliable, if not better as 2D MLC.

[llkiwi2006]

damaged tens of thousands of processed wafers

How do they not have backup generators? 

[mikeselectricstuff]

damaged tens of thousands of processed wafers

How do they not have backup generators? 

I would imagine the do, and that this was probably some other failure. Like someone accidentally hitting an emergency stop, or an internal power distribution issue. Or the generator didn't start
 

[BrianHG]

Samsung uses its fab near Pyeongtaek to produce 64-layer V-NAND chips used for various applications.

64 layers 

Companies go away from planar NAND, Micron and Toshiba do the same. They use larger fabrication node but do many layers.

Toshiba Memory Corporation Announces 96-Layer 3D Flash Memory

https://toshiba.semicon-storage.com/ap-en/company/news/news-topics/2017/06/memory-20170628-2.html

Holy crap, 96 layers, and, 4 bits per cell, or, 16 charge levels.

[Brumby]

The thing that I am curious about is what sort of damage was done.

[SeanB]

The thing that I am curious about is what sort of damage was done.

Probably interrupted the smooth transfer of wafers and the corresponding memory in the controlling PLC system. They have to strip out the line, do a maintenance cycle ( thus likely to be offline for nearly a week doing this unscheduled stop) and start the whole line again in sequence. the wafers that were in process however are not a total loss, they very likely will be graded as to where they were in process and either put through the refinery again or, for those that were completed a stage, simply be continued on in the line again. As the purity of the silicon, even fully made and just short of packaging, is still very good it is easy to put through the refinery again to grow new crystals, though there will be a delay while this happens.

[bitwelder]

Ah, the building in picture in the Anandtech article seems to be about a NEW plant that they started to build about a month ago, because Samsung forecasts in 2018 a 40% increase on-year in the NAND demand: http://www.theinvestor.co.kr/view.php?ud=20180207000728

[raptor1956]

The thing that I am curious about is what sort of damage was done.

Probably interrupted the smooth transfer of wafers and the corresponding memory in the controlling PLC system. They have to strip out the line, do a maintenance cycle ( thus likely to be offline for nearly a week doing this unscheduled stop) and start the whole line again in sequence. the wafers that were in process however are not a total loss, they very likely will be graded as to where they were in process and either put through the refinery again or, for those that were completed a stage, simply be continued on in the line again. As the purity of the silicon, even fully made and just short of packaging, is still very good it is easy to put through the refinery again to grow new crystals, though there will be a delay while this happens.

Not likely the transport of wafers but the processing of them that is the problem.  There are a great many processes that if interrupted the wafer is toast.  Some problems can be  reworked but others result in scraping and starting over.  A very large FAB might have 20,000 FOUP's with as many as 25 wafers per FOUP so perhaps as many as 500K wafers in total.  I doubt more than 25% would be scraped but probably not less than 10%.  It is also likely that upwards of 20% may need rework and that not all of them will be reworked successfully.  So, it could be 30% loss of about 6 weeks of production -- so, maybe equal to 2 weeks production.


Brian

[rhb]

I worked at a major oil company research lab.  They had dual power feeds, but no backup generators.  We lost power one day during servicing of one feed when an electrician pulled the wrong lever.  Not long afterwards a generating plant was installed in the back of the complex with a large oil stock tank to feed it.  Large as in around 75' diameter and 30' tall.  A power plant to carry all the load of a large complex is expensive to install and maintain. It also takes up a lot of space, particularly because the tank to feed a MW class power plant needs a pretty large buffer area around it.

The company had a computer building designed to take a direct hit from an F5 tornado without any damage except to the offices on the 4th or 5th floor at the top.  They were quite fanatical about safety and preparedness.  Sadly not a trait of the next major I worked for.

[Red Squirrel]

It seems companies put their eggs all in one basket way too much.  Why can't they diversify more and build more factories so they're not always operating at 100%?

Kinda like the HDD shortage years ago.  There's only one company that makes the motors for all HDD companies and it was flooded.  Seems crazy to me that there is not more companies that can do the same thing so that there is always a good supply. 

[wraper]

Why can't they diversify more and build more factories so they're not always operating at 100%?

Because it's race to the bottom. NAND flash already is barely profitable even when things are going well. Margin is so thin that you'll going bankrupt if increase your expenses a bit more. Also technology is so expensive and becomes obsolete so fast that it either must pay back in a few years or will never fully pay for itself at all.

[coppice]

The thing that I am curious about is what sort of damage was done.

Probably interrupted the smooth transfer of wafers and the corresponding memory in the controlling PLC system. They have to strip out the line, do a maintenance cycle ( thus likely to be offline for nearly a week doing this unscheduled stop) and start the whole line again in sequence. the wafers that were in process however are not a total loss, they very likely will be graded as to where they were in process and either put through the refinery again or, for those that were completed a stage, simply be continued on in the line again. As the purity of the silicon, even fully made and just short of packaging, is still very good it is easy to put through the refinery again to grow new crystals, though there will be a delay while this happens.

Not likely the transport of wafers but the processing of them that is the problem.  There are a great many processes that if interrupted the wafer is toast.  Some problems can be  reworked but others result in scraping and starting over.  A very large FAB might have 20,000 FOUP's with as many as 25 wafers per FOUP so perhaps as many as 500K wafers in total.  I doubt more than 25% would be scraped but probably not less than 10%.  It is also likely that upwards of 20% may need rework and that not all of them will be reworked successfully.  So, it could be 30% loss of about 6 weeks of production -- so, maybe equal to 2 weeks production.

Why less than 25%? Anything in a diffusion oven for 30 minutes without power is scrap. Surely the large amount of time wafers spend in ovens would put more than 25% of them there are any time?