EEVblog Electronics Community Forum
Products => Crowd Funded Projects => Topic started by: hugeone on February 20, 2018, 10:23:43 pm
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I have a poll on my facebook about the my design. Feeedback appreciated.
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I started a similar project a year or two ago. Ultimately I abandoned it because it was not really sufficiently different from a slew of Chinese eBay offerings to be worth the trouble.
At present I am working on doing something similar using the Zynq. Rather than design hardware which would be expensive to produce in low volume, I'm focusing on writing open source FW for Zynq based DSOs and dev boards.
DSOs have the limitation that the low end is just 8 bit ADC. But by varying offsets and attenuator settings in software one can achieve more accuracy by successive approximation to implement higher resolution. A cheap DSO will sample at 1 GS/S so it has a 500 MHz acquisition BW. That's quite a high spec SDR for things like real time spectrum analysis. For listening and monitoring purposes one could split the input into a portion that is being actively decoded and spectrum waterfall display that updates 30-120 times a second. That would get around the BW limitations of USB and Gb ethernet.
BTW Thank you for your article on UBIFS. I found it very helpful. I did encounter issues related to properly specifying the size of the target device when trying to mount 3rd party images. The error messages from mtd-utils were less than informative.
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One thing specifically on your kickstarter is that you mention in one place the third stretch goal would be 30 mhz and at the bottom its only 10 mhz.
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I run small advertising company
I suggest you have one of your designers make nice graphics. The green/red color for the condensed type? It's really easy to glance over because it's hard to read. Green/red/blue/yellow? Eh... sorry... just no.
Also, typos:
advances features
921600pbs
Clock surve
I²C vs. I2C
Output volatage
streatch goal
Also, I don't really see a buffer size for the oscilloscope portion and whether all those features can be used at the same time or not. Also, the 8 MHz analog bandwidth is kinda odd. You'd need at least 16 MSPS to make use of that. What happens if the 10 (30?) MHz stretch goal is unlocked? Do you then increase the sample rate as well? If not then the stretch goal is completely pointless.
Overall though, I'd say the only way to set yourself apart here is with the software. If it's good and easy to use, this would be a huge bonus. I'd say you should highlight it more and give better screenshots (e.g. showing functional areas one-by-one). Also, how are the debuggers actually *used*? Giving examples for certain use-cases would give people an idea of what to expect.
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Thank you very much for your answers.
I suggest you have one of your designers make nice graphics. The green/red color for the condensed type? It's really easy to glance over because it's hard to read. Green/red/blue/yellow? Eh... sorry... just no.
Actually I should write "micro" and I am the only designer :)
Also, how are the debuggers actually *used*? Giving examples for certain use-cases would give people an idea of what to expect.
Thank you.
What happens if the 10 (30?) MHz stretch goal is unlocked? Do you then increase the sample rate as well? If not then the stretch goal is completely pointless.
It is not exactly the truth. Especially is we consider signals with high bandwidth consumption - for example the square wave. If you consider the 1MHz square (having 10 samples / period) - 10MHz bandwidth is a minimum.