How to draw isolation gaps on Eagle

[canol]

Hello,

I want to draw isolation gaps on Eagle to isolate high voltage from low voltage just like in the attached image. How can I do this?

[bobcat]

Draw a line (wire) on the milling layer.

[babysitter]

And also don't forget to talk to the manufacturer which slot size is cheapest (sometimes they want more €$... if they need to use a smaller tool than they use for outline dimension, usually 2 or 2.4mm), and you might put a note outside the PCB dimensions like doing a "milling" line at the right width and some text explaining that this is how a milling track looks like.

[canol]

Thank you very much.

[vini_i]

i would not suggest using the milling layer. place the cutouts on the dimension layer instead.

the milling layer is overlooked by some of the basic eagle functions. for instance the design rule check (DRC) will not flag anything related to the milling layer. if a trace is run just a tad to close to the cut out the the DRC will not flag it. also the milling layer is ignored by the pours as well. if there are two pours next to each other with the cutout in between eagle will not pull back the pours to accommodate the opening automatically.

if you use the dimension layer all of these things are taken care of.

[babysitter]

Thats intentional. If I want selective gold, I do the connection of the relevant wires on places that get milled later. You might copy your milling symbols to another layer to get it into DRC.

[vini_i]

Thats intentional. If I want selective gold, I do the connection of the relevant wires on places that get milled later. You might copy your milling symbols to another layer to get it into DRC.

would you mind elaborating. i'm not sure i understand what you meant by selective gold.

also is it not possible to create unintentional shorts if the pours or traces are not pulled back from the desired hole router out in the board?

[babysitter]

OK, lets go: Sometimes you want connections that you later want to get rid off.
One case is selective gold plating of traces, where the PCB gets dipped into a gold solution and a galvanic process is used. The gold attaches to the traces which are connected to a current source, the others are not gold-plated. All those wires need to go to a common node where the current source is connected to, but you dont want a short afterwards, so the node can be removed by milling.

Also, my wife who worked at CAM in a PCB house said there are other reasons for people to use it without selective gold plating, she knows some of them but she didn't understand them all.

Also, one might ask the PCB manufacturer to not mill the milling layer but does it by themselves later (removal of programming/test traces?)

[Jeroen3]

In-board outline shapes will get milled. Even some larger holes won't be a drill, but are on the outline layer.
Most export scripts for cheap chinese fabs exclude the milling layer.

Maybe the fab will send the files back, but then you'll know what to change.

[fivefish]

I have had cutouts/slots on my board, fab in USA and China.  Put it on Dimension layer.