Looking for improvements before ordering.

[Mikey]

I made a new version of a PCB which had some stupid mistakes on it. On this new version I changed from some random Chinese relays, to some SMD ones from omron, LED's got moved, capacitors on the 3v3 rail got upgraded to 30 times the capacity as before, almost all traces got moved around and most of them made shorter, and the entire board got smaller... but have I overlooked something, or maybe someone got an idea on something that could be done better.

[Christopher]

Looks good 

I doubt it will matter much in your case, but routing of bulk & decoupling caps matter. Something like the attached pic is a preferred way of doing it: INTO the cap first, then OUT, rather than having the cap hanging off a trace.

Think in terms of current loops and you will be set

[Mikey]

In my case I will be dealing with current spikes up to 400mA in worst case, and a maximum of 4.8ms long, on my current board (which is even worse than this), it does not seem to be a big problem.

I tried to make them all like C1 and C2, but then I couldn't align the components that well, and my OCD took over and wanted me to put them the same way.

[Mikey]

you must have spent some time rounding the traces.

what about clearances? would you consider having wider clearances?  ... off hand it looks very small, but thats just me i think

That did take a bit time, yes.  But I like how they look, even when it makes no actual difference.

Clearance is set to 5mil, so you are right they are small. But it seems to be fine after the PCB is made too.

This is from the first version I made.

[Monkeh]

5mil is doable, but I see nothing in your layout which requires it.

Open it up to around 8mil, and expand your annular rings a bit as well. It can't hurt.

[Mikey]

5mil is doable, but I see nothing in your layout which requires it.

Open it up to around 8mil, and expand your annular rings a bit as well. It can't hurt.

This is with 8mil and the rings at 15mil. Went from 10 to 15 on the rings.

aaaand now I have to look at what is going on at the temperature sensor... they are overlapping now.

[Monkeh]

Yeah, you don't need to go that high, especially on pads.

Leave the pads at about 10, make sure the vias are at least 7.

[Mikey]

Not sure if I am doing this right.



I changed the size here, the pads on the TMP36 sensor are still very close to each other.

[Mikey]

It is the component footprint, and they looks way too big on the board too.





On the device it looks okay, but when placed on the board they are getting bigger.

[T3sl4co1l]

That big juicy ground pour...

Stitch it!

Plop down vias both sides of every trace, or group of traces (bus) that cuts across it.  Ideally, you always have traces crossing at right angles, when they do cross, so that at every intersection, you can put a via in each corner to stitch the grounds on all sides of those routes.  That's the basic idea.  Put vias every inch (20mm) or so along traces, and in corners, peninsulas, etc.

That TO-92 should really use a 0.1" pitch, or a staggered footprint.  If the part isn't sold with formed leads, it's a little bother to use that way, but it's far easier to use on the layout.

Tim

[Monkeh]

Reduce the max restring to get those pads under control.

Or, as advised, use a staggered footprint and round pads.

[Mikey]

Tried to mess more around. And got all capacitors to be on the trace instead of hanging off it.